Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as an

[coreboot.git] / src / arch / x86 / boot / coreboot_table.c

diff --git a/src/arch/x86/boot/coreboot_table.c b/src/arch/x86/boot/coreboot_table.c
index 634cefd4392cc85e94651e100b5ebd5fb3870613..db3a8a9b5fcf0f43f122e0383ab7109154ed06b2 100644 (file)
--- a/src/arch/x86/boot/coreboot_table.c
+++ b/src/arch/x86/boot/coreboot_table.c
@@ -135,6 +135,9 @@ static void lb_console(struct lb_header *header)
 #if CONFIG_CONSOLE_SERIAL8250
        add_console(header, LB_TAG_CONSOLE_SERIAL8250);
 #endif
+#if CONFIG_CONSOLE_SERIAL8250MEM
+       add_console(header, LB_TAG_CONSOLE_SERIAL8250MEM);
+#endif
 #if CONFIG_CONSOLE_LOGBUF
        add_console(header, LB_TAG_CONSOLE_LOGBUF);
 #endif