#include <arch/acpigen.h>
#include <device/pci.h>
#include <cbmem.h>
+#include <cpu/x86/lapic_def.h>
+#if CONFIG_CHROMEOS
+#include <vendorcode/google/chromeos/chromeos.h>
+#endif
u8 acpi_checksum(u8 *table, u32 length)
{
if (i >= entries_num) {
printk(BIOS_ERR, "ACPI: Error: Could not add ACPI table, "
- "too many tables.\n");
+ "too many tables.\n");
return;
}
/* Fix XSDT length. */
xsdt->header.length = sizeof(acpi_header_t) +
- (sizeof(u64) * (i + 1));
+ (sizeof(u64) * (i + 1));
/* Re-calculate checksum. */
xsdt->header.checksum = 0;
xsdt->header.checksum = acpi_checksum((u8 *)xsdt,
- xsdt->header.length);
+ xsdt->header.length);
}
printk(BIOS_DEBUG, "ACPI: added table %d/%d, length now %d\n",
- i + 1, entries_num, rsdt->header.length);
+ i + 1, entries_num, rsdt->header.length);
}
int acpi_create_mcfg_mmconfig(acpi_mcfg_mmconfig_t *mmconfig, u32 base,
- u16 seg_nr, u8 start, u8 end)
+ u16 seg_nr, u8 start, u8 end)
{
mmconfig->base_address = base;
mmconfig->base_reserved = 0;
for (cpu = all_devices; cpu; cpu = cpu->next) {
if ((cpu->path.type != DEVICE_PATH_APIC) ||
- (cpu->bus->dev->path.type != DEVICE_PATH_APIC_CLUSTER)) {
+ (cpu->bus->dev->path.type != DEVICE_PATH_APIC_CLUSTER)) {
continue;
}
if (!cpu->enabled)
}
int acpi_create_madt_ioapic(acpi_madt_ioapic_t *ioapic, u8 id, u32 addr,
- u32 gsi_base)
+ u32 gsi_base)
{
ioapic->type = 1; /* I/O APIC structure */
ioapic->length = sizeof(acpi_madt_ioapic_t);
}
int acpi_create_madt_lapic_nmi(acpi_madt_lapic_nmi_t *lapic_nmi, u8 cpu,
- u16 flags, u8 lint)
+ u16 flags, u8 lint)
{
lapic_nmi->type = 4; /* Local APIC NMI structure */
lapic_nmi->length = sizeof(acpi_madt_lapic_nmi_t);
void acpi_create_madt(acpi_madt_t *madt)
{
-#define LOCAL_APIC_ADDR 0xfee00000ULL
-
acpi_header_t *header = &(madt->header);
unsigned long current = (unsigned long)madt + sizeof(acpi_madt_t);
}
int acpi_create_srat_mem(acpi_srat_mem_t *mem, u8 node, u32 basek, u32 sizek,
- u32 flags)
+ u32 flags)
{
mem->type = 1; /* Memory affinity structure */
mem->length = sizeof(acpi_srat_mem_t);
static int acpi_is_wakeup(void)
{
- return (acpi_slp_type == 3);
+ /* Both resume from S2 and resume from S3 restart at CPU reset */
+ return (acpi_slp_type == 3 || acpi_slp_type == 2);
}
static acpi_rsdp_t *valid_rsdp(acpi_rsdp_t *rsdp)
if (!acpi_is_wakeup())
return NULL;
+#if CONFIG_CHROMEOS
+ printk(BIOS_DEBUG, "Verified boot TPM initialization.\n");
+ init_vboot();
+#endif
+
printk(BIOS_DEBUG, "Trying to find the wakeup vector...\n");
/* Find RSDP. */
return wake_vec;
}
+#if CONFIG_SMP
extern char *lowmem_backup;
extern char *lowmem_backup_ptr;
extern int lowmem_backup_size;
+#endif
#define WAKEUP_BASE 0x600
return;
}
+#if CONFIG_SMP
// FIXME: This should go into the ACPI backup memory, too. No pork saussages.
/*
* Just restore the SMP trampoline and continue with wakeup on
* assembly level.
*/
memcpy(lowmem_backup_ptr, lowmem_backup, lowmem_backup_size);
+#endif
/* Copy wakeup trampoline in place. */
memcpy((void *)WAKEUP_BASE, &__wakeup, (size_t)&__wakeup_size);