ifeq ($(CONFIG_PAYLOAD_SEABIOS),y)
COREBOOT_ROM_DEPENDENCIES+=seabios
endif
+ifeq ($(CONFIG_PAYLOAD_FILO),y)
+COREBOOT_ROM_DEPENDENCIES+=filo
+endif
ifeq ($(CONFIG_AP_CODE_IN_CAR),y)
COREBOOT_ROM_DEPENDENCIES+=$(obj)/coreboot_ap
endif
$(CBFSTOOL) $@ create $(CONFIG_COREBOOT_ROMSIZE_KB)K $(obj)/coreboot.bootblock
$(prebuild-files)
else
+.PHONY: $(obj)/coreboot.pre1
$(obj)/coreboot.pre1: $(CBFSTOOL)
mv $(obj)/coreboot.rom $@
endif
@printf " PAYLOAD SeaBIOS (internal, compression: $(CBFS_PAYLOAD_COMPRESS_NAME))\n"
$(CBFSTOOL) $@.tmp add-payload $(CONFIG_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
endif
+ifeq ($(CONFIG_PAYLOAD_FILO),y)
+ @printf " PAYLOAD FILO (internal, compression: $(CBFS_PAYLOAD_COMPRESS_NAME))\n"
+ $(CBFSTOOL) $@.tmp add-payload $(CONFIG_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
+endif
ifeq ($(CONFIG_GEODE_VSA_FILE),y)
@printf " VSA $(CONFIG_VSA_FILENAME)\n"
$(OBJCOPY) --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B i386 $(CONFIG_VSA_FILENAME) $(obj)/vsa.o
$(LD) -m elf_i386 -e 0x60020 --section-start .data=0x60000 $(obj)/vsa.o -o $(obj)/vsa.elf
$(CBFSTOOL) $@.tmp add-stage $(obj)/vsa.elf vsa
+endif
+ifeq ($(CONFIG_INCLUDE_CONFIG_FILE),y)
+ @printf " CONFIG $(DOTCONFIG)\n"
+ if [ -f $(DOTCONFIG) ]; then \
+ echo "# This image was built using git revision" `git rev-parse HEAD` > $(obj)/config.tmp ; \
+ sed -e '/^#/d' -e '/^ *$$/d' $(DOTCONFIG) >> $(obj)/config.tmp ; \
+ $(CBFSTOOL) $@.tmp add $(obj)/config.tmp config raw; rm -f $(obj)/config.tmp ; fi
endif
mv $@.tmp $@
@printf " CBFSPRINT $(subst $(obj)/,,$(@))\n\n"
crt0s = $(src)/arch/x86/init/prologue.inc
ldscripts =
-ldscripts += $(src)/arch/x86/init/ldscript_fallback_cbfs.lb
-ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
-crt0s += $(src)/cpu/x86/16bit/entry16.inc
-ldscripts += $(src)/cpu/x86/16bit/entry16.lds
-endif
+ldscripts += $(src)/arch/x86/init/bootblock.ld
crt0s += $(src)/cpu/x86/32bit/entry32.inc
ldscripts += $(src)/cpu/x86/32bit/entry32.lds
-ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
-crt0s += $(src)/cpu/x86/16bit/reset16.inc
-ldscripts += $(src)/cpu/x86/16bit/reset16.lds
-crt0s += $(src)/arch/x86/lib/id.inc
-ldscripts += $(src)/arch/x86/lib/id.lds
-endif
crt0s += $(src)/cpu/x86/fpu_enable.inc
ifeq ($(CONFIG_SSE),y)
crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
-ifeq ($(CONFIG_SSE),y)
-crt0s += $(src)/cpu/x86/sse_disable.inc
-endif
-ifeq ($(CONFIG_MMX),y)
-crt0s += $(src)/cpu/x86/mmx_disable.inc
-endif
-
-ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
-crt0s += $(chipset_bootblock_inc)
-ldscripts += $(chipset_bootblock_lds)
-endif
-
ifeq ($(CONFIG_ROMCC),y)
crt0s += $(src)/arch/x86/init/crt0_romcc_epilogue.inc
endif
$(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(OPTION_TABLE_H)
@printf " CC $(subst $(obj)/,,$(@))\n"
- $(CC) -MMD $(CFLAGS) -I$(src) -I. -I$(obj) -c $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c -o $@
+ $(CC) -MMD $(CFLAGS) -I$(src) -D__PRE_RAM__ -I. -I$(obj) -c $< -o $@
$(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
@printf " CC romstage.inc\n"
$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc
@printf " POST romstage.inc\n"
- sed -e 's/\.rodata/.rom.data/g' -e 's/\.text/.section .rom.text/g' $^ > $@.tmp
+ sed -e 's/\.rodata/.rom.data/g' -e 's/\^\.text/.section .rom.text/g' \
+ -e 's/\^\.section \.text/.section .rom.text/g' $^ > $@.tmp
mv $@.tmp $@
endif
ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c
endif
-ifeq ($(CONFIG_TINY_BOOTBLOCK),y)
-include $(src)/arch/x86/Makefile.bootblock.inc
-else
-include $(src)/arch/x86/Makefile.bigbootblock.inc
+#######################################################################
+# Build the final rom image
+
+$(obj)/coreboot.pre: $(obj)/coreboot.romstage $(obj)/coreboot.pre1 $(CBFSTOOL)
+ @printf " CBFS $(subst $(obj)/,,$(@))\n"
+ rm -f $@
+ cp $(obj)/coreboot.pre1 $@
+ $(CBFSTOOL) $@ add-stage $(obj)/romstage.elf \
+ $(CONFIG_CBFS_PREFIX)/romstage x 0x$(shell cat $(obj)/location.txt)
+#FIXME: location.txt might require an offset of header size
+
+#######################################################################
+# Build the bootblock
+
+$(obj)/coreboot.bootblock: $(obj)/bootblock.elf
+ @printf " OBJCOPY $(subst $(obj)/,,$(@))\n"
+ $(OBJCOPY) -O binary $< $@
+
+bootblock_lds = $(src)/arch/x86/init/ldscript_failover.lb
+bootblock_lds += $(src)/cpu/x86/16bit/entry16.lds
+bootblock_lds += $(src)/cpu/x86/16bit/reset16.lds
+bootblock_lds += $(src)/arch/x86/lib/id.lds
+bootblock_lds += $(chipset_bootblock_lds)
+
+bootblock_inc = $(src)/arch/x86/init/prologue.inc
+bootblock_inc += $(src)/cpu/x86/16bit/entry16.inc
+bootblock_inc += $(src)/cpu/x86/16bit/reset16.inc
+bootblock_inc += $(src)/cpu/x86/32bit/entry32.inc
+bootblock_inc += $(src)/arch/x86/lib/id.inc
+bootblock_inc += $(chipset_bootblock_inc)
+
+ifeq ($(CONFIG_SSE),y)
+bootblock_inc += $(src)/cpu/x86/sse_enable.inc
+endif
+bootblock_inc += $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc
+bootblock_inc += $(src)/arch/x86/lib/walkcbfs.S
+
+bootblock_romccflags := -mcpu=i386 -O2 -D__PRE_RAM__
+ifeq ($(CONFIG_SSE),y)
+bootblock_romccflags := -mcpu=k7 -msse -O2 -D__PRE_RAM__
endif
+$(obj)/bootblock/ldscript.ld: $$(bootblock_lds) $(obj)/ldoptions
+ @printf " GEN $(subst $(obj)/,,$(@))\n"
+ mkdir -p $(obj)/bootblock
+ printf '$(foreach ldscript,ldoptions $(bootblock_lds),INCLUDE "$(ldscript)"\n)' > $@
+
+$(obj)/bootblock/bootblock.S: $$(bootblock_inc)
+ @printf " GEN $(subst $(obj)/,,$(@))\n"
+ mkdir -p $(obj)/bootblock
+ printf '$(foreach crt0,$(bootblock_inc),#include "$(crt0)"\n)' > $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.o: $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.s
+ @printf " CC $(subst $(obj)/,,$(@))\n"
+ $(CC) -I$(obj) -Wa,-acdlns -c -o $@ $< > $(dir $@)/crt0.disasm
+
+$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.s: $(obj)/bootblock/bootblock.S $(obj)/config.h $(obj)/build.h
+ @printf " CC $(subst $(obj)/,,$(@))\n"
+ $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -I$(obj)/bootblock -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc: $(src)/arch/x86/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc $(OPTION_TABLE_H)
+ @printf " ROMCC $(subst $(obj)/,,$(@))\n"
+ $(CC) -MM -MT$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc \
+ $< > $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc.d
+ $(ROMCC) -c -S $(bootblock_romccflags) $(ROMCCFLAGS) -I. $(INCLUDES) $< -o $@
+
+$(obj)/bootblock.elf: $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.o $(obj)/bootblock/ldscript.ld
+ @printf " LINK $(subst $(obj)/,,$(@))\n"
+ $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(obj)/bootblock/ldscript.ld $<
+ $(NM) -n $(obj)/bootblock.elf | sort > $(obj)/bootblock.map
+ $(OBJCOPY) --only-keep-debug $@ $(obj)/bootblock.debug
+ $(OBJCOPY) --strip-debug $@
+ $(OBJCOPY) --add-gnu-debuglink=$(obj)/bootblock.debug $@
+
+#######################################################################
+# Build the romstage
+$(obj)/coreboot.romstage: $(obj)/coreboot.pre1 $$(romstage-objs) $(obj)/romstage/ldscript.ld
+ @printf " LINK $(subst $(obj)/,,$(@))\n"
+ printf "CONFIG_ROMBASE = 0x0;\n" > $(obj)/location.ld
+ $(CC) -nostdlib -nostartfiles -static -o $(obj)/romstage.elf -L$(obj) -T $(obj)/romstage/ldscript.ld $(romstage-objs)
+ $(OBJCOPY) -O binary $(obj)/romstage.elf $(obj)/romstage.bin
+ printf "CONFIG_ROMBASE = 0x" > $(obj)/location.ld
+ $(CBFSTOOL) $(obj)/coreboot.pre1 locate $(obj)/romstage.bin $(CONFIG_CBFS_PREFIX)/romstage $(CONFIG_XIP_ROM_SIZE) > $(obj)/location.txt
+ cat $(obj)/location.txt >> $(obj)/location.ld
+ printf ';\n' >> $(obj)/location.ld
+ $(CC) -nostdlib -nostartfiles -static -o $(obj)/romstage.elf -L$(obj) -T $(obj)/romstage/ldscript.ld $(romstage-objs)
+ $(NM) -n $(obj)/romstage.elf | sort > $(obj)/romstage.map
+ $(OBJCOPY) --only-keep-debug $(obj)/romstage.elf $(obj)/romstage.debug
+ $(OBJCOPY) --strip-debug $(obj)/romstage.elf
+ $(OBJCOPY) --add-gnu-debuglink=$(obj)/romstage.debug $(obj)/romstage.elf
+ $(OBJCOPY) -O binary $(obj)/romstage.elf $@
+
+$(obj)/romstage/ldscript.ld: $$(ldscripts) $(obj)/ldoptions
+ @printf " GEN $(subst $(obj)/,,$(@))\n"
+ mkdir -p $(obj)/romstage
+ printf '$(foreach ldscript,ldoptions location.ld $(ldscripts),INCLUDE "$(ldscript:$(obj)/%=%)"\n)' > $@
+
+$(obj)/romstage/crt0.S: $$(crt0s)
+ @printf " GEN $(subst $(obj)/,,$(@))\n"
+ mkdir -p $(obj)/romstage
+ printf '$(foreach crt0,$(crt0s),#include "$(crt0:$(obj)/%=%)"\n)' > $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/crt0.romstage.o: $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s
+ @printf " CC $(subst $(obj)/,,$(@))\n"
+ $(CC) -I$(obj) -Wa,-acdlns -c -o $@ $< > $(dir $@)/crt0.disasm
+
+$(obj)/mainboard/$(MAINBOARDDIR)/crt0.s: $(obj)/romstage/crt0.S $(obj)/config.h $(obj)/build.h
+ @printf " CC $(subst $(obj)/,,$(@))\n"
+ $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -I$(obj)/romstage -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@
+
seabios:
$(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc \
HOSTCC="$(HOSTCC)" \
CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \
OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \
CONFIG_SEABIOS_MASTER=$(CONFIG_SEABIOS_MASTER) \
- CONFIG_SEABIOS_STABLE=$(CONFIG_SEABIOS_STABLE)
+ CONFIG_SEABIOS_STABLE=$(CONFIG_SEABIOS_STABLE) \
+ OUT=$(abspath $(obj))
+
+filo:
+ $(MAKE) -C payloads/external/FILO -f Makefile.inc \
+ HOSTCC="$(HOSTCC)" \
+ CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \
+ OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \
+ CONFIG_FILO_MASTER=$(CONFIG_FILO_MASTER) \
+ CONFIG_FILO_STABLE=$(CONFIG_FILO_STABLE)
projects / coreboot.git / blobdiff