Make PCI CONF2 support a compile time option

[coreboot.git] / src / arch / x86 / Kconfig

diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index a903827c1148cebf9143e4209b3b14b3e0b362b0..f49d09b8729f7945609c7a839e3b4895ad22742c 100644 (file)
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -8,10 +8,6 @@ config AP_IN_SIPI_WAIT
        default n
        depends on ARCH_X86
 
-config ROMBASE
-       hex
-       default 0xffff0000
-
 config RAMBASE
        hex
        default 0x100000
@@ -30,22 +26,12 @@ config MAX_REBOOT_CNT
        int
        default 3
 
-config TINY_BOOTBLOCK
-       bool
-       default n
-
-config BIG_BOOTBLOCK
-       bool
-       default n if TINY_BOOTBLOCK
-       default y
-
 # We had to rename the choice options under arch/ because otherwise
 # the options would conflict between different architectures despite
 # the if ARCH_xxx guarding the arch/xxx/Kconfig sourcing.
 choice
        prompt "Bootblock behaviour"
        default X86_BOOTBLOCK_SIMPLE
-       depends on TINY_BOOTBLOCK
 
 config X86_BOOTBLOCK_SIMPLE
        bool "Always load fallback"
@@ -63,7 +49,6 @@ config BOOTBLOCK_SOURCE
 config UPDATE_IMAGE
        bool "Update existing coreboot.rom image"
        default n
-       depends on TINY_BOOTBLOCK
        help
          If this option is enabled, no new coreboot.rom file
          is created. Instead it is expected that there already
@@ -91,4 +76,32 @@ config CMOS_DEFAULT_FILE
 config BOOTBLOCK_SOUTHBRIDGE_INIT
        string
 
+config HAVE_ARCH_MEMSET
+       bool
+       default y
+
+config HAVE_ARCH_MEMCPY
+       bool
+       default y
+
+config BIG_ENDIAN
+       bool
+       default n
+
+config LITTLE_ENDIAN
+       bool
+       default !BIG_ENDIAN
+
+config IOAPIC_INTERRUPTS_ON_FSB
+       bool
+       default y if !IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS
+
+config IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS
+       bool
+       default n
+
+config PCI_CONF2
+       bool
+       default n
+
 endmenu