Add support for Intel Panther Point PCH

[coreboot.git] / src / Kconfig

diff --git a/src/Kconfig b/src/Kconfig
index 64c359e8d05bd5c15fd6215d26ea83b053d6129c..b0261d90683e56d693fc933942ca0ee1d30dc374 100644 (file)
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -112,6 +112,21 @@ config INCLUDE_CONFIG_FILE
   help
     Include in CBFS the coreboot config file that was used to compile the ROM image
 
+config EARLY_CBMEM_INIT
+       bool "Initialize CBMEM while in ROM stage"
+       default n
+       help
+         Make coreboot initialize the cbmem structures while running in rom
+         stage. This could be useful when the rom stage wants to communicate
+         some, for instance, execution timestamps.
+
+config COLLECT_TIMESTAMPS
+       bool "Create a table of timestamps collected during boot"
+       depends on EARLY_CBMEM_INIT
+       help
+         Make coreboot create a table of timer id/timer value pairs to
+         allow measuring time spent at different phases of the boot
+         process.
 endmenu
 
 source src/mainboard/Kconfig
@@ -239,6 +254,10 @@ config IOAPIC
        bool
        default n
 
+config TPM
+       bool
+       default n
+
 # TODO: Can probably be removed once all chipsets have kconfig options for it.
 config VIDEO_MB
        int
@@ -444,7 +463,7 @@ config PAYLOAD_FILE
 
 config PAYLOAD_FILE
        depends on PAYLOAD_SEABIOS
-       default "payloads/external/SeaBIOS/seabios/out/bios.bin.elf"
+       default "$(obj)/seabios/out/bios.bin.elf"
 
 config PAYLOAD_FILE
        depends on PAYLOAD_FILO
@@ -570,7 +589,7 @@ menu "Debugging"
 # TODO: Better help text and detailed instructions.
 config GDB_STUB
        bool "GDB debugging support"
-       default y
+       default n
        help
          If enabled, you will be able to set breakpoints for gdb debugging.
          See src/arch/x86/lib/c_start.S for details.
@@ -843,6 +862,23 @@ config X86EMU_DEBUG_IO
 
          If unsure, say N.
 
+config DEBUG_TPM
+       bool "Output verbose TPM debug messages"
+       default n
+       depends on TPM
+       help
+         This option enables additional TPM related debug messages.
+
+if SOUTHBRIDGE_INTEL_BD82X6X && DEFAULT_CONSOLE_LOGLEVEL_8
+# Only visible with the right southbridge and loglevel.
+config DEBUG_INTEL_ME
+       bool "Verbose logging for Intel Management Engine"
+       default n
+       help
+         Enable verbose logging for Intel Management Engine driver that
+         is present on Intel 6-series chipsets.
+endif
+
 config LLSHELL
        bool "Built-in low-level shell"
        default n
@@ -923,3 +959,4 @@ config POWER_BUTTON_IS_OPTIONAL
          Internal option that controls ENABLE_POWER_BUTTON visibility.
 
 source src/Kconfig.deprecated_options
+source src/vendorcode/Kconfig