/* * This file is part of the coreboot project. * * Copyright (C) 2007 Advanced Micro Devices, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ #include static void set_htic_bit(u8 i, u32 val, u8 bit) { u32 dword; dword = pci_read_config32(NODE_PCI(i, 0), HT_INIT_CONTROL); dword &= ~(1<node_id = i; ctrl->f0 = NODE_PCI(i, 0); ctrl->f1 = NODE_PCI(i, 1); ctrl->f2 = NODE_PCI(i, 2); ctrl->f3 = NODE_PCI(i, 3); ctrl->f4 = NODE_PCI(i, 4); ctrl->f5 = NODE_PCI(i, 5); if(spd_addr == (void *)0) continue; ctrl->spd_switch_addr = spd_addr[index++]; for(j=0; j < 8; j++) { ctrl->spd_addr[j] = spd_addr[index++]; } } }