coreboot-4.0-2039-gd16b170-dirty Wed Feb 8 18:07:46 CET 2012 starting... BSP Family_Model: 00100fa0 *sysinfo range: [000cc000,000cf360] bsp_apicid = 00 cpu_init_detectedx = 00000000 microcode: equivalent rev id = 0x10a0, current patch id = 0x00000000 microcode: patch id to apply = 0x010000bf microcode: updated to patch id = 0x010000bf success POST: 0x33 cpuSetAMDMSR done POST: 0x34 Enter amd_ht_init() Exit amd_ht_init() POST: 0x35 SB900 - Early.c - get_sbdn - Start. SB900 - Early.c - get_sbdn - End. cpuSetAMDPCI 00 done Prep FID/VID Node:00 P-state info in MSRC001_0064 is invalid !!! P-state info in MSRc0010064 is invalid !!! F3x80: e600e681 F3x84: 80e641e6 F3xD4: c8810f26 F3xD8: 03001016 F3xDC: 0000611a POST: 0x36 core0 started: start_other_cores() init node: 00 cores: 05 Start other core - nodeid: 00 cores: 05 POST: 0x37 started ap apicid: PPPPPOOOSOSOSSTSTT:TT:: : :0 0 x00x0xxx3333300000 ccc ccoooorrorreeeerxexxx:::x: : --- ----------- - {{{{ { AAAAAPPPPIIPIICCCCIIICIIDDDDI D ==== = 0000 10352 4 NNNN NOOOODDODDDEEEEIEIIIDDDIDD = === = 0 00000000 0CC CCOOOCOORRRREEREEIIIIEDIDDD D ==== = 000025013}4}}} } - ------------- - * AmimmmmPiiii c0rccccrr1orroooococcccoodoodddde:eeee:: :: eqeeeeqquqquuuuiviiiivvavvaaaalelllleeneennnnt tttt r rrrreveeeevv vv idiiiidd dd = == == 0x0000xx1xx11110a0000aa0aa0000,,,,, c ccuccuuuurrrrrrrrerreeeenntnnntt tt ppapppaataattttcchccchh hh iidiiidd dd == === 0 0000xx0xxx000000000000000000000000000000000000000 startmmemmmidiiiiccc ccrrrrr ooooocccccooooodddddeeeee::::: pppppaaaaatttttccccchhhhh iiiiiddddd tttttooooo aaaaapppppppppplllllyyyyy ===== 00000xxxxx000001111100000000000000000000bbbbbfffff mmmm*miiiii ccAcccrrrrPr ooooocc0cccoooo2odddddeeeee::::: uuuuupppppdddddaaaaattttteeeeeddddd tttttooooo pppppaaaaatttttccccchhhhh iiiiiddddd ===== 00000xxxxx000001111100000000000000000000bbbbbfffff sssssuuuuucccccccccceeeeessssssssss sccctccppapppuuuurutSSSSSeeeeeettttdt AAAAAMM MMMDDDDDMMMMMSSSSSRRRRR * AP d0ddddooo3oonnnnneeeee siiitiinnannniiiiritttttt__e___ffffdf iiiiidd dddvvvvviiiiiddddd_____aaaaappppp(((((ssssstttttaaaaagggggeeeee11111))))) aaaaapppppiiiiiccccciiiiiddddd::::: 0000043512 FFF*FFIIIII DADDDDVVVPVVIIIII D0DDDD 4 ooooonnnnn AAAAAPPPPP::::: 0000024351 started * AP 05started POST: 0x38 cimx/rd890 early.c nb_Poweron_Init() Start cimx/rd890 early.c nb_Poweron_Init() End. return status=0 Begin FIDVID MSR 0xc0010071 0x31c20031 0x40013440 POST: 0x39 FIDVID on BSP, APIC_id: 00 BSP fid = 0 Wait for AP stage 1: ap_apicid = 1 readback = 1000001 common_fid(packed) = 0 Wait for AP stage 1: ap_apicid = 2 readback = 2000001 common_fid(packed) = 0 Wait for AP stage 1: ap_apicid = 3 readback = 3000001 common_fid(packed) = 0 Wait for AP stage 1: ap_apicid = 4 readback = 4000001 common_fid(packed) = 0 Wait for AP stage 1: ap_apicid = 5 readback = 5000001 common_fid(packed) = 0 common_fid = 0 POST: 0x3a End FIDVIDMSR 0xc0010071 0x31c20031 0x40013440 AmdHtInit status: 0 ...WARM RESET... coreboot-4.0-2039-gd16b170-dirty Wed Feb 8 18:07:46 CET 2012 starting... BSP Family_Model: 00100fa0 *sysinfo range: [000cc000,000cf360] bsp_apicid = 00 cpu_init_detectedx = 00000000 microcode: equivalent rev id = 0x10a0, current patch id = 0x00000000 microcode: patch id to apply = 0x010000bf microcode: updated to patch id = 0x010000bf success POST: 0x33 cpuSetAMDMSR done POST: 0x34 Enter amd_ht_init() Exit amd_ht_init() POST: 0x35 SB900 - Early.c - get_sbdn - Start. SB900 - Early.c - get_sbdn - End. cpuSetAMDPCI 00 done Prep FID/VID Node:00 P-state info in MSRC001_0064 is invalid !!! P-state info in MSRc0010064 is invalid !!! F3x80: e600e681 F3x84: 80e641e6 F3xD4: c8810f26 F3xD8: 03001016 F3xDC: 0000611a POST: 0x36 core0 started: start_other_cores() init node: 00 cores: 05 Start other core - nodeid: 00 cores: 05 POST: 0x37 started ap apicid: PPPPPOOOOOSSSSSTTTTT::::: 00000xxxxx3333300000 cccccooooorrrrreeeeexxxxx::::: --------------- {{{{{ AAAAAPPPPPIIIIICCCCCIIIIIDDDDD ===== 0000043215 NNNNNOOOOODDDDDEEEEEIIIIIDDDDD ===== 0000000000 CCCCCOOOOORRRRREEEEEIIIIIDDDDD ===== 0000014235}}}}} --------------- * AmmmmmPii cciiiccc0rr1oorrrooocccccooooddodeedde::ee :::e eqeeeqqqquuuuiiuiivvivaavvllaaaeelllneeennnnttttt rr reerrevvee vvv i iiiidddd d == ===00 x000xxxx111110000aa0a00aa0,,00,, ,c ccccuuuuurrrrrrrreerrenneettnnn ttt p pppaapaattatcctthhccc hhhi iiiiddddd == = == 00 xx0000xxx000000000000000000000000000000000000000 startemmmmmidiiiicccc crr rrrooooocccccooooodddddeeeee::::: pppppaaaaatttttccccchhhhh iiiiiddddd tttttooooo aaaaapppppppppplllllyyyyy ===== 00000xxxxx000001111100000000000000000000bbbbbfffff mmmmm*i iiiiccccAcrPrrrroooo occ0cccooooo2dddddeeeee::::: uuuuupppppdddddaaaaattttteeeeeddddd tttttooooo pppppaaaaatttttccccchhhhh iiiiiddddd ===== 00000xxxxx000001111100000000000000000000bbbbbfffff sssssuuuuucccccccccceeeeessssssssss sccccctppaupppSuuuurSSteSSteeeeettdAttMAAAA MMM DMMDDDDMMMMSSSSSRRRR R * AP 0 dd3dddooooonnnnneeeee siiiitninainnniiiirttt_ttt____effdifffdiiii dd vddivvvviiiidddd_d___s_stssstatttgaaaaeggggeee2e222 2 a apaaapipppciiiicccciiiiidddd:d:: :: 0 03000 5142 * AP 04started * AP 05started POST: 0x38 cimx/rd890 early.c nb_Poweron_Init() Start cimx/rd890 early.c nb_Poweron_Init() End. return status=0 Begin FIDVID MSR 0xc0010071 0x31c20031 0x40013440 POST: 0x39 POST: 0x3a End FIDVIDMSR 0xc0010071 0x31c20031 0x40013440 AmdHtInit status: 0 POST: 0x3b fill_mem_ctrl() POST: 0x40 raminit_amdmct() raminit_amdmct begin: SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - Start. DIMMPresence: DIMMValid=c DIMMPresence: DIMMPresent=c DIMMPresence: RegDIMMPresent=0 DIMMPresence: DimmECCPresent=0 DIMMPresence: DimmPARPresent=0 DIMMPresence: Dimmx4Present=0 DIMMPresence: Dimmx8Present=c DIMMPresence: Dimmx16Present=0 DIMMPresence: DimmPlPresent=0 DIMMPresence: DimmDRPresent=c DIMMPresence: DimmQRPresent=0 DIMMPresence: DATAload[0]=2 DIMMPresence: MAload[0]=10 DIMMPresence: MAdimms[0]=1 DIMMPresence: DATAload[1]=2 DIMMPresence: MAload[1]=10 DIMMPresence: MAdimms[1]=1 DIMMPresence: Status 1000 DIMMPresence: ErrStatus 0 DIMMPresence: ErrCode 0 DIMMPresence: Done DCTInit_D: mct_DIMMPresence Done SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SPDCalcWidth: Status 1000 SPDCalcWidth: ErrStatus 0 SPDCalcWidth: ErrCode 0 SPDCalcWidth: Done DCTInit_D: mct_SPDCalcWidth Done SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SPDGetTCL_D: DIMMCASL 4 SPDGetTCL_D: DIMMAutoSpeed 4 SPDGetTCL_D: Status 1000 SPDGetTCL_D: ErrStatus 0 SPDGetTCL_D: ErrCode 0 SPDGetTCL_D: Done SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. AutoCycTiming: Status 1000 AutoCycTiming: ErrStatus 0 AutoCycTiming: ErrCode 0 AutoCycTiming: Done DCTInit_D: AutoCycTiming_D Done SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SPDSetBanks: CSPresent c SPDSetBanks: Status 1000 SPDSetBanks: ErrStatus 0 SPDSetBanks: ErrCode 0 SPDSetBanks: Done AfterStitch pDCTstat->NodeSysBase = 0 mct_AfterStitchMemory: pDCTstat->NodeSysLimit = ffffff StitchMemory: Status 1000 StitchMemory: ErrStatus 0 StitchMemory: ErrCode 0 StitchMemory: Done InterleaveBanks_D: Status 1000 InterleaveBanks_D: ErrStatus 0 InterleaveBanks_D: ErrCode 0 InterleaveBanks_D: Done AutoConfig_D: DramControl: 2a06 AutoConfig_D: DramTimingLo: 90092 AutoConfig_D: DramConfigMisc: 0 AutoConfig_D: DramConfigMisc2: 0 AutoConfig_D: DramConfigLo: 10000 AutoConfig_D: DramConfigHi: f40000b AutoConfig: Status 1000 AutoConfig: ErrStatus 0 AutoConfig: ErrCode 0 AutoConfig: Done DCTInit_D: AutoConfig_D Done DCTInit_D: PlatformSpec_D Done DCTInit_D: StartupDCT_D DCTInit_D: mct_DIMMPresence Done SPDCalcWidth: Status 1000 SPDCalcWidth: ErrStatus 0 SPDCalcWidth: ErrCode 0 SPDCalcWidth: Done DCTInit_D: mct_SPDCalcWidth Done SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. AutoCycTiming: Status 1000 AutoCycTiming: ErrStatus 0 AutoCycTiming: ErrCode 0 AutoCycTiming: Done DCTInit_D: AutoCycTiming_D Done SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SPDSetBanks: CSPresent c SPDSetBanks: Status 1000 SPDSetBanks: ErrStatus 0 SPDSetBanks: ErrCode 0 SPDSetBanks: Done AfterStitch pDCTstat->NodeSysBase = 0 mct_AfterStitchMemory: pDCTstat->NodeSysLimit = 1fffffe StitchMemory: Status 1000 StitchMemory: ErrStatus 0 StitchMemory: ErrCode 0 StitchMemory: Done InterleaveBanks_D: Status 1000 InterleaveBanks_D: ErrStatus 0 InterleaveBanks_D: ErrCode 0 InterleaveBanks_D: Done AutoConfig_D: DramControl: 2a06 AutoConfig_D: DramTimingLo: 90092 AutoConfig_D: DramConfigMisc: 0 AutoConfig_D: DramConfigMisc2: 0 AutoConfig_D: DramConfigLo: 10000 AutoConfig_D: DramConfigHi: f40000b AutoConfig: Status 1000 AutoConfig: ErrStatus 0 AutoConfig: ErrCode 0 AutoConfig: Done DCTInit_D: AutoConfig_D Done DCTInit_D: PlatformSpec_D Done DCTInit_D: StartupDCT_D mctAutoInitMCT_D: SyncDCTsReady_D mctAutoInitMCT_D: HTMemMapInit_D Node: 00 base: 00 limit: 1ffffff BottomIO: e00000 Node: 00 base: 03 limit: 21fffff Node: 01 base: 00 limit: 00 Node: 02 base: 00 limit: 00 Node: 03 base: 00 limit: 00 Node: 04 base: 00 limit: 00 Node: 05 base: 00 limit: 00 Node: 06 base: 00 limit: 00 Node: 07 base: 00 limit: 00 mctAutoInitMCT_D: CPUMemTyping_D CPUMemTyping: Cache32bTOP:e00000 CPUMemTyping: Bottom32bIO:e00000 CPUMemTyping: Bottom40bIO:2200000 mctAutoInitMCT_D: DQSTiming_D SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. SB900 - Smbus.c - do_smbus_read_byte - Start. SB900 - Smbus.c - do_smbus_read_byte - End. TrainRcvrEn: Status 1100 TrainRcvrEn: ErrStatus 0 TrainRcvrEn: ErrCode 0 TrainRcvrEn: Done TrainDQSRdWrPos: Status 1100 TrainDQSRdWrPos: TrainErrors 0 TrainDQSRdWrPos: ErrStatus 0 TrainDQSRdWrPos: ErrCode 0 TrainDQSRdWrPos: Done TrainDQSRdWrPos: Status 1100 TrainDQSRdWrPos: TrainErrors 0 TrainDQSRdWrPos: ErrStatus 0 TrainDQSRdWrPos: ErrCode 0 TrainDQSRdWrPos: Done TrainDQSRdWrPos: Status 1100 TrainDQSRdWrPos: TrainErrors 0 TrainDQSRdWrPos: ErrStatus 0 TrainDQSRdWrPos: ErrCode 0 TrainDQSRdWrPos: Done TrainDQSRdWrPos: Status 1100 TrainDQSRdWrPos: TrainErrors 0 TrainDQSRdWrPos: ErrStatus 0 TrainDQSRdWrPos: ErrCode 0 TrainDQSRdWrPos: Done mctAutoInitMCT_D: UMAMemTyping_D mctAutoInitMCT_D: :OtherTiming InterleaveNodes_D: Status 1100 InterleaveNodes_D: ErrStatus 0 InterleaveNodes_D: ErrCode 0 InterleaveNodes_D: Done InterleaveChannels_D: Node 0 InterleaveChannels_D: Status 1100 InterleaveChannels_D: ErrStatus 0 InterleaveChannels_D: ErrCode 0 InterleaveChannels_D: Node 1 InterleaveChannels_D: Status 1000 InterleaveChannels_D: ErrStatus 0 InterleaveChannels_D: ErrCode 0 InterleaveChannels_D: Node 2 InterleaveChannels_D: Status 1000 InterleaveChannels_D: ErrStatus 0 InterleaveChannels_D: ErrCode 0 InterleaveChannels_D: Node 3 InterleaveChannels_D: Status 1000 InterleaveChannels_D: ErrStatus 0 InterleaveChannels_D: ErrCode 0 InterleaveChannels_D: Node 4 InterleaveChannels_D: Status 1000 InterleaveChannels_D: ErrStatus 0 InterleaveChannels_D: ErrCode 0 InterleaveChannels_D: Node 5 InterleaveChannels_D: Status 1000 InterleaveChannels_D: ErrStatus 0 InterleaveChannels_D: ErrCode 0 InterleaveChannels_D: Node 6 InterleaveChannels_D: Status 1000 InterleaveChannels_D: ErrStatus 0 InterleaveChannels_D: ErrCode 0 InterleaveChannels_D: Node 7 InterleaveChannels_D: Status 1000 InterleaveChannels_D: ErrStatus 0 InterleaveChannels_D: ErrCode 0 InterleaveChannels_D: Done mctAutoInitMCT_D: ECCInit_D All Done raminit_amdmct end: POST: 0x41 POST: 0x42 v_esp=000cbef8 testx = 5a5a5a5a Copying data from cache to RAM -- switching to use RAM as stack... Done testx = 5a5a5a5a Disabling cache as ram now Clearing initial memory region: Done Loading image. Searching for fallback/coreboot_ram Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Stage: loading fallback/coreboot_ram @ 0x200000 (1310720 bytes), entry @ 0x200000 Stage: done loading. Jumping to image. POST: 0x80 POST: 0x39 coreboot-4.0-2039-gd16b170-dirty Wed Feb 8 18:07:46 CET 2012 booting... POST: 0x40 Enumerating buses... Show all devs...Before device enumeration. Root Device: enabled 1 APIC_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 PCI_DOMAIN: 0000: enabled 1 PCI: 00:18.0: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:00.1: enabled 0 PCI: 00:02.0: enabled 1 PCI: 00:03.0: enabled 0 PCI: 00:04.0: enabled 0 PCI: 00:05.0: enabled 0 PCI: 00:06.0: enabled 0 PCI: 00:07.0: enabled 0 PCI: 00:08.0: enabled 0 PCI: 00:09.0: enabled 0 PCI: 00:0a.0: enabled 0 PCI: 00:0b.0: enabled 0 PCI: 00:0c.0: enabled 0 PCI: 00:0d.0: enabled 1 PCI: 00:11.0: enabled 1 PCI: 00:12.0: enabled 1 PCI: 00:12.2: enabled 1 PCI: 00:13.0: enabled 1 PCI: 00:13.2: enabled 1 PCI: 00:14.0: enabled 1 I2C: 00:50: enabled 1 I2C: 00:51: enabled 1 I2C: 00:52: enabled 1 I2C: 00:53: enabled 1 PCI: 00:14.1: enabled 1 PCI: 00:14.2: enabled 1 PCI: 00:14.3: enabled 1 PNP: 002e.0: enabled 0 PNP: 002e.1: enabled 0 PNP: 002e.2: enabled 1 PNP: 002e.3: enabled 1 PNP: 002e.5: enabled 1 PNP: 002e.6: enabled 0 PNP: 002e.7: enabled 0 PNP: 002e.8: enabled 0 PNP: 002e.9: enabled 0 PNP: 002e.a: enabled 0 PNP: 002e.b: enabled 1 PCI: 00:14.4: enabled 0 PCI: 00:14.5: enabled 1 PCI: 00:14.6: enabled 0 PCI: 00:15.0: enabled 1 PCI: 00:15.1: enabled 1 PCI: 00:15.2: enabled 1 PCI: 00:15.3: enabled 1 PCI: 00:16.0: enabled 1 PCI: 00:16.2: enabled 1 PCI: 00:18.1: enabled 1 PCI: 00:18.2: enabled 1 PCI: 00:18.3: enabled 1 PCI: 00:18.4: enabled 1 Compare with tree... Root Device: enabled 1 APIC_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 PCI_DOMAIN: 0000: enabled 1 PCI: 00:18.0: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:00.1: enabled 0 PCI: 00:02.0: enabled 1 PCI: 00:03.0: enabled 0 PCI: 00:04.0: enabled 0 PCI: 00:05.0: enabled 0 PCI: 00:06.0: enabled 0 PCI: 00:07.0: enabled 0 PCI: 00:08.0: enabled 0 PCI: 00:09.0: enabled 0 PCI: 00:0a.0: enabled 0 PCI: 00:0b.0: enabled 0 PCI: 00:0c.0: enabled 0 PCI: 00:0d.0: enabled 1 PCI: 00:11.0: enabled 1 PCI: 00:12.0: enabled 1 PCI: 00:12.2: enabled 1 PCI: 00:13.0: enabled 1 PCI: 00:13.2: enabled 1 PCI: 00:14.0: enabled 1 I2C: 00:50: enabled 1 I2C: 00:51: enabled 1 I2C: 00:52: enabled 1 I2C: 00:53: enabled 1 PCI: 00:14.1: enabled 1 PCI: 00:14.2: enabled 1 PCI: 00:14.3: enabled 1 PNP: 002e.0: enabled 0 PNP: 002e.1: enabled 0 PNP: 002e.2: enabled 1 PNP: 002e.3: enabled 1 PNP: 002e.5: enabled 1 PNP: 002e.6: enabled 0 PNP: 002e.7: enabled 0 PNP: 002e.8: enabled 0 PNP: 002e.9: enabled 0 PNP: 002e.a: enabled 0 PNP: 002e.b: enabled 1 PCI: 00:14.4: enabled 0 PCI: 00:14.5: enabled 1 PCI: 00:14.6: enabled 0 PCI: 00:15.0: enabled 1 PCI: 00:15.1: enabled 1 PCI: 00:15.2: enabled 1 PCI: 00:15.3: enabled 1 PCI: 00:16.0: enabled 1 PCI: 00:16.2: enabled 1 PCI: 00:18.1: enabled 1 PCI: 00:18.2: enabled 1 PCI: 00:18.3: enabled 1 PCI: 00:18.4: enabled 1 Mainboard ASUS M5A99X-EVO Enable. dev=0x00239e38 scan_static_bus for Root Device APIC_CLUSTER: 0 enabled PCI_DOMAIN: 0000 enabled APIC_CLUSTER: 0 scanning... PCI: 00:18.3 siblings=5 CPU: APIC: 00 enabled CPU: APIC: 01 enabled CPU: APIC: 02 enabled CPU: APIC: 03 enabled CPU: APIC: 04 enabled CPU: APIC: 05 enabled PCI_DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 POST: 0x24 PCI: 00:18.0 [1022/1200] bus ops PCI: 00:18.0 [1022/1200] enabled PCI: 00:18.1 [1022/1201] enabled PCI: 00:18.2 [1022/1202] enabled PCI: 00:18.3 [1022/1203] ops PCI: 00:18.3 [1022/1203] enabled PCI: 00:18.4 [1022/1204] enabled POST: 0x25 PCI: Using configuration type 1 PCI: 00:00.0 [1002/5a14] ops PCI: 00:00.0 [1002/5a14] enabled Capability: type 0x08 @ 0xf0 flags: 0xa803 Capability: type 0x08 @ 0xf0 Capability: type 0x08 @ 0xc4 flags: 0x0281 PCI: pci_scan_bus for bus 00 PCI: pci_scan_bus limits devfn 0 - devfn ffffffff PCI: pci_scan_bus upper limit too big. Using 0xff. POST: 0x24 PCI: 00:00.0 [1002/5a14] enabled PCI: 00:11.0 [1002/4393] enabled PCI: 00:12.0 [1002/4397] enabled PCI: 00:12.2 [1002/4396] enabled PCI: 00:13.0 [1002/4397] enabled PCI: 00:13.2 [1002/4396] enabled PCI: 00:14.0 [1002/4385] enabled PCI: 00:14.1 [1002/439c] enabled PCI: 00:14.2 [1002/4383] enabled PCI: 00:14.3 [1002/439d] enabled PCI: 00:14.4 [1002/4384] enabled PCI: 00:14.5 [1002/4399] enabled PCI: 00:16.0 [1002/4397] enabled PCI: 00:16.2 [1002/4396] enabled PCI: 00:18.0 [1022/1200] bus ops PCI: 00:18.0 [1022/1200] enabled PCI: 00:18.1 [1022/1201] enabled PCI: 00:18.2 [1022/1202] enabled PCI: 00:18.3 [1022/1203] ops PCI: 00:18.3 [1022/1203] enabled PCI: 00:18.4 [1022/1204] enabled POST: 0x25 do_pci_scan_bridge for PCI: 00:14.4 PCI: pci_scan_bus for bus 01 POST: 0x24 POST: 0x25 PCI: pci_scan_bus returning with max=001 POST: 0x55 do_pci_scan_bridge returns max 1 PCI: pci_scan_bus returning with max=001 POST: 0x55 PCI: pci_scan_bus returning with max=001 POST: 0x55 PCI_DOMAIN: 0000 passpw: enabled scan_static_bus for Root Device done done POST: 0x66 Allocating resources... Reading resources... Root Device read_resources bus 0 link: 0 APIC_CLUSTER: 0 read_resources bus 0 link: 0 APIC: 00 missing read_resources APIC: 01 missing read_resources APIC: 02 missing read_resources APIC: 03 missing read_resources APIC: 04 missing read_resources APIC: 05 missing read_resources APIC_CLUSTER: 0 read_resources bus 0 link: 0 done PCI_DOMAIN: 0000 read_resources bus 0 link: 0 PCI: 00:18.0 read_resources bus 0 link: 0 PCI: 00:14.4 read_resources bus 1 link: 0 PCI: 00:14.4 read_resources bus 1 link: 0 done PCI: 00:18.0 read_resources bus 0 link: 0 done PCI: 00:18.0 read_resources bus 0 link: 1 PCI: 00:00.0 missing read_resources PCI: 00:02.0 missing read_resources PCI: 00:0d.0 missing read_resources PCI: 00:11.0 missing read_resources PCI: 00:12.0 missing read_resources PCI: 00:12.2 missing read_resources PCI: 00:13.0 missing read_resources PCI: 00:13.2 missing read_resources PCI: 00:14.0 missing read_resources PCI: 00:14.1 missing read_resources PCI: 00:14.2 missing read_resources PCI: 00:14.3 missing read_resources PCI: 00:14.5 missing read_resources PCI: 00:15.0 missing read_resources PCI: 00:15.1 missing read_resources PCI: 00:15.2 missing read_resources PCI: 00:15.3 missing read_resources PCI: 00:16.0 missing read_resources PCI: 00:16.2 missing read_resources PCI: 00:18.0 read_resources bus 0 link: 1 done PCI: 00:18.0 read_resources bus 0 link: 2 PCI: 00:18.0 read_resources bus 0 link: 2 done PCI: 00:18.0 read_resources bus 0 link: 3 PCI: 00:18.0 read_resources bus 0 link: 3 done PCI: 00:18.0 read_resources bus 0 link: 4 PCI: 00:18.0 read_resources bus 0 link: 4 done PCI: 00:18.0 read_resources bus 0 link: 5 PCI: 00:18.0 read_resources bus 0 link: 5 done PCI: 00:18.0 read_resources bus 0 link: 6 PCI: 00:18.0 read_resources bus 0 link: 6 done PCI: 00:18.0 read_resources bus 0 link: 7 PCI: 00:18.0 read_resources bus 0 link: 7 done PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done Done reading resources. Show resources in subtree (Root Device)...After reading. Root Device child on link 0 APIC_CLUSTER: 0 APIC_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 APIC: 01 APIC: 02 APIC: 03 APIC: 04 APIC: 05 PCI_DOMAIN: 0000 child on link 0 PCI: 00:18.0 PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 PCI_DOMAIN: 0000 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 PCI: 00:18.0 child on link 0 PCI: 00:00.0 PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 10d8 PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 10b8 PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 80200 index 10b0 PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 110d0 PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 110a8 PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 80200 index 110a0 PCI: 00:00.0 PCI: 00:00.0 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 1200 index fc PCI: 00:11.0 PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 PCI: 00:11.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 24 PCI: 00:12.0 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:12.2 PCI: 00:12.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 PCI: 00:13.0 PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:13.2 PCI: 00:13.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 PCI: 00:14.0 PCI: 00:14.1 PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c PCI: 00:14.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 PCI: 00:14.2 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 PCI: 00:14.3 PCI: 00:14.4 PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24 PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 00:14.5 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:16.0 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:16.2 PCI: 00:16.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 PCI: 00:18.0 PCI: 00:18.1 PCI: 00:18.2 PCI: 00:18.3 PCI: 00:18.3 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 200 index 94 PCI: 00:18.4 PCI: 00:00.0 PCI: 00:00.1 PCI: 00:02.0 PCI: 00:03.0 PCI: 00:04.0 PCI: 00:05.0 PCI: 00:06.0 PCI: 00:07.0 PCI: 00:08.0 PCI: 00:09.0 PCI: 00:0a.0 PCI: 00:0b.0 PCI: 00:0c.0 PCI: 00:0d.0 PCI: 00:11.0 PCI: 00:12.0 PCI: 00:12.2 PCI: 00:13.0 PCI: 00:13.2 PCI: 00:14.0 child on link 0 I2C: 00:50 I2C: 00:50 I2C: 00:51 I2C: 00:52 I2C: 00:53 PCI: 00:14.1 PCI: 00:14.2 PCI: 00:14.3 child on link 0 PNP: 002e.0 PNP: 002e.0 PNP: 002e.0 resource base 3f0 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.0 resource base 6 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.0 resource base 2 size 0 align 0 gran 0 limit 0 flags c0000800 index 74 PNP: 002e.1 PNP: 002e.1 resource base 378 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.1 resource base 7 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.2 PNP: 002e.2 resource base 3f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.2 resource base 4 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.3 PNP: 002e.3 resource base 2f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.3 resource base 3 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.5 PNP: 002e.5 resource base 60 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.5 resource base 64 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 PNP: 002e.5 resource base 1 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.5 resource base c size 0 align 0 gran 0 limit 0 flags c0000400 index 72 PNP: 002e.6 PNP: 002e.6 resource base 100 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 PNP: 002e.7 PNP: 002e.7 resource base 220 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.7 resource base 300 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 PNP: 002e.7 resource base 9 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.8 PNP: 002e.9 PNP: 002e.a PNP: 002e.b PNP: 002e.b resource base 290 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.b resource base 5 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PCI: 00:14.4 PCI: 00:14.5 PCI: 00:14.6 PCI: 00:15.0 PCI: 00:15.1 PCI: 00:15.2 PCI: 00:15.3 PCI: 00:16.0 PCI: 00:16.2 PCI: 00:18.1 PCI: 00:18.2 PCI: 00:18.3 PCI: 00:18.3 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 200 index 94 PCI: 00:18.4 PCI_DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff PCI: 00:18.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done PCI: 00:11.0 20 * [0x0 - 0xf] io PCI: 00:14.1 20 * [0x10 - 0x1f] io PCI: 00:11.0 10 * [0x20 - 0x27] io PCI: 00:11.0 18 * [0x28 - 0x2f] io PCI: 00:14.1 10 * [0x30 - 0x37] io PCI: 00:14.1 18 * [0x38 - 0x3f] io PCI: 00:11.0 14 * [0x40 - 0x43] io PCI: 00:11.0 1c * [0x44 - 0x47] io PCI: 00:14.1 14 * [0x48 - 0x4b] io PCI: 00:14.1 1c * [0x4c - 0x4f] io PCI: 00:18.0 compute_resources_io: base: 50 size: 1000 align: 12 gran: 12 limit: ffff done PCI: 00:18.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 00:18.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done PCI: 00:18.0 10d8 * [0x0 - 0xfff] io PCI_DOMAIN: 0000 compute_resources_io: base: 1000 size: 1000 align: 12 gran: 0 limit: ffff done PCI_DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff PCI: 00:18.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done PCI: 00:00.0 fc * [0x0 - 0xff] prefmem PCI: 00:18.0 compute_resources_prefmem: base: 100 size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:18.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done PCI: 00:18.3 94 * [0x0 - 0x3ffffff] mem PCI: 00:14.2 10 * [0x4000000 - 0x4003fff] mem PCI: 00:12.0 10 * [0x4004000 - 0x4004fff] mem PCI: 00:13.0 10 * [0x4005000 - 0x4005fff] mem PCI: 00:14.5 10 * [0x4006000 - 0x4006fff] mem PCI: 00:16.0 10 * [0x4007000 - 0x4007fff] mem PCI: 00:11.0 24 * [0x4008000 - 0x40083ff] mem PCI: 00:12.2 10 * [0x4008400 - 0x40084ff] mem PCI: 00:13.2 10 * [0x4008500 - 0x40085ff] mem PCI: 00:16.2 10 * [0x4008600 - 0x40086ff] mem PCI: 00:18.0 compute_resources_mem: base: 4008700 size: 4100000 align: 26 gran: 20 limit: ffffffff done PCI: 00:18.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff PCI: 00:18.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff done PCI: 00:18.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff PCI: 00:18.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff done PCI: 00:18.0 10b0 * [0x0 - 0x40fffff] mem PCI: 00:18.3 94 * [0x8000000 - 0xbffffff] mem PCI: 00:18.0 10b8 * [0xc000000 - 0xc0fffff] prefmem PCI_DOMAIN: 0000 compute_resources_mem: base: c100000 size: c100000 align: 26 gran: 0 limit: ffffffff done avoid_fixed_resources: PCI_DOMAIN: 0000 avoid_fixed_resources:@PCI_DOMAIN: 0000 10000000 limit 0000ffff avoid_fixed_resources:@PCI_DOMAIN: 0000 10000100 limit ffffffff constrain_resources: PCI_DOMAIN: 0000 constrain_resources: PCI: 00:18.0 constrain_resources: PCI: 00:00.0 constrain_resources: PCI: 00:11.0 constrain_resources: PCI: 00:12.0 constrain_resources: PCI: 00:12.2 constrain_resources: PCI: 00:13.0 constrain_resources: PCI: 00:13.2 constrain_resources: PCI: 00:14.0 constrain_resources: PCI: 00:14.1 constrain_resources: PCI: 00:14.2 constrain_resources: PCI: 00:14.3 constrain_resources: PCI: 00:14.4 constrain_resources: PCI: 00:14.5 constrain_resources: PCI: 00:16.0 constrain_resources: PCI: 00:16.2 constrain_resources: PCI: 00:18.0 constrain_resources: PCI: 00:18.1 constrain_resources: PCI: 00:18.2 constrain_resources: PCI: 00:18.3 constrain_resources: PCI: 00:18.4 constrain_resources: PCI: 00:00.0 constrain_resources: PCI: 00:02.0 constrain_resources: PCI: 00:0d.0 constrain_resources: PCI: 00:11.0 constrain_resources: PCI: 00:12.0 constrain_resources: PCI: 00:12.2 constrain_resources: PCI: 00:13.0 constrain_resources: PCI: 00:13.2 constrain_resources: PCI: 00:14.0 constrain_resources: I2C: 00:50 constrain_resources: I2C: 00:51 constrain_resources: I2C: 00:52 constrain_resources: I2C: 00:53 constrain_resources: PCI: 00:14.1 constrain_resources: PCI: 00:14.2 constrain_resources: PCI: 00:14.3 constrain_resources: PNP: 002e.2 skipping PNP: 002e.2@60 fixed resource, size=0! skipping PNP: 002e.2@70 fixed resource, size=0! constrain_resources: PNP: 002e.3 skipping PNP: 002e.3@60 fixed resource, size=0! skipping PNP: 002e.3@70 fixed resource, size=0! constrain_resources: PNP: 002e.5 skipping PNP: 002e.5@60 fixed resource, size=0! skipping PNP: 002e.5@62 fixed resource, size=0! skipping PNP: 002e.5@70 fixed resource, size=0! skipping PNP: 002e.5@72 fixed resource, size=0! constrain_resources: PNP: 002e.b skipping PNP: 002e.b@60 fixed resource, size=0! skipping PNP: 002e.b@70 fixed resource, size=0! constrain_resources: PCI: 00:14.5 constrain_resources: PCI: 00:15.0 constrain_resources: PCI: 00:15.1 constrain_resources: PCI: 00:15.2 constrain_resources: PCI: 00:15.3 constrain_resources: PCI: 00:16.0 constrain_resources: PCI: 00:16.2 constrain_resources: PCI: 00:18.1 constrain_resources: PCI: 00:18.2 constrain_resources: PCI: 00:18.3 constrain_resources: PCI: 00:18.4 avoid_fixed_resources2: PCI_DOMAIN: 0000@10000000 limit 0000ffff lim->base 00000000 lim->limit 0000ffff avoid_fixed_resources2: PCI_DOMAIN: 0000@10000100 limit ffffffff lim->base 00000000 lim->limit dfffffff Setting resources... PCI_DOMAIN: 0000 allocate_resources_io: base:0 size:1000 align:12 gran:0 limit:ffff Assigned: PCI: 00:18.0 10d8 * [0x0 - 0xfff] io PCI_DOMAIN: 0000 allocate_resources_io: next_base: 1000 size: 1000 align: 12 gran: 0 done PCI: 00:18.0 allocate_resources_io: base:0 size:1000 align:12 gran:12 limit:ffff Assigned: PCI: 00:11.0 20 * [0x0 - 0xf] io Assigned: PCI: 00:14.1 20 * [0x10 - 0x1f] io Assigned: PCI: 00:11.0 10 * [0x20 - 0x27] io Assigned: PCI: 00:11.0 18 * [0x28 - 0x2f] io Assigned: PCI: 00:14.1 10 * [0x30 - 0x37] io Assigned: PCI: 00:14.1 18 * [0x38 - 0x3f] io Assigned: PCI: 00:11.0 14 * [0x40 - 0x43] io Assigned: PCI: 00:11.0 1c * [0x44 - 0x47] io Assigned: PCI: 00:14.1 14 * [0x48 - 0x4b] io Assigned: PCI: 00:14.1 1c * [0x4c - 0x4f] io PCI: 00:18.0 allocate_resources_io: next_base: 50 size: 1000 align: 12 gran: 12 done PCI: 00:14.4 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:14.4 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done PCI: 00:18.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:18.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done PCI_DOMAIN: 0000 allocate_resources_mem: base:d0000000 size:c100000 align:26 gran:0 limit:dfffffff Assigned: PCI: 00:18.0 10b0 * [0xd0000000 - 0xd40fffff] mem Assigned: PCI: 00:18.3 94 * [0xd8000000 - 0xdbffffff] mem Assigned: PCI: 00:18.0 10b8 * [0xdc000000 - 0xdc0fffff] prefmem PCI_DOMAIN: 0000 allocate_resources_mem: next_base: dc100000 size: c100000 align: 26 gran: 0 done PCI: 00:18.0 allocate_resources_prefmem: base:dc000000 size:100000 align:20 gran:20 limit:dfffffff Assigned: PCI: 00:00.0 fc * [0xdc000000 - 0xdc0000ff] prefmem PCI: 00:18.0 allocate_resources_prefmem: next_base: dc000100 size: 100000 align: 20 gran: 20 done PCI: 00:14.4 allocate_resources_prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff PCI: 00:14.4 allocate_resources_prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done PCI: 00:18.0 allocate_resources_mem: base:d0000000 size:4100000 align:26 gran:20 limit:dfffffff Assigned: PCI: 00:18.3 94 * [0xd0000000 - 0xd3ffffff] mem Assigned: PCI: 00:14.2 10 * [0xd4000000 - 0xd4003fff] mem Assigned: PCI: 00:12.0 10 * [0xd4004000 - 0xd4004fff] mem Assigned: PCI: 00:13.0 10 * [0xd4005000 - 0xd4005fff] mem Assigned: PCI: 00:14.5 10 * [0xd4006000 - 0xd4006fff] mem Assigned: PCI: 00:16.0 10 * [0xd4007000 - 0xd4007fff] mem Assigned: PCI: 00:11.0 24 * [0xd4008000 - 0xd40083ff] mem Assigned: PCI: 00:12.2 10 * [0xd4008400 - 0xd40084ff] mem Assigned: PCI: 00:13.2 10 * [0xd4008500 - 0xd40085ff] mem Assigned: PCI: 00:16.2 10 * [0xd4008600 - 0xd40086ff] mem PCI: 00:18.0 allocate_resources_mem: next_base: d4008700 size: 4100000 align: 26 gran: 20 done PCI: 00:14.4 allocate_resources_mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff PCI: 00:14.4 allocate_resources_mem: next_base: dfffffff size: 0 align: 20 gran: 20 done PCI: 00:18.0 allocate_resources_prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff PCI: 00:18.0 allocate_resources_prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done PCI: 00:18.0 allocate_resources_mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff PCI: 00:18.0 allocate_resources_mem: next_base: dfffffff size: 0 align: 20 gran: 20 done Root Device assign_resources, bus 0 link: 0 split: 64K table at =cfff0000 0: mmio_basek=00340000, basek=00400000, limitk=00880000 PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:18.0 10d8 <- [0x0000000000 - 0x0000000fff] size 0x00001000 gran 0x0c io PCI: 00:18.0 10b8 <- [0x00dc000000 - 0x00dc0fffff] size 0x00100000 gran 0x14 prefmem PCI: 00:18.0 10b0 <- [0x00d0000000 - 0x00d40fffff] size 0x04100000 gran 0x14 mem PCI: 00:18.0 110d0 <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c io PCI: 00:18.0 110a8 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 prefmem PCI: 00:18.0 110a0 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 mem PCI: 00:18.0 assign_resources, bus 0 link: 0 PCI: 00:00.0 fc <- [0x00dc000000 - 0x00dc0000ff] size 0x00000100 gran 0x08 prefmem PCI: 00:11.0 10 <- [0x0000000020 - 0x0000000027] size 0x00000008 gran 0x03 io PCI: 00:11.0 14 <- [0x0000000040 - 0x0000000043] size 0x00000004 gran 0x02 io PCI: 00:11.0 18 <- [0x0000000028 - 0x000000002f] size 0x00000008 gran 0x03 io PCI: 00:11.0 1c <- [0x0000000044 - 0x0000000047] size 0x00000004 gran 0x02 io PCI: 00:11.0 20 <- [0x0000000000 - 0x000000000f] size 0x00000010 gran 0x04 io PCI: 00:11.0 24 <- [0x00d4008000 - 0x00d40083ff] size 0x00000400 gran 0x0a mem PCI: 00:12.0 10 <- [0x00d4004000 - 0x00d4004fff] size 0x00001000 gran 0x0c mem PCI: 00:12.2 10 <- [0x00d4008400 - 0x00d40084ff] size 0x00000100 gran 0x08 mem PCI: 00:13.0 10 <- [0x00d4005000 - 0x00d4005fff] size 0x00001000 gran 0x0c mem PCI: 00:13.2 10 <- [0x00d4008500 - 0x00d40085ff] size 0x00000100 gran 0x08 mem PCI: 00:14.1 10 <- [0x0000000030 - 0x0000000037] size 0x00000008 gran 0x03 io PCI: 00:14.1 14 <- [0x0000000048 - 0x000000004b] size 0x00000004 gran 0x02 io PCI: 00:14.1 18 <- [0x0000000038 - 0x000000003f] size 0x00000008 gran 0x03 io PCI: 00:14.1 1c <- [0x000000004c - 0x000000004f] size 0x00000004 gran 0x02 io PCI: 00:14.1 20 <- [0x0000000010 - 0x000000001f] size 0x00000010 gran 0x04 io PCI: 00:14.2 10 <- [0x00d4000000 - 0x00d4003fff] size 0x00004000 gran 0x0e mem64 PCI: 00:14.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io PCI: 00:14.4 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem PCI: 00:14.4 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 mem PCI: 00:14.5 10 <- [0x00d4006000 - 0x00d4006fff] size 0x00001000 gran 0x0c mem PCI: 00:16.0 10 <- [0x00d4007000 - 0x00d4007fff] size 0x00001000 gran 0x0c mem PCI: 00:16.2 10 <- [0x00d4008600 - 0x00d40086ff] size 0x00000100 gran 0x08 mem PCI: 00:18.3 94 <- [0x00d0000000 - 0x00d3ffffff] size 0x04000000 gran 0x1a mem PCI: 00:18.3 94 <- [0x00d0000000 - 0x00d3ffffff] size 0x04000000 gran 0x1a mem PCI: 00:18.0 assign_resources, bus 0 link: 0 PCI: 00:18.0 assign_resources, bus 0 link: 1 PCI: 00:18.0 assign_resources, bus 0 link: 1 PCI: 00:18.3 94 <- [0x00d8000000 - 0x00dbffffff] size 0x04000000 gran 0x1a mem PCI: 00:18.3 94 <- [0x00d8000000 - 0x00dbffffff] size 0x04000000 gran 0x1a mem PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Show resources in subtree (Root Device)...After assigning values. Root Device child on link 0 APIC_CLUSTER: 0 APIC_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 APIC: 01 APIC: 02 APIC: 03 APIC: 04 APIC: 05 PCI_DOMAIN: 0000 child on link 0 PCI: 00:18.0 PCI_DOMAIN: 0000 resource base 0 size 1000 align 12 gran 0 limit ffff flags 40040100 index 10000000 PCI_DOMAIN: 0000 resource base d0000000 size c100000 align 26 gran 0 limit dfffffff flags 40040200 index 10000100 PCI_DOMAIN: 0000 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 PCI_DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10 PCI_DOMAIN: 0000 resource base c0000 size cff40000 align 0 gran 0 limit 0 flags e0004200 index 20 PCI_DOMAIN: 0000 resource base 100000000 size 120000000 align 0 gran 0 limit 0 flags e0004200 index 30 PCI: 00:18.0 child on link 0 PCI: 00:00.0 PCI: 00:18.0 resource base 0 size 1000 align 12 gran 12 limit ffff flags 60080100 index 10d8 PCI: 00:18.0 resource base dc000000 size 100000 align 20 gran 20 limit dfffffff flags 60081200 index 10b8 PCI: 00:18.0 resource base d0000000 size 4100000 align 26 gran 20 limit dfffffff flags 60080200 index 10b0 PCI: 00:18.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080100 index 110d0 PCI: 00:18.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081200 index 110a8 PCI: 00:18.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080200 index 110a0 PCI: 00:00.0 PCI: 00:00.0 resource base dc000000 size 100 align 8 gran 8 limit dfffffff flags 60001200 index fc PCI: 00:11.0 PCI: 00:11.0 resource base 20 size 8 align 3 gran 3 limit ffff flags 60000100 index 10 PCI: 00:11.0 resource base 40 size 4 align 2 gran 2 limit ffff flags 60000100 index 14 PCI: 00:11.0 resource base 28 size 8 align 3 gran 3 limit ffff flags 60000100 index 18 PCI: 00:11.0 resource base 44 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 60000100 index 20 PCI: 00:11.0 resource base d4008000 size 400 align 10 gran 10 limit dfffffff flags 60000200 index 24 PCI: 00:12.0 PCI: 00:12.0 resource base d4004000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 10 PCI: 00:12.2 PCI: 00:12.2 resource base d4008400 size 100 align 8 gran 8 limit dfffffff flags 60000200 index 10 PCI: 00:13.0 PCI: 00:13.0 resource base d4005000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 10 PCI: 00:13.2 PCI: 00:13.2 resource base d4008500 size 100 align 8 gran 8 limit dfffffff flags 60000200 index 10 PCI: 00:14.0 PCI: 00:14.1 PCI: 00:14.1 resource base 30 size 8 align 3 gran 3 limit ffff flags 60000100 index 10 PCI: 00:14.1 resource base 48 size 4 align 2 gran 2 limit ffff flags 60000100 index 14 PCI: 00:14.1 resource base 38 size 8 align 3 gran 3 limit ffff flags 60000100 index 18 PCI: 00:14.1 resource base 4c size 4 align 2 gran 2 limit ffff flags 60000100 index 1c PCI: 00:14.1 resource base 10 size 10 align 4 gran 4 limit ffff flags 60000100 index 20 PCI: 00:14.2 PCI: 00:14.2 resource base d4000000 size 4000 align 14 gran 14 limit dfffffff flags 60000201 index 10 PCI: 00:14.3 PCI: 00:14.4 PCI: 00:14.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:14.4 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24 PCI: 00:14.4 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080202 index 20 PCI: 00:14.5 PCI: 00:14.5 resource base d4006000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 10 PCI: 00:16.0 PCI: 00:16.0 resource base d4007000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 10 PCI: 00:16.2 PCI: 00:16.2 resource base d4008600 size 100 align 8 gran 8 limit dfffffff flags 60000200 index 10 PCI: 00:18.0 PCI: 00:18.1 PCI: 00:18.2 PCI: 00:18.3 PCI: 00:18.3 resource base d0000000 size 4000000 align 26 gran 26 limit dfffffff flags 60000200 index 94 PCI: 00:18.4 PCI: 00:00.0 PCI: 00:00.1 PCI: 00:02.0 PCI: 00:03.0 PCI: 00:04.0 PCI: 00:05.0 PCI: 00:06.0 PCI: 00:07.0 PCI: 00:08.0 PCI: 00:09.0 PCI: 00:0a.0 PCI: 00:0b.0 PCI: 00:0c.0 PCI: 00:0d.0 PCI: 00:11.0 PCI: 00:12.0 PCI: 00:12.2 PCI: 00:13.0 PCI: 00:13.2 PCI: 00:14.0 child on link 0 I2C: 00:50 I2C: 00:50 I2C: 00:51 I2C: 00:52 I2C: 00:53 PCI: 00:14.1 PCI: 00:14.2 PCI: 00:14.3 child on link 0 PNP: 002e.0 PNP: 002e.0 PNP: 002e.0 resource base 3f0 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.0 resource base 6 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.0 resource base 2 size 0 align 0 gran 0 limit 0 flags c0000800 index 74 PNP: 002e.1 PNP: 002e.1 resource base 378 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.1 resource base 7 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.2 PNP: 002e.2 resource base 3f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.2 resource base 4 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.3 PNP: 002e.3 resource base 2f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.3 resource base 3 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.5 PNP: 002e.5 resource base 60 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.5 resource base 64 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 PNP: 002e.5 resource base 1 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.5 resource base c size 0 align 0 gran 0 limit 0 flags c0000400 index 72 PNP: 002e.6 PNP: 002e.6 resource base 100 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 PNP: 002e.7 PNP: 002e.7 resource base 220 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.7 resource base 300 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 PNP: 002e.7 resource base 9 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.8 PNP: 002e.9 PNP: 002e.a PNP: 002e.b PNP: 002e.b resource base 290 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.b resource base 5 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PCI: 00:14.4 PCI: 00:14.5 PCI: 00:14.6 PCI: 00:15.0 PCI: 00:15.1 PCI: 00:15.2 PCI: 00:15.3 PCI: 00:16.0 PCI: 00:16.2 PCI: 00:18.1 PCI: 00:18.2 PCI: 00:18.3 PCI: 00:18.3 resource base d8000000 size 4000000 align 26 gran 26 limit dfffffff flags 60000200 index 94 PCI: 00:18.4 Done allocating resources. POST: 0x88 Enabling resources... PCI: 00:18.0 cmd <- 00 PCI: 00:18.1 subsystem <- 1043/843e PCI: 00:18.1 cmd <- 00 PCI: 00:18.2 subsystem <- 1043/843e PCI: 00:18.2 cmd <- 00 PCI: 00:18.3 cmd <- 00 PCI: 00:18.4 subsystem <- 1043/843e PCI: 00:18.4 cmd <- 00 PCI: 00:00.0 cmd <- 02 PCI: 00:11.0 cmd <- 03 PCI: 00:12.0 cmd <- 02 PCI: 00:12.2 cmd <- 02 PCI: 00:13.0 cmd <- 02 PCI: 00:13.2 cmd <- 02 PCI: 00:14.0 cmd <- 403 PCI: 00:14.1 cmd <- 01 PCI: 00:14.2 cmd <- 02 PCI: 00:14.3 cmd <- 0f PCI: 00:14.4 bridge ctrl <- 0003 PCI: 00:14.4 cmd <- 00 PCI: 00:14.5 cmd <- 02 PCI: 00:16.0 cmd <- 02 PCI: 00:16.2 cmd <- 02 PCI: 00:18.0 cmd <- 00 PCI: 00:18.1 cmd <- 00 PCI: 00:18.2 cmd <- 00 PCI: 00:18.3 cmd <- 00 PCI: 00:18.4 cmd <- 00 done. Initializing devices... Root Device init APIC_CLUSTER: 0 init start_eip=0x00006000, offset=0x00200000, code_size=0x0000005b Initializing CPU #0 CPU: vendor AMD device 100fa0 CPU: family 10, model 0a, stepping 00 nodeid = 00, coreid = 00 POST: 0x60 Enabling cache Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB ADDRESS_MASK_HIGH=0xffff Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB ADDRESS_MASK_HIGH=0xffff Setting variable MTRR 2, base: 3328MB, range: 256MB, type UC ADDRESS_MASK_HIGH=0xffff Setting variable MTRR 3, base: 3584MB, range: 512MB, type UC ADDRESS_MASK_HIGH=0xffff DONE variable MTRRs Clear out the extra MTRR's call enable_var_mtrr() Leave x86_setup_var_mtrrs POST: 0x6a MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled POST: 0x93 Setting up local apic... apic_id: 0x00 done. POST: 0x9b CPU model: AMD Processor model unknown siblings = 05, CPU #0 initialized Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 1. Sending STARTUP #1 to 1. After apic_write. Startup point 1. Waiting for send to finish... +After Startup.