1 coreboot-4.0-2039-gd16b170-dirty Wed Feb 8 18:07:46 CET 2012 starting...
\r
3 BSP Family_Model: 00100fa0
\r
4 *sysinfo range: [000cc000,000cf360]
\r
6 cpu_init_detectedx = 00000000
\r
7 microcode: equivalent rev id = 0x10a0, current patch id = 0x00000000
\r
8 microcode: patch id to apply = 0x010000bf
\r
9 microcode: updated to patch id = 0x010000bf success
\r
17 SB900 - Early.c - get_sbdn - Start.
\r
18 SB900 - Early.c - get_sbdn - End.
\r
19 cpuSetAMDPCI 00 done
\r
20 Prep FID/VID Node:00
\r
21 P-state info in MSRC001_0064 is invalid !!!
\r
22 P-state info in MSRc0010064 is invalid !!!
\r
31 init node: 00 cores: 05
\r
32 Start other core - nodeid: 00 cores: 05
\r
34 started ap apicid: PPPPPOOOSOOSSSSTTT:TT:::: 0 00x00xxxx3333300000
\r\r\r\r\r
39 c cccooocororrreeerexxxxe::x:: : -------------- -{{{ {{ AAAA PAPPPIIIPIICCCCICIIIDDDIDD = === = 0000345012 N NNNOONOODDDDOEEDEEIIIIEIDDDDD == == = 000000000 0 CCC CCOOOORRORREEEREEIIIIDDIDD D= === = 000030145}}}2}} - -------------
\r-
\r\r\r
44 * AmmmPmm iiiiicc0cccrrrr1rooooocccccooooodddddeeeee::::: eeeeeqqqqquuuuuiiiiivvvvvaaaaallllleeeeennnnnttttt rrrrreeeeevvvvv iiiiiddddd ===== 00000xxxxx1111100000aaaaa00000,,,,, cccccuuuuurrrrrrrrrreeeeennnnnttttt pppppaaaaatttttccccchhhhh iiiiiddddd ===== 00000xxxxx0000000000000000000000000000000000000000
\r\r\r\r\r
49 startemmmmmdiiiiicc
\rcccrrrr
50 rooooocccccooooodddddeeeee::::: pppppaaaaatttttccccchhhhh iiiiiddddd tttttooooo aaaaapppppppppplllllyyyyy ===== 00000xxxxx000001111100000000000000000000bbbbbfffff
\r\r\r\r\r
55 mmmm*miiiii cAccccrrrPrrooooo c0ccccooo2oodddddeeeee::::: uuuuupppppdddddaaaaattttteeeeeddddd tttttooooo pppppaaaaatttttccccchhhhh iiiiiddddd ===== 00000xxxxx000001111100000000000000000000bbbbbfffff sssssuuuuucccccccccceeeeessssssssss
\r\r\r\r\r
65 sccctccppapppuuuurutSSSSSeeeeeetttttdA
\rAAAAMMM
66 MMDDDDDMMMMMSSSSSRRRRR * AP d0ddddooo3oonnnnneeeee
\r\r\r\r\r
71 stiiiiinnnnnairiiiitttttt_____efdffffiii
\riiddddd
72 vvvvviiiiiddddd_____aaaaappppp(((((ssssstttttaaaaagggggeeeee11111))))) aaaaapppppiiiiiccccciiiiiddddd::::: 0000013524
\r\r\r\r\r
77 FFFF*F IIIIIDDADDDVVVVPV IIIIIDD0DDD 4 ooooonnnnn AAAAAPPPPP::::: 0000041352
\r\r\r\r\r
86 cimx/rd890 early.c nb_Poweron_Init() Start
\r
87 cimx/rd890 early.c nb_Poweron_Init() End. return status=0
\r
89 Begin FIDVID MSR 0xc0010071 0x31c20031 0x40013440
\r
91 FIDVID on BSP, APIC_id: 00
\r
93 Wait for AP stage 1: ap_apicid = 1
\r
95 common_fid(packed) = 0
\r
96 Wait for AP stage 1: ap_apicid = 2
\r
98 common_fid(packed) = 0
\r
99 Wait for AP stage 1: ap_apicid = 3
\r
101 common_fid(packed) = 0
\r
102 Wait for AP stage 1: ap_apicid = 4
\r
104 common_fid(packed) = 0
\r
105 Wait for AP stage 1: ap_apicid = 5
\r
107 common_fid(packed) = 0
\r
110 End FIDVIDMSR 0xc0010071 0x31c20031 0x40013440
\r
111 AmdHtInit status: 0
\r
117 coreboot-4.0-2039-gd16b170-dirty Wed Feb 8 18:07:46 CET 2012 starting...
\r
119 BSP Family_Model: 00100fa0
\r
120 *sysinfo range: [000cc000,000cf360]
\r
122 cpu_init_detectedx = 00000000
\r
123 microcode: equivalent rev id = 0x10a0, current patch id = 0x00000000
\r
124 microcode: patch id to apply = 0x010000bf
\r
125 microcode: updated to patch id = 0x010000bf success
\r
130 Enter amd_ht_init()
\r
133 SB900 - Early.c - get_sbdn - Start.
\r
134 SB900 - Early.c - get_sbdn - End.
\r
135 cpuSetAMDPCI 00 done
\r
136 Prep FID/VID Node:00
\r
137 P-state info in MSRC001_0064 is invalid !!!
\r
138 P-state info in MSRc0010064 is invalid !!!
\r
146 start_other_cores()
\r
147 init node: 00 cores: 05
\r
148 Start other core - nodeid: 00 cores: 05
\r
150 started ap apicid: PPPPPOOOOOSSSSSTTTTT::::: 00000xxxxx3333300000
\r\r\r\r\r
155 cccccooooorrrrreeeeexxxxx::::: --------------- {{{{{ AAAAAPPPPPIIIIICCCCCIIIIIDDDDD ===== 0000034215 NNNNNOOOOODDDDDEEEEEIIIIIDDDDD ===== 0000000000 CCCCCOOOOORRRRREEEEEIIIIIDDDDD ===== 0000021345}}}}} ---------------
\r\r\r\r\r
160 * AmmPmmmi iiiicccc0crr1rrrooooocccccooooodddddeeeee::::: eeeeeqqqqquuuuuiiiiivvvvvaaaaallllleeeeennnnnttttt rrrrreeeeevvvvv iiiiiddddd ===== 00000xxxxx1111100000aaaaa00000,,,,, cccccuuuuurrrrrrrrrreeeeennnnnttttt pppppaaaaatttttccccchhhhh iiiiiddddd ===== 00000xxxxx0000000000000000000000000000000000000000
\r\r\r\r\r
165 startemmmmmidiiiicccc
\rcr
166 rrrrooooocccccooooodddddeeeee::::: pppppaaaaatttttccccchhhhh iiiiiddddd tttttooooo aaaaapppppppppplllllyyyyy ===== 00000xxxxx000001111100000000000000000000bbbbbfffff
\r\r\r\r\r
171 mmmmm* iiiiiccccAcrPrrrroooo oc0ccccoooo2odddddeeeee::::: uuuuupppppdddddaaaaattttteeeeeddddd tttttooooo pppppaaaaatttttccccchhhhh iiiiiddddd ===== 00000xxxxx000001111100000000000000000000bbbbbfffff sssssuuuuucccccccccceeeeessssssssss
\r\r\r\r\r
181 stcccccpppppauuruuuSSSSSteeeeeedtttttAAA
\rAA
182 MMMMMDDDDDMMMMMSSSSSRRRRR * AP 0 dd3dddooooonnnnneeeee
\r\r\r\r\r
187 siiiitninainnniiiirttt_ttt____effdifffdiiii
\rdd
188 vddivvvviiiidddd_d___s_stssstatttgaaaaeggggeee2e222 2 a apaaapipppciiiicccciiiiidddd:d:: :: 0 05000
\r1342
197 cimx/rd890 early.c nb_Poweron_Init() Start
\r
198 cimx/rd890 early.c nb_Poweron_Init() End. return status=0
\r
200 Begin FIDVID MSR 0xc0010071 0x31c20031 0x40013440
\r
203 End FIDVIDMSR 0xc0010071 0x31c20031 0x40013440
\r
204 AmdHtInit status: 0
\r
209 raminit_amdmct begin:
\r
210 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
211 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
212 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
213 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
214 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
215 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
216 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
217 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
218 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
219 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
220 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
221 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
222 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
223 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
224 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
225 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
226 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
227 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
228 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
229 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
230 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
231 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
232 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
233 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
234 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
235 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
236 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
237 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
238 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
239 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
240 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
241 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
242 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
243 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
244 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
245 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
246 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
247 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
248 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
249 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
250 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
251 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
252 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
253 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
254 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
255 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
256 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
257 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
258 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
259 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
260 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
261 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
262 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
263 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
264 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
265 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
266 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
267 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
268 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
269 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
270 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
271 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
272 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
273 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
274 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
275 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
276 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
277 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
278 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
279 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
280 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
281 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
282 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
283 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
284 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
285 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
286 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
287 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
288 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
289 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
290 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
291 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
292 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
293 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
294 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
295 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
296 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
297 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
298 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
299 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
300 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
301 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
302 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
303 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
304 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
305 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
306 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
307 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
308 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
309 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
310 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
311 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
312 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
313 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
314 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
315 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
316 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
317 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
318 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
319 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
320 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
321 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
322 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
323 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
324 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
325 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
326 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
327 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
328 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
329 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
330 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
331 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
332 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
333 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
334 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
335 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
336 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
337 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
338 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
339 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
340 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
341 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
342 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
343 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
344 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
345 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
346 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
347 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
348 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
349 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
350 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
351 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
352 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
353 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
354 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
355 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
356 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
357 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
358 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
359 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
360 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
361 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
362 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
363 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
364 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
365 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
366 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
367 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
368 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
369 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
370 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
371 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
372 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
373 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
374 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
375 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
376 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
377 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
378 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
379 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
380 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
381 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
382 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
383 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
384 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
385 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
386 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
387 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
388 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
389 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
390 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
391 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
392 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
393 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
394 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
395 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
396 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
397 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
398 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
399 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
400 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
401 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
402 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
403 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
404 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
405 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
406 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
407 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
408 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
409 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
410 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
411 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
412 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
413 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
414 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
415 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
416 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
417 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
418 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
419 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
420 SB900 - Smbus.c - do_smbus_read_byte - Start.
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421 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
422 SB900 - Smbus.c - do_smbus_read_byte - Start.
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423 SB900 - Smbus.c - do_smbus_read_byte - End.
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424 SB900 - Smbus.c - do_smbus_read_byte - Start.
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425 SB900 - Smbus.c - do_smbus_read_byte - End.
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426 SB900 - Smbus.c - do_smbus_read_byte - Start.
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427 SB900 - Smbus.c - do_smbus_read_byte - End.
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428 SB900 - Smbus.c - do_smbus_read_byte - Start.
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429 SB900 - Smbus.c - do_smbus_read_byte - End.
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430 SB900 - Smbus.c - do_smbus_read_byte - Start.
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431 SB900 - Smbus.c - do_smbus_read_byte - End.
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432 SB900 - Smbus.c - do_smbus_read_byte - Start.
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433 SB900 - Smbus.c - do_smbus_read_byte - End.
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434 SB900 - Smbus.c - do_smbus_read_byte - Start.
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435 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
436 SB900 - Smbus.c - do_smbus_read_byte - Start.
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437 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
438 SB900 - Smbus.c - do_smbus_read_byte - Start.
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439 SB900 - Smbus.c - do_smbus_read_byte - End.
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440 SB900 - Smbus.c - do_smbus_read_byte - Start.
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441 SB900 - Smbus.c - do_smbus_read_byte - End.
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442 SB900 - Smbus.c - do_smbus_read_byte - Start.
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443 SB900 - Smbus.c - do_smbus_read_byte - End.
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444 SB900 - Smbus.c - do_smbus_read_byte - Start.
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445 SB900 - Smbus.c - do_smbus_read_byte - End.
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446 SB900 - Smbus.c - do_smbus_read_byte - Start.
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447 SB900 - Smbus.c - do_smbus_read_byte - End.
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448 SB900 - Smbus.c - do_smbus_read_byte - Start.
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449 SB900 - Smbus.c - do_smbus_read_byte - End.
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450 SB900 - Smbus.c - do_smbus_read_byte - Start.
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451 SB900 - Smbus.c - do_smbus_read_byte - End.
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452 SB900 - Smbus.c - do_smbus_read_byte - Start.
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453 SB900 - Smbus.c - do_smbus_read_byte - End.
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454 SB900 - Smbus.c - do_smbus_read_byte - Start.
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455 SB900 - Smbus.c - do_smbus_read_byte - End.
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456 SB900 - Smbus.c - do_smbus_read_byte - Start.
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457 SB900 - Smbus.c - do_smbus_read_byte - End.
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458 SB900 - Smbus.c - do_smbus_read_byte - Start.
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459 SB900 - Smbus.c - do_smbus_read_byte - End.
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460 SB900 - Smbus.c - do_smbus_read_byte - Start.
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461 SB900 - Smbus.c - do_smbus_read_byte - End.
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462 SB900 - Smbus.c - do_smbus_read_byte - Start.
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463 SB900 - Smbus.c - do_smbus_read_byte - End.
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464 SB900 - Smbus.c - do_smbus_read_byte - Start.
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465 SB900 - Smbus.c - do_smbus_read_byte - End.
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466 SB900 - Smbus.c - do_smbus_read_byte - Start.
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467 SB900 - Smbus.c - do_smbus_read_byte - End.
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468 SB900 - Smbus.c - do_smbus_read_byte - Start.
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469 SB900 - Smbus.c - do_smbus_read_byte - End.
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470 SB900 - Smbus.c - do_smbus_read_byte - Start.
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471 SB900 - Smbus.c - do_smbus_read_byte - End.
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472 SB900 - Smbus.c - do_smbus_read_byte - Start.
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473 SB900 - Smbus.c - do_smbus_read_byte - End.
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474 SB900 - Smbus.c - do_smbus_read_byte - Start.
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475 SB900 - Smbus.c - do_smbus_read_byte - End.
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476 SB900 - Smbus.c - do_smbus_read_byte - Start.
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477 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
478 SB900 - Smbus.c - do_smbus_read_byte - Start.
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479 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
480 SB900 - Smbus.c - do_smbus_read_byte - Start.
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481 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
482 SB900 - Smbus.c - do_smbus_read_byte - Start.
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483 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
484 SB900 - Smbus.c - do_smbus_read_byte - Start.
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485 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
486 SB900 - Smbus.c - do_smbus_read_byte - Start.
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487 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
488 SB900 - Smbus.c - do_smbus_read_byte - Start.
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489 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
490 SB900 - Smbus.c - do_smbus_read_byte - Start.
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491 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
492 SB900 - Smbus.c - do_smbus_read_byte - Start.
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493 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
494 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
495 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
496 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
497 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
498 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
499 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
500 SB900 - Smbus.c - do_smbus_read_byte - Start.
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501 SB900 - Smbus.c - do_smbus_read_byte - End.
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502 SB900 - Smbus.c - do_smbus_read_byte - Start.
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503 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
504 SB900 - Smbus.c - do_smbus_read_byte - Start.
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505 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
506 SB900 - Smbus.c - do_smbus_read_byte - Start.
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507 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
508 SB900 - Smbus.c - do_smbus_read_byte - Start.
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509 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
510 SB900 - Smbus.c - do_smbus_read_byte - Start.
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511 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
512 SB900 - Smbus.c - do_smbus_read_byte - Start.
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513 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
514 SB900 - Smbus.c - do_smbus_read_byte - Start.
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515 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
516 SB900 - Smbus.c - do_smbus_read_byte - Start.
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517 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
518 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
519 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
520 SB900 - Smbus.c - do_smbus_read_byte - Start.
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521 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
522 SB900 - Smbus.c - do_smbus_read_byte - Start.
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523 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
524 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
525 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
526 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
527 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
528 SB900 - Smbus.c - do_smbus_read_byte - Start.
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529 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
530 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
531 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
532 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
533 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
534 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
535 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
536 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
537 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
538 SB900 - Smbus.c - do_smbus_read_byte - Start.
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539 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
540 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
541 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
542 SB900 - Smbus.c - do_smbus_read_byte - Start.
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543 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
544 SB900 - Smbus.c - do_smbus_read_byte - Start.
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545 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
546 SB900 - Smbus.c - do_smbus_read_byte - Start.
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547 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
548 SB900 - Smbus.c - do_smbus_read_byte - Start.
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549 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
550 SB900 - Smbus.c - do_smbus_read_byte - Start.
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551 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
552 SB900 - Smbus.c - do_smbus_read_byte - Start.
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553 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
554 SB900 - Smbus.c - do_smbus_read_byte - Start.
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555 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
556 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
557 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
558 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
559 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
560 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
561 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
562 SB900 - Smbus.c - do_smbus_read_byte - Start.
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563 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
564 SB900 - Smbus.c - do_smbus_read_byte - Start.
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565 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
566 SB900 - Smbus.c - do_smbus_read_byte - Start.
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567 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
568 SB900 - Smbus.c - do_smbus_read_byte - Start.
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569 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
570 SB900 - Smbus.c - do_smbus_read_byte - Start.
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571 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
572 SB900 - Smbus.c - do_smbus_read_byte - Start.
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573 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
574 SB900 - Smbus.c - do_smbus_read_byte - Start.
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575 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
576 SB900 - Smbus.c - do_smbus_read_byte - Start.
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577 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
578 SB900 - Smbus.c - do_smbus_read_byte - Start.
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579 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
580 SB900 - Smbus.c - do_smbus_read_byte - Start.
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581 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
582 SB900 - Smbus.c - do_smbus_read_byte - Start.
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583 SB900 - Smbus.c - do_smbus_read_byte - End.
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584 SB900 - Smbus.c - do_smbus_read_byte - Start.
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585 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
586 SB900 - Smbus.c - do_smbus_read_byte - Start.
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587 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
588 SB900 - Smbus.c - do_smbus_read_byte - Start.
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589 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
590 SB900 - Smbus.c - do_smbus_read_byte - Start.
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591 SB900 - Smbus.c - do_smbus_read_byte - End.
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592 SB900 - Smbus.c - do_smbus_read_byte - Start.
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593 SB900 - Smbus.c - do_smbus_read_byte - End.
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594 SB900 - Smbus.c - do_smbus_read_byte - Start.
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595 SB900 - Smbus.c - do_smbus_read_byte - End.
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596 SB900 - Smbus.c - do_smbus_read_byte - Start.
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597 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
598 SB900 - Smbus.c - do_smbus_read_byte - Start.
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599 SB900 - Smbus.c - do_smbus_read_byte - End.
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600 SB900 - Smbus.c - do_smbus_read_byte - Start.
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601 SB900 - Smbus.c - do_smbus_read_byte - End.
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602 SB900 - Smbus.c - do_smbus_read_byte - Start.
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603 SB900 - Smbus.c - do_smbus_read_byte - End.
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604 SB900 - Smbus.c - do_smbus_read_byte - Start.
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605 SB900 - Smbus.c - do_smbus_read_byte - End.
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606 SB900 - Smbus.c - do_smbus_read_byte - Start.
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607 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
608 SB900 - Smbus.c - do_smbus_read_byte - Start.
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609 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
610 SB900 - Smbus.c - do_smbus_read_byte - Start.
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611 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
612 SB900 - Smbus.c - do_smbus_read_byte - Start.
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613 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
614 SB900 - Smbus.c - do_smbus_read_byte - Start.
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615 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
616 SB900 - Smbus.c - do_smbus_read_byte - Start.
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617 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
618 SB900 - Smbus.c - do_smbus_read_byte - Start.
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619 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
620 SB900 - Smbus.c - do_smbus_read_byte - Start.
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621 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
622 SB900 - Smbus.c - do_smbus_read_byte - Start.
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623 SB900 - Smbus.c - do_smbus_read_byte - End.
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624 SB900 - Smbus.c - do_smbus_read_byte - Start.
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625 SB900 - Smbus.c - do_smbus_read_byte - End.
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626 SB900 - Smbus.c - do_smbus_read_byte - Start.
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627 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
628 SB900 - Smbus.c - do_smbus_read_byte - Start.
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629 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
630 SB900 - Smbus.c - do_smbus_read_byte - Start.
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631 SB900 - Smbus.c - do_smbus_read_byte - End.
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632 SB900 - Smbus.c - do_smbus_read_byte - Start.
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633 SB900 - Smbus.c - do_smbus_read_byte - End.
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634 SB900 - Smbus.c - do_smbus_read_byte - Start.
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635 SB900 - Smbus.c - do_smbus_read_byte - End.
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636 SB900 - Smbus.c - do_smbus_read_byte - Start.
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637 SB900 - Smbus.c - do_smbus_read_byte - End.
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638 SB900 - Smbus.c - do_smbus_read_byte - Start.
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639 SB900 - Smbus.c - do_smbus_read_byte - End.
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640 SB900 - Smbus.c - do_smbus_read_byte - Start.
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641 SB900 - Smbus.c - do_smbus_read_byte - End.
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642 SB900 - Smbus.c - do_smbus_read_byte - Start.
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643 SB900 - Smbus.c - do_smbus_read_byte - End.
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644 SB900 - Smbus.c - do_smbus_read_byte - Start.
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645 SB900 - Smbus.c - do_smbus_read_byte - End.
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646 SB900 - Smbus.c - do_smbus_read_byte - Start.
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647 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
648 SB900 - Smbus.c - do_smbus_read_byte - Start.
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649 SB900 - Smbus.c - do_smbus_read_byte - End.
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650 SB900 - Smbus.c - do_smbus_read_byte - Start.
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651 SB900 - Smbus.c - do_smbus_read_byte - End.
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652 SB900 - Smbus.c - do_smbus_read_byte - Start.
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653 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
654 SB900 - Smbus.c - do_smbus_read_byte - Start.
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655 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
656 SB900 - Smbus.c - do_smbus_read_byte - Start.
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657 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
658 SB900 - Smbus.c - do_smbus_read_byte - Start.
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659 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
660 SB900 - Smbus.c - do_smbus_read_byte - Start.
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661 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
662 SB900 - Smbus.c - do_smbus_read_byte - Start.
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663 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
664 SB900 - Smbus.c - do_smbus_read_byte - Start.
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665 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
666 SB900 - Smbus.c - do_smbus_read_byte - Start.
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667 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
668 SB900 - Smbus.c - do_smbus_read_byte - Start.
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669 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
670 SB900 - Smbus.c - do_smbus_read_byte - Start.
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671 SB900 - Smbus.c - do_smbus_read_byte - End.
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672 SB900 - Smbus.c - do_smbus_read_byte - Start.
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673 SB900 - Smbus.c - do_smbus_read_byte - End.
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674 SB900 - Smbus.c - do_smbus_read_byte - Start.
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675 SB900 - Smbus.c - do_smbus_read_byte - End.
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676 SB900 - Smbus.c - do_smbus_read_byte - Start.
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677 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
678 SB900 - Smbus.c - do_smbus_read_byte - Start.
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679 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
680 SB900 - Smbus.c - do_smbus_read_byte - Start.
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681 SB900 - Smbus.c - do_smbus_read_byte - End.
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682 SB900 - Smbus.c - do_smbus_read_byte - Start.
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683 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
684 SB900 - Smbus.c - do_smbus_read_byte - Start.
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685 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
686 SB900 - Smbus.c - do_smbus_read_byte - Start.
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687 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
688 SB900 - Smbus.c - do_smbus_read_byte - Start.
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689 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
690 SB900 - Smbus.c - do_smbus_read_byte - Start.
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691 SB900 - Smbus.c - do_smbus_read_byte - End.
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692 SB900 - Smbus.c - do_smbus_read_byte - Start.
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693 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
694 SB900 - Smbus.c - do_smbus_read_byte - Start.
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695 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
696 SB900 - Smbus.c - do_smbus_read_byte - Start.
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697 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
698 SB900 - Smbus.c - do_smbus_read_byte - Start.
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699 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
700 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
701 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
702 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
703 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
704 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
705 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
706 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
707 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
708 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
709 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
710 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
711 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
712 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
713 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
714 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
715 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
716 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
717 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
718 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
719 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
720 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
721 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
722 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
723 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
724 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
725 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
726 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
727 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
728 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
729 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
730 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
731 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
732 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
733 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
734 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
735 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
736 DIMMPresence: DIMMValid=c
\r
737 DIMMPresence: DIMMPresent=c
\r
738 DIMMPresence: RegDIMMPresent=0
\r
739 DIMMPresence: DimmECCPresent=0
\r
740 DIMMPresence: DimmPARPresent=0
\r
741 DIMMPresence: Dimmx4Present=0
\r
742 DIMMPresence: Dimmx8Present=c
\r
743 DIMMPresence: Dimmx16Present=0
\r
744 DIMMPresence: DimmPlPresent=0
\r
745 DIMMPresence: DimmDRPresent=c
\r
746 DIMMPresence: DimmQRPresent=0
\r
747 DIMMPresence: DATAload[0]=2
\r
748 DIMMPresence: MAload[0]=10
\r
749 DIMMPresence: MAdimms[0]=1
\r
750 DIMMPresence: DATAload[1]=2
\r
751 DIMMPresence: MAload[1]=10
\r
752 DIMMPresence: MAdimms[1]=1
\r
753 DIMMPresence: Status 1000
\r
754 DIMMPresence: ErrStatus 0
\r
755 DIMMPresence: ErrCode 0
\r
758 DCTInit_D: mct_DIMMPresence Done
\r
759 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
760 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
761 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
762 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
763 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
764 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
765 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
766 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
767 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
768 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
769 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
770 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
771 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
772 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
773 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
774 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
775 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
776 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
777 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
778 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
779 SPDCalcWidth: Status 1000
\r
780 SPDCalcWidth: ErrStatus 0
\r
781 SPDCalcWidth: ErrCode 0
\r
783 DCTInit_D: mct_SPDCalcWidth Done
\r
784 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
785 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
786 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
787 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
788 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
789 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
790 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
791 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
792 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
793 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
794 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
795 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
796 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
797 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
798 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
799 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
800 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
801 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
802 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
803 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
804 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
805 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
806 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
807 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
808 SPDGetTCL_D: DIMMCASL 4
\r
809 SPDGetTCL_D: DIMMAutoSpeed 4
\r
810 SPDGetTCL_D: Status 1000
\r
811 SPDGetTCL_D: ErrStatus 0
\r
812 SPDGetTCL_D: ErrCode 0
\r
815 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
816 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
817 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
818 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
819 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
820 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
821 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
822 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
823 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
824 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
825 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
826 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
827 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
828 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
829 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
830 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
831 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
832 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
833 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
834 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
835 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
836 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
837 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
838 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
839 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
840 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
841 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
842 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
843 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
844 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
845 AutoCycTiming: Status 1000
\r
846 AutoCycTiming: ErrStatus 0
\r
847 AutoCycTiming: ErrCode 0
\r
848 AutoCycTiming: Done
\r
850 DCTInit_D: AutoCycTiming_D Done
\r
851 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
852 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
853 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
854 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
855 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
856 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
857 SPDSetBanks: CSPresent c
\r
858 SPDSetBanks: Status 1000
\r
859 SPDSetBanks: ErrStatus 0
\r
860 SPDSetBanks: ErrCode 0
\r
863 AfterStitch pDCTstat->NodeSysBase = 0
\r
864 mct_AfterStitchMemory: pDCTstat->NodeSysLimit = ffffff
\r
865 StitchMemory: Status 1000
\r
866 StitchMemory: ErrStatus 0
\r
867 StitchMemory: ErrCode 0
\r
870 InterleaveBanks_D: Status 1000
\r
871 InterleaveBanks_D: ErrStatus 0
\r
872 InterleaveBanks_D: ErrCode 0
\r
873 InterleaveBanks_D: Done
\r
875 AutoConfig_D: DramControl: 2a06
\r
876 AutoConfig_D: DramTimingLo: 90092
\r
877 AutoConfig_D: DramConfigMisc: 0
\r
878 AutoConfig_D: DramConfigMisc2: 0
\r
879 AutoConfig_D: DramConfigLo: 10000
\r
880 AutoConfig_D: DramConfigHi: f40000b
\r
881 AutoConfig: Status 1000
\r
882 AutoConfig: ErrStatus 0
\r
883 AutoConfig: ErrCode 0
\r
886 DCTInit_D: AutoConfig_D Done
\r
887 DCTInit_D: PlatformSpec_D Done
\r
888 DCTInit_D: StartupDCT_D
\r
889 DCTInit_D: mct_DIMMPresence Done
\r
890 SPDCalcWidth: Status 1000
\r
891 SPDCalcWidth: ErrStatus 0
\r
892 SPDCalcWidth: ErrCode 0
\r
894 DCTInit_D: mct_SPDCalcWidth Done
\r
895 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
896 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
897 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
898 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
899 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
900 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
901 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
902 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
903 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
904 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
905 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
906 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
907 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
908 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
909 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
910 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
911 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
912 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
913 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
914 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
915 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
916 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
917 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
918 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
919 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
920 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
921 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
922 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
923 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
924 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
925 AutoCycTiming: Status 1000
\r
926 AutoCycTiming: ErrStatus 0
\r
927 AutoCycTiming: ErrCode 0
\r
928 AutoCycTiming: Done
\r
930 DCTInit_D: AutoCycTiming_D Done
\r
931 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
932 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
933 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
934 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
935 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
936 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
937 SPDSetBanks: CSPresent c
\r
938 SPDSetBanks: Status 1000
\r
939 SPDSetBanks: ErrStatus 0
\r
940 SPDSetBanks: ErrCode 0
\r
943 AfterStitch pDCTstat->NodeSysBase = 0
\r
944 mct_AfterStitchMemory: pDCTstat->NodeSysLimit = 1fffffe
\r
945 StitchMemory: Status 1000
\r
946 StitchMemory: ErrStatus 0
\r
947 StitchMemory: ErrCode 0
\r
950 InterleaveBanks_D: Status 1000
\r
951 InterleaveBanks_D: ErrStatus 0
\r
952 InterleaveBanks_D: ErrCode 0
\r
953 InterleaveBanks_D: Done
\r
955 AutoConfig_D: DramControl: 2a06
\r
956 AutoConfig_D: DramTimingLo: 90092
\r
957 AutoConfig_D: DramConfigMisc: 0
\r
958 AutoConfig_D: DramConfigMisc2: 0
\r
959 AutoConfig_D: DramConfigLo: 10000
\r
960 AutoConfig_D: DramConfigHi: f40000b
\r
961 AutoConfig: Status 1000
\r
962 AutoConfig: ErrStatus 0
\r
963 AutoConfig: ErrCode 0
\r
966 DCTInit_D: AutoConfig_D Done
\r
967 DCTInit_D: PlatformSpec_D Done
\r
968 DCTInit_D: StartupDCT_D
\r
969 mctAutoInitMCT_D: SyncDCTsReady_D
\r
970 mctAutoInitMCT_D: HTMemMapInit_D
\r
971 Node: 00 base: 00 limit: 1ffffff BottomIO: e00000
\r
972 Node: 00 base: 03 limit: 21fffff
\r
973 Node: 01 base: 00 limit: 00
\r
974 Node: 02 base: 00 limit: 00
\r
975 Node: 03 base: 00 limit: 00
\r
976 Node: 04 base: 00 limit: 00
\r
977 Node: 05 base: 00 limit: 00
\r
978 Node: 06 base: 00 limit: 00
\r
979 Node: 07 base: 00 limit: 00
\r
980 mctAutoInitMCT_D: CPUMemTyping_D
\r
981 CPUMemTyping: Cache32bTOP:e00000
\r
982 CPUMemTyping: Bottom32bIO:e00000
\r
983 CPUMemTyping: Bottom40bIO:2200000
\r
984 mctAutoInitMCT_D: DQSTiming_D
\r
985 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
986 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
987 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
988 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
989 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
990 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
991 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
992 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
993 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
994 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
995 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
996 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
997 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
998 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
999 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1000 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1001 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1002 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1003 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1004 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1005 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1006 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1007 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1008 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1009 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1010 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1011 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1012 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1013 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1014 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1015 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1016 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1017 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1018 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1019 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1020 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1021 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1022 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1023 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1024 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1025 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1026 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1027 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1028 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1029 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1030 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1031 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1032 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1033 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1034 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1035 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1036 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1037 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1038 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1039 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1040 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1041 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1042 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1043 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1044 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1045 TrainRcvrEn: Status 1100
\r
1046 TrainRcvrEn: ErrStatus 0
\r
1047 TrainRcvrEn: ErrCode 0
\r
1050 TrainDQSRdWrPos: Status 1100
\r
1051 TrainDQSRdWrPos: TrainErrors 0
\r
1052 TrainDQSRdWrPos: ErrStatus 0
\r
1053 TrainDQSRdWrPos: ErrCode 0
\r
1054 TrainDQSRdWrPos: Done
\r
1056 TrainDQSRdWrPos: Status 1100
\r
1057 TrainDQSRdWrPos: TrainErrors 0
\r
1058 TrainDQSRdWrPos: ErrStatus 0
\r
1059 TrainDQSRdWrPos: ErrCode 0
\r
1060 TrainDQSRdWrPos: Done
\r
1062 TrainDQSRdWrPos: Status 1100
\r
1063 TrainDQSRdWrPos: TrainErrors 0
\r
1064 TrainDQSRdWrPos: ErrStatus 0
\r
1065 TrainDQSRdWrPos: ErrCode 0
\r
1066 TrainDQSRdWrPos: Done
\r
1068 TrainDQSRdWrPos: Status 1100
\r
1069 TrainDQSRdWrPos: TrainErrors 0
\r
1070 TrainDQSRdWrPos: ErrStatus 0
\r
1071 TrainDQSRdWrPos: ErrCode 0
\r
1072 TrainDQSRdWrPos: Done
\r
1074 mctAutoInitMCT_D: UMAMemTyping_D
\r
1075 mctAutoInitMCT_D: :OtherTiming
\r
1076 InterleaveNodes_D: Status 1100
\r
1077 InterleaveNodes_D: ErrStatus 0
\r
1078 InterleaveNodes_D: ErrCode 0
\r
1079 InterleaveNodes_D: Done
\r
1081 InterleaveChannels_D: Node 0
\r
1082 InterleaveChannels_D: Status 1100
\r
1083 InterleaveChannels_D: ErrStatus 0
\r
1084 InterleaveChannels_D: ErrCode 0
\r
1085 InterleaveChannels_D: Node 1
\r
1086 InterleaveChannels_D: Status 1000
\r
1087 InterleaveChannels_D: ErrStatus 0
\r
1088 InterleaveChannels_D: ErrCode 0
\r
1089 InterleaveChannels_D: Node 2
\r
1090 InterleaveChannels_D: Status 1000
\r
1091 InterleaveChannels_D: ErrStatus 0
\r
1092 InterleaveChannels_D: ErrCode 0
\r
1093 InterleaveChannels_D: Node 3
\r
1094 InterleaveChannels_D: Status 1000
\r
1095 InterleaveChannels_D: ErrStatus 0
\r
1096 InterleaveChannels_D: ErrCode 0
\r
1097 InterleaveChannels_D: Node 4
\r
1098 InterleaveChannels_D: Status 1000
\r
1099 InterleaveChannels_D: ErrStatus 0
\r
1100 InterleaveChannels_D: ErrCode 0
\r
1101 InterleaveChannels_D: Node 5
\r
1102 InterleaveChannels_D: Status 1000
\r
1103 InterleaveChannels_D: ErrStatus 0
\r
1104 InterleaveChannels_D: ErrCode 0
\r
1105 InterleaveChannels_D: Node 6
\r
1106 InterleaveChannels_D: Status 1000
\r
1107 InterleaveChannels_D: ErrStatus 0
\r
1108 InterleaveChannels_D: ErrCode 0
\r
1109 InterleaveChannels_D: Node 7
\r
1110 InterleaveChannels_D: Status 1000
\r
1111 InterleaveChannels_D: ErrStatus 0
\r
1112 InterleaveChannels_D: ErrCode 0
\r
1113 InterleaveChannels_D: Done
\r
1115 mctAutoInitMCT_D: ECCInit_D
\r
1117 raminit_amdmct end:
\r
1122 Copying data from cache to RAM -- switching to use RAM as stack... Done
\r
1124 Disabling cache as ram now
\r
1125 Clearing initial memory region: Done
\r
1127 Searching for fallback/coreboot_ram
\r
1128 Check cmos_layout.bin
\r
1129 Check fallback/romstage
\r
1130 Check fallback/coreboot_ram
\r
1131 Stage: loading fallback/coreboot_ram @ 0x200000 (1310720 bytes), entry @ 0x200000
\r
1132 Stage: done loading.
\r
1136 coreboot-4.0-2039-gd16b170-dirty Wed Feb 8 18:07:46 CET 2012 booting...
\r
1138 Enumerating buses...
\r
1139 Show all devs...Before device enumeration.
\r
1140 Root Device: enabled 1
\r
1141 APIC_CLUSTER: 0: enabled 1
\r
1142 APIC: 00: enabled 1
\r
1143 PCI_DOMAIN: 0000: enabled 1
\r
1144 PCI: 00:18.0: enabled 1
\r
1145 PCI: 00:00.0: enabled 1
\r
1146 PCI: 00:00.1: enabled 0
\r
1147 PCI: 00:02.0: enabled 1
\r
1148 PCI: 00:03.0: enabled 0
\r
1149 PCI: 00:04.0: enabled 0
\r
1150 PCI: 00:05.0: enabled 0
\r
1151 PCI: 00:06.0: enabled 0
\r
1152 PCI: 00:07.0: enabled 0
\r
1153 PCI: 00:08.0: enabled 0
\r
1154 PCI: 00:09.0: enabled 0
\r
1155 PCI: 00:0a.0: enabled 0
\r
1156 PCI: 00:0b.0: enabled 0
\r
1157 PCI: 00:0c.0: enabled 0
\r
1158 PCI: 00:0d.0: enabled 1
\r
1159 PCI: 00:11.0: enabled 1
\r
1160 PCI: 00:12.0: enabled 1
\r
1161 PCI: 00:12.2: enabled 1
\r
1162 PCI: 00:13.0: enabled 1
\r
1163 PCI: 00:13.2: enabled 1
\r
1164 PCI: 00:14.0: enabled 1
\r
1165 I2C: 00:50: enabled 1
\r
1166 I2C: 00:51: enabled 1
\r
1167 I2C: 00:52: enabled 1
\r
1168 I2C: 00:53: enabled 1
\r
1169 PCI: 00:14.1: enabled 1
\r
1170 PCI: 00:14.2: enabled 1
\r
1171 PCI: 00:14.3: enabled 1
\r
1172 PNP: 002e.0: enabled 0
\r
1173 PNP: 002e.1: enabled 0
\r
1174 PNP: 002e.2: enabled 1
\r
1175 PNP: 002e.3: enabled 1
\r
1176 PNP: 002e.5: enabled 1
\r
1177 PNP: 002e.6: enabled 0
\r
1178 PNP: 002e.7: enabled 0
\r
1179 PNP: 002e.8: enabled 0
\r
1180 PNP: 002e.9: enabled 0
\r
1181 PNP: 002e.a: enabled 0
\r
1182 PNP: 002e.b: enabled 1
\r
1183 PCI: 00:14.4: enabled 0
\r
1184 PCI: 00:14.5: enabled 1
\r
1185 PCI: 00:14.6: enabled 0
\r
1186 PCI: 00:15.0: enabled 1
\r
1187 PCI: 00:15.1: enabled 1
\r
1188 PCI: 00:15.2: enabled 1
\r
1189 PCI: 00:15.3: enabled 1
\r
1190 PCI: 00:16.0: enabled 1
\r
1191 PCI: 00:16.2: enabled 1
\r
1192 PCI: 00:18.1: enabled 1
\r
1193 PCI: 00:18.2: enabled 1
\r
1194 PCI: 00:18.3: enabled 1
\r
1195 PCI: 00:18.4: enabled 1
\r
1196 Compare with tree...
\r
1197 Root Device: enabled 1
\r
1198 APIC_CLUSTER: 0: enabled 1
\r
1199 APIC: 00: enabled 1
\r
1200 PCI_DOMAIN: 0000: enabled 1
\r
1201 PCI: 00:18.0: enabled 1
\r
1202 PCI: 00:00.0: enabled 1
\r
1203 PCI: 00:00.1: enabled 0
\r
1204 PCI: 00:02.0: enabled 1
\r
1205 PCI: 00:03.0: enabled 0
\r
1206 PCI: 00:04.0: enabled 0
\r
1207 PCI: 00:05.0: enabled 0
\r
1208 PCI: 00:06.0: enabled 0
\r
1209 PCI: 00:07.0: enabled 0
\r
1210 PCI: 00:08.0: enabled 0
\r
1211 PCI: 00:09.0: enabled 0
\r
1212 PCI: 00:0a.0: enabled 0
\r
1213 PCI: 00:0b.0: enabled 0
\r
1214 PCI: 00:0c.0: enabled 0
\r
1215 PCI: 00:0d.0: enabled 1
\r
1216 PCI: 00:11.0: enabled 1
\r
1217 PCI: 00:12.0: enabled 1
\r
1218 PCI: 00:12.2: enabled 1
\r
1219 PCI: 00:13.0: enabled 1
\r
1220 PCI: 00:13.2: enabled 1
\r
1221 PCI: 00:14.0: enabled 1
\r
1222 I2C: 00:50: enabled 1
\r
1223 I2C: 00:51: enabled 1
\r
1224 I2C: 00:52: enabled 1
\r
1225 I2C: 00:53: enabled 1
\r
1226 PCI: 00:14.1: enabled 1
\r
1227 PCI: 00:14.2: enabled 1
\r
1228 PCI: 00:14.3: enabled 1
\r
1229 PNP: 002e.0: enabled 0
\r
1230 PNP: 002e.1: enabled 0
\r
1231 PNP: 002e.2: enabled 1
\r
1232 PNP: 002e.3: enabled 1
\r
1233 PNP: 002e.5: enabled 1
\r
1234 PNP: 002e.6: enabled 0
\r
1235 PNP: 002e.7: enabled 0
\r
1236 PNP: 002e.8: enabled 0
\r
1237 PNP: 002e.9: enabled 0
\r
1238 PNP: 002e.a: enabled 0
\r
1239 PNP: 002e.b: enabled 1
\r
1240 PCI: 00:14.4: enabled 0
\r
1241 PCI: 00:14.5: enabled 1
\r
1242 PCI: 00:14.6: enabled 0
\r
1243 PCI: 00:15.0: enabled 1
\r
1244 PCI: 00:15.1: enabled 1
\r
1245 PCI: 00:15.2: enabled 1
\r
1246 PCI: 00:15.3: enabled 1
\r
1247 PCI: 00:16.0: enabled 1
\r
1248 PCI: 00:16.2: enabled 1
\r
1249 PCI: 00:18.1: enabled 1
\r
1250 PCI: 00:18.2: enabled 1
\r
1251 PCI: 00:18.3: enabled 1
\r
1252 PCI: 00:18.4: enabled 1
\r
1253 Mainboard ASUS M5A99X-EVO Enable. dev=0x00239e38
\r
1254 scan_static_bus for Root Device
\r
1255 APIC_CLUSTER: 0 enabled
\r
1256 PCI_DOMAIN: 0000 enabled
\r
1257 APIC_CLUSTER: 0 scanning...
\r
1258 PCI: 00:18.3 siblings=5
\r
1259 CPU: APIC: 00 enabled
\r
1260 CPU: APIC: 01 enabled
\r
1261 CPU: APIC: 02 enabled
\r
1262 CPU: APIC: 03 enabled
\r
1263 CPU: APIC: 04 enabled
\r
1264 CPU: APIC: 05 enabled
\r
1265 PCI_DOMAIN: 0000 scanning...
\r
1266 PCI: pci_scan_bus for bus 00
\r
1268 PCI: 00:18.0 [1022/1200] bus ops
\r
1269 PCI: 00:18.0 [1022/1200] enabled
\r
1270 PCI: 00:18.1 [1022/1201] enabled
\r
1271 PCI: 00:18.2 [1022/1202] enabled
\r
1272 PCI: 00:18.3 [1022/1203] ops
\r
1273 PCI: 00:18.3 [1022/1203] enabled
\r
1274 PCI: 00:18.4 [1022/1204] enabled
\r
1276 PCI: Using configuration type 1
\r
1277 PCI: 00:00.0 [1002/5a14] ops
\r
1278 PCI: 00:00.0 [1002/5a14] enabled
\r
1279 Capability: type 0x08 @ 0xf0
\r
1281 Capability: type 0x08 @ 0xf0
\r
1282 Capability: type 0x08 @ 0xc4
\r
1284 PCI: pci_scan_bus for bus 00
\r
1285 PCI: pci_scan_bus limits devfn 0 - devfn ffffffff
\r
1286 PCI: pci_scan_bus upper limit too big. Using 0xff.
\r
1288 PCI: 00:00.0 [1002/5a14] enabled
\r
1289 PCI: 00:11.0 [1002/4393] enabled
\r
1290 PCI: 00:12.0 [1002/4397] enabled
\r
1291 PCI: 00:12.2 [1002/4396] enabled
\r
1292 PCI: 00:13.0 [1002/4397] enabled
\r
1293 PCI: 00:13.2 [1002/4396] enabled
\r
1294 PCI: 00:14.0 [1002/4385] enabled
\r
1295 PCI: 00:14.1 [1002/439c] enabled
\r
1296 PCI: 00:14.2 [1002/4383] enabled
\r
1297 PCI: 00:14.3 [1002/439d] enabled
\r
1298 PCI: 00:14.4 [1002/4384] enabled
\r
1299 PCI: 00:14.5 [1002/4399] enabled
\r
1300 PCI: 00:16.0 [1002/4397] enabled
\r
1301 PCI: 00:16.2 [1002/4396] enabled
\r
1302 PCI: 00:18.0 [1022/1200] bus ops
\r
1303 PCI: 00:18.0 [1022/1200] enabled
\r
1304 PCI: 00:18.1 [1022/1201] enabled
\r
1305 PCI: 00:18.2 [1022/1202] enabled
\r
1306 PCI: 00:18.3 [1022/1203] ops
\r
1307 PCI: 00:18.3 [1022/1203] enabled
\r
1308 PCI: 00:18.4 [1022/1204] enabled
\r
1310 do_pci_scan_bridge for PCI: 00:14.4
\r
1311 PCI: pci_scan_bus for bus 01
\r
1314 PCI: pci_scan_bus returning with max=001
\r
1316 do_pci_scan_bridge returns max 1
\r
1317 PCI: pci_scan_bus returning with max=001
\r
1319 PCI: pci_scan_bus returning with max=001
\r
1321 PCI_DOMAIN: 0000 passpw: enabled
\r
1322 scan_static_bus for Root Device done
\r
1325 Allocating resources...
\r
1326 Reading resources...
\r
1327 Root Device read_resources bus 0 link: 0
\r
1328 APIC_CLUSTER: 0 read_resources bus 0 link: 0
\r
1329 APIC: 00 missing read_resources
\r
1330 APIC: 01 missing read_resources
\r
1331 APIC: 02 missing read_resources
\r
1332 APIC: 03 missing read_resources
\r
1333 APIC: 04 missing read_resources
\r
1334 APIC: 05 missing read_resources
\r
1335 APIC_CLUSTER: 0 read_resources bus 0 link: 0 done
\r
1336 PCI_DOMAIN: 0000 read_resources bus 0 link: 0
\r
1337 PCI: 00:18.0 read_resources bus 0 link: 0
\r
1338 PCI: 00:14.4 read_resources bus 1 link: 0
\r
1339 PCI: 00:14.4 read_resources bus 1 link: 0 done
\r
1340 PCI: 00:18.0 read_resources bus 0 link: 0 done
\r
1341 PCI: 00:18.0 read_resources bus 0 link: 1
\r
1342 PCI: 00:00.0 missing read_resources
\r
1343 PCI: 00:02.0 missing read_resources
\r
1344 PCI: 00:0d.0 missing read_resources
\r
1345 PCI: 00:11.0 missing read_resources
\r
1346 PCI: 00:12.0 missing read_resources
\r
1347 PCI: 00:12.2 missing read_resources
\r
1348 PCI: 00:13.0 missing read_resources
\r
1349 PCI: 00:13.2 missing read_resources
\r
1350 PCI: 00:14.0 missing read_resources
\r
1351 PCI: 00:14.1 missing read_resources
\r
1352 PCI: 00:14.2 missing read_resources
\r
1353 PCI: 00:14.3 missing read_resources
\r
1354 PCI: 00:14.5 missing read_resources
\r
1355 PCI: 00:15.0 missing read_resources
\r
1356 PCI: 00:15.1 missing read_resources
\r
1357 PCI: 00:15.2 missing read_resources
\r
1358 PCI: 00:15.3 missing read_resources
\r
1359 PCI: 00:16.0 missing read_resources
\r
1360 PCI: 00:16.2 missing read_resources
\r
1361 PCI: 00:18.0 read_resources bus 0 link: 1 done
\r
1362 PCI: 00:18.0 read_resources bus 0 link: 2
\r
1363 PCI: 00:18.0 read_resources bus 0 link: 2 done
\r
1364 PCI: 00:18.0 read_resources bus 0 link: 3
\r
1365 PCI: 00:18.0 read_resources bus 0 link: 3 done
\r
1366 PCI: 00:18.0 read_resources bus 0 link: 4
\r
1367 PCI: 00:18.0 read_resources bus 0 link: 4 done
\r
1368 PCI: 00:18.0 read_resources bus 0 link: 5
\r
1369 PCI: 00:18.0 read_resources bus 0 link: 5 done
\r
1370 PCI: 00:18.0 read_resources bus 0 link: 6
\r
1371 PCI: 00:18.0 read_resources bus 0 link: 6 done
\r
1372 PCI: 00:18.0 read_resources bus 0 link: 7
\r
1373 PCI: 00:18.0 read_resources bus 0 link: 7 done
\r
1374 PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done
\r
1375 Root Device read_resources bus 0 link: 0 done
\r
1376 Done reading resources.
\r
1377 Show resources in subtree (Root Device)...After reading.
\r
1378 Root Device child on link 0 APIC_CLUSTER: 0
\r
1379 APIC_CLUSTER: 0 child on link 0 APIC: 00
\r
1386 PCI_DOMAIN: 0000 child on link 0 PCI: 00:18.0
\r
1387 PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
\r
1388 PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
\r
1389 PCI_DOMAIN: 0000 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
\r
1390 PCI: 00:18.0 child on link 0 PCI: 00:00.0
\r
1391 PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 10d8
\r
1392 PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 10b8
\r
1393 PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 80200 index 10b0
\r
1394 PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 110d0
\r
1395 PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 110a8
\r
1396 PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 80200 index 110a0
\r
1398 PCI: 00:00.0 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 1200 index fc
\r
1400 PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
\r
1401 PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
\r
1402 PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
\r
1403 PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
\r
1404 PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
\r
1405 PCI: 00:11.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 24
\r
1407 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
\r
1409 PCI: 00:12.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
\r
1411 PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
\r
1413 PCI: 00:13.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
\r
1416 PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
\r
1417 PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
\r
1418 PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
\r
1419 PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
\r
1420 PCI: 00:14.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
\r
1422 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
\r
1425 PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
\r
1426 PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
\r
1427 PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
\r
1429 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
\r
1431 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
\r
1433 PCI: 00:16.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
\r
1438 PCI: 00:18.3 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 200 index 94
\r
1459 PCI: 00:14.0 child on link 0 I2C: 00:50
\r
1466 PCI: 00:14.3 child on link 0 PNP: 002e.0
\r
1468 PNP: 002e.0 resource base 3f0 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
1469 PNP: 002e.0 resource base 6 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
1470 PNP: 002e.0 resource base 2 size 0 align 0 gran 0 limit 0 flags c0000800 index 74
\r
1472 PNP: 002e.1 resource base 378 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
1473 PNP: 002e.1 resource base 7 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
1475 PNP: 002e.2 resource base 3f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
1476 PNP: 002e.2 resource base 4 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
1478 PNP: 002e.3 resource base 2f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
1479 PNP: 002e.3 resource base 3 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
1481 PNP: 002e.5 resource base 60 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
1482 PNP: 002e.5 resource base 64 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
\r
1483 PNP: 002e.5 resource base 1 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
1484 PNP: 002e.5 resource base c size 0 align 0 gran 0 limit 0 flags c0000400 index 72
\r
1486 PNP: 002e.6 resource base 100 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
\r
1488 PNP: 002e.7 resource base 220 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
1489 PNP: 002e.7 resource base 300 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
\r
1490 PNP: 002e.7 resource base 9 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
1495 PNP: 002e.b resource base 290 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
1496 PNP: 002e.b resource base 5 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
1509 PCI: 00:18.3 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 200 index 94
\r
1511 PCI_DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
\r
1512 PCI: 00:18.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
\r
1513 PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
\r
1514 PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
\r
1515 PCI: 00:11.0 20 * [0x0 - 0xf] io
\r
1516 PCI: 00:14.1 20 * [0x10 - 0x1f] io
\r
1517 PCI: 00:11.0 10 * [0x20 - 0x27] io
\r
1518 PCI: 00:11.0 18 * [0x28 - 0x2f] io
\r
1519 PCI: 00:14.1 10 * [0x30 - 0x37] io
\r
1520 PCI: 00:14.1 18 * [0x38 - 0x3f] io
\r
1521 PCI: 00:11.0 14 * [0x40 - 0x43] io
\r
1522 PCI: 00:11.0 1c * [0x44 - 0x47] io
\r
1523 PCI: 00:14.1 14 * [0x48 - 0x4b] io
\r
1524 PCI: 00:14.1 1c * [0x4c - 0x4f] io
\r
1525 PCI: 00:18.0 compute_resources_io: base: 50 size: 1000 align: 12 gran: 12 limit: ffff done
\r
1526 PCI: 00:18.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
\r
1527 PCI: 00:18.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
\r
1528 PCI: 00:18.0 10d8 * [0x0 - 0xfff] io
\r
1529 PCI_DOMAIN: 0000 compute_resources_io: base: 1000 size: 1000 align: 12 gran: 0 limit: ffff done
\r
1530 PCI_DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
\r
1531 PCI: 00:18.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff
\r
1532 PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
\r
1533 PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
\r
1534 PCI: 00:00.0 fc * [0x0 - 0xff] prefmem
\r
1535 PCI: 00:18.0 compute_resources_prefmem: base: 100 size: 100000 align: 20 gran: 20 limit: ffffffff done
\r
1536 PCI: 00:18.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff
\r
1537 PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
\r
1538 PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
\r
1539 PCI: 00:18.3 94 * [0x0 - 0x3ffffff] mem
\r
1540 PCI: 00:14.2 10 * [0x4000000 - 0x4003fff] mem
\r
1541 PCI: 00:12.0 10 * [0x4004000 - 0x4004fff] mem
\r
1542 PCI: 00:13.0 10 * [0x4005000 - 0x4005fff] mem
\r
1543 PCI: 00:14.5 10 * [0x4006000 - 0x4006fff] mem
\r
1544 PCI: 00:16.0 10 * [0x4007000 - 0x4007fff] mem
\r
1545 PCI: 00:11.0 24 * [0x4008000 - 0x40083ff] mem
\r
1546 PCI: 00:12.2 10 * [0x4008400 - 0x40084ff] mem
\r
1547 PCI: 00:13.2 10 * [0x4008500 - 0x40085ff] mem
\r
1548 PCI: 00:16.2 10 * [0x4008600 - 0x40086ff] mem
\r
1549 PCI: 00:18.0 compute_resources_mem: base: 4008700 size: 4100000 align: 26 gran: 20 limit: ffffffff done
\r
1550 PCI: 00:18.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff
\r
1551 PCI: 00:18.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff done
\r
1552 PCI: 00:18.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff
\r
1553 PCI: 00:18.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff done
\r
1554 PCI: 00:18.0 10b0 * [0x0 - 0x40fffff] mem
\r
1555 PCI: 00:18.3 94 * [0x8000000 - 0xbffffff] mem
\r
1556 PCI: 00:18.0 10b8 * [0xc000000 - 0xc0fffff] prefmem
\r
1557 PCI_DOMAIN: 0000 compute_resources_mem: base: c100000 size: c100000 align: 26 gran: 0 limit: ffffffff done
\r
1558 avoid_fixed_resources: PCI_DOMAIN: 0000
\r
1559 avoid_fixed_resources:@PCI_DOMAIN: 0000 10000000 limit 0000ffff
\r
1560 avoid_fixed_resources:@PCI_DOMAIN: 0000 10000100 limit ffffffff
\r
1561 constrain_resources: PCI_DOMAIN: 0000
\r
1562 constrain_resources: PCI: 00:18.0
\r
1563 constrain_resources: PCI: 00:00.0
\r
1564 constrain_resources: PCI: 00:11.0
\r
1565 constrain_resources: PCI: 00:12.0
\r
1566 constrain_resources: PCI: 00:12.2
\r
1567 constrain_resources: PCI: 00:13.0
\r
1568 constrain_resources: PCI: 00:13.2
\r
1569 constrain_resources: PCI: 00:14.0
\r
1570 constrain_resources: PCI: 00:14.1
\r
1571 constrain_resources: PCI: 00:14.2
\r
1572 constrain_resources: PCI: 00:14.3
\r
1573 constrain_resources: PCI: 00:14.4
\r
1574 constrain_resources: PCI: 00:14.5
\r
1575 constrain_resources: PCI: 00:16.0
\r
1576 constrain_resources: PCI: 00:16.2
\r
1577 constrain_resources: PCI: 00:18.0
\r
1578 constrain_resources: PCI: 00:18.1
\r
1579 constrain_resources: PCI: 00:18.2
\r
1580 constrain_resources: PCI: 00:18.3
\r
1581 constrain_resources: PCI: 00:18.4
\r
1582 constrain_resources: PCI: 00:00.0
\r
1583 constrain_resources: PCI: 00:02.0
\r
1584 constrain_resources: PCI: 00:0d.0
\r
1585 constrain_resources: PCI: 00:11.0
\r
1586 constrain_resources: PCI: 00:12.0
\r
1587 constrain_resources: PCI: 00:12.2
\r
1588 constrain_resources: PCI: 00:13.0
\r
1589 constrain_resources: PCI: 00:13.2
\r
1590 constrain_resources: PCI: 00:14.0
\r
1591 constrain_resources: I2C: 00:50
\r
1592 constrain_resources: I2C: 00:51
\r
1593 constrain_resources: I2C: 00:52
\r
1594 constrain_resources: I2C: 00:53
\r
1595 constrain_resources: PCI: 00:14.1
\r
1596 constrain_resources: PCI: 00:14.2
\r
1597 constrain_resources: PCI: 00:14.3
\r
1598 constrain_resources: PNP: 002e.2
\r
1599 skipping PNP: 002e.2@60 fixed resource, size=0!
\r
1600 skipping PNP: 002e.2@70 fixed resource, size=0!
\r
1601 constrain_resources: PNP: 002e.3
\r
1602 skipping PNP: 002e.3@60 fixed resource, size=0!
\r
1603 skipping PNP: 002e.3@70 fixed resource, size=0!
\r
1604 constrain_resources: PNP: 002e.5
\r
1605 skipping PNP: 002e.5@60 fixed resource, size=0!
\r
1606 skipping PNP: 002e.5@62 fixed resource, size=0!
\r
1607 skipping PNP: 002e.5@70 fixed resource, size=0!
\r
1608 skipping PNP: 002e.5@72 fixed resource, size=0!
\r
1609 constrain_resources: PNP: 002e.b
\r
1610 skipping PNP: 002e.b@60 fixed resource, size=0!
\r
1611 skipping PNP: 002e.b@70 fixed resource, size=0!
\r
1612 constrain_resources: PCI: 00:14.5
\r
1613 constrain_resources: PCI: 00:15.0
\r
1614 constrain_resources: PCI: 00:15.1
\r
1615 constrain_resources: PCI: 00:15.2
\r
1616 constrain_resources: PCI: 00:15.3
\r
1617 constrain_resources: PCI: 00:16.0
\r
1618 constrain_resources: PCI: 00:16.2
\r
1619 constrain_resources: PCI: 00:18.1
\r
1620 constrain_resources: PCI: 00:18.2
\r
1621 constrain_resources: PCI: 00:18.3
\r
1622 constrain_resources: PCI: 00:18.4
\r
1623 avoid_fixed_resources2: PCI_DOMAIN: 0000@10000000 limit 0000ffff
\r
1624 lim->base 00000000 lim->limit 0000ffff
\r
1625 avoid_fixed_resources2: PCI_DOMAIN: 0000@10000100 limit ffffffff
\r
1626 lim->base 00000000 lim->limit dfffffff
\r
1627 Setting resources...
\r
1628 PCI_DOMAIN: 0000 allocate_resources_io: base:0 size:1000 align:12 gran:0 limit:ffff
\r
1629 Assigned: PCI: 00:18.0 10d8 * [0x0 - 0xfff] io
\r
1630 PCI_DOMAIN: 0000 allocate_resources_io: next_base: 1000 size: 1000 align: 12 gran: 0 done
\r
1631 PCI: 00:18.0 allocate_resources_io: base:0 size:1000 align:12 gran:12 limit:ffff
\r
1632 Assigned: PCI: 00:11.0 20 * [0x0 - 0xf] io
\r
1633 Assigned: PCI: 00:14.1 20 * [0x10 - 0x1f] io
\r
1634 Assigned: PCI: 00:11.0 10 * [0x20 - 0x27] io
\r
1635 Assigned: PCI: 00:11.0 18 * [0x28 - 0x2f] io
\r
1636 Assigned: PCI: 00:14.1 10 * [0x30 - 0x37] io
\r
1637 Assigned: PCI: 00:14.1 18 * [0x38 - 0x3f] io
\r
1638 Assigned: PCI: 00:11.0 14 * [0x40 - 0x43] io
\r
1639 Assigned: PCI: 00:11.0 1c * [0x44 - 0x47] io
\r
1640 Assigned: PCI: 00:14.1 14 * [0x48 - 0x4b] io
\r
1641 Assigned: PCI: 00:14.1 1c * [0x4c - 0x4f] io
\r
1642 PCI: 00:18.0 allocate_resources_io: next_base: 50 size: 1000 align: 12 gran: 12 done
\r
1643 PCI: 00:14.4 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
\r
1644 PCI: 00:14.4 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
\r
1645 PCI: 00:18.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
\r
1646 PCI: 00:18.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
\r
1647 PCI_DOMAIN: 0000 allocate_resources_mem: base:d0000000 size:c100000 align:26 gran:0 limit:dfffffff
\r
1648 Assigned: PCI: 00:18.0 10b0 * [0xd0000000 - 0xd40fffff] mem
\r
1649 Assigned: PCI: 00:18.3 94 * [0xd8000000 - 0xdbffffff] mem
\r
1650 Assigned: PCI: 00:18.0 10b8 * [0xdc000000 - 0xdc0fffff] prefmem
\r
1651 PCI_DOMAIN: 0000 allocate_resources_mem: next_base: dc100000 size: c100000 align: 26 gran: 0 done
\r
1652 PCI: 00:18.0 allocate_resources_prefmem: base:dc000000 size:100000 align:20 gran:20 limit:dfffffff
\r
1653 Assigned: PCI: 00:00.0 fc * [0xdc000000 - 0xdc0000ff] prefmem
\r
1654 PCI: 00:18.0 allocate_resources_prefmem: next_base: dc000100 size: 100000 align: 20 gran: 20 done
\r
1655 PCI: 00:14.4 allocate_resources_prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
\r
1656 PCI: 00:14.4 allocate_resources_prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
\r
1657 PCI: 00:18.0 allocate_resources_mem: base:d0000000 size:4100000 align:26 gran:20 limit:dfffffff
\r
1658 Assigned: PCI: 00:18.3 94 * [0xd0000000 - 0xd3ffffff] mem
\r
1659 Assigned: PCI: 00:14.2 10 * [0xd4000000 - 0xd4003fff] mem
\r
1660 Assigned: PCI: 00:12.0 10 * [0xd4004000 - 0xd4004fff] mem
\r
1661 Assigned: PCI: 00:13.0 10 * [0xd4005000 - 0xd4005fff] mem
\r
1662 Assigned: PCI: 00:14.5 10 * [0xd4006000 - 0xd4006fff] mem
\r
1663 Assigned: PCI: 00:16.0 10 * [0xd4007000 - 0xd4007fff] mem
\r
1664 Assigned: PCI: 00:11.0 24 * [0xd4008000 - 0xd40083ff] mem
\r
1665 Assigned: PCI: 00:12.2 10 * [0xd4008400 - 0xd40084ff] mem
\r
1666 Assigned: PCI: 00:13.2 10 * [0xd4008500 - 0xd40085ff] mem
\r
1667 Assigned: PCI: 00:16.2 10 * [0xd4008600 - 0xd40086ff] mem
\r
1668 PCI: 00:18.0 allocate_resources_mem: next_base: d4008700 size: 4100000 align: 26 gran: 20 done
\r
1669 PCI: 00:14.4 allocate_resources_mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
\r
1670 PCI: 00:14.4 allocate_resources_mem: next_base: dfffffff size: 0 align: 20 gran: 20 done
\r
1671 PCI: 00:18.0 allocate_resources_prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
\r
1672 PCI: 00:18.0 allocate_resources_prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
\r
1673 PCI: 00:18.0 allocate_resources_mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
\r
1674 PCI: 00:18.0 allocate_resources_mem: next_base: dfffffff size: 0 align: 20 gran: 20 done
\r
1675 Root Device assign_resources, bus 0 link: 0
\r
1676 split: 64K table at =cfff0000
\r
1677 0: mmio_basek=00340000, basek=00400000, limitk=00880000
\r
1678 PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
\r
1679 PCI: 00:18.0 10d8 <- [0x0000000000 - 0x0000000fff] size 0x00001000 gran 0x0c io <node 0 link 0>
\r
1680 PCI: 00:18.0 10b8 <- [0x00dc000000 - 0x00dc0fffff] size 0x00100000 gran 0x14 prefmem <node 0 link 0>
\r
1681 PCI: 00:18.0 10b0 <- [0x00d0000000 - 0x00d40fffff] size 0x04100000 gran 0x14 mem <node 0 link 0>
\r
1682 PCI: 00:18.0 110d0 <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c io <node 0 link 1>
\r
1683 PCI: 00:18.0 110a8 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 prefmem <node 0 link 1>
\r
1684 PCI: 00:18.0 110a0 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 mem <node 0 link 1>
\r
1685 PCI: 00:18.0 assign_resources, bus 0 link: 0
\r
1686 PCI: 00:00.0 fc <- [0x00dc000000 - 0x00dc0000ff] size 0x00000100 gran 0x08 prefmem
\r
1687 PCI: 00:11.0 10 <- [0x0000000020 - 0x0000000027] size 0x00000008 gran 0x03 io
\r
1688 PCI: 00:11.0 14 <- [0x0000000040 - 0x0000000043] size 0x00000004 gran 0x02 io
\r
1689 PCI: 00:11.0 18 <- [0x0000000028 - 0x000000002f] size 0x00000008 gran 0x03 io
\r
1690 PCI: 00:11.0 1c <- [0x0000000044 - 0x0000000047] size 0x00000004 gran 0x02 io
\r
1691 PCI: 00:11.0 20 <- [0x0000000000 - 0x000000000f] size 0x00000010 gran 0x04 io
\r
1692 PCI: 00:11.0 24 <- [0x00d4008000 - 0x00d40083ff] size 0x00000400 gran 0x0a mem
\r
1693 PCI: 00:12.0 10 <- [0x00d4004000 - 0x00d4004fff] size 0x00001000 gran 0x0c mem
\r
1694 PCI: 00:12.2 10 <- [0x00d4008400 - 0x00d40084ff] size 0x00000100 gran 0x08 mem
\r
1695 PCI: 00:13.0 10 <- [0x00d4005000 - 0x00d4005fff] size 0x00001000 gran 0x0c mem
\r
1696 PCI: 00:13.2 10 <- [0x00d4008500 - 0x00d40085ff] size 0x00000100 gran 0x08 mem
\r
1697 PCI: 00:14.1 10 <- [0x0000000030 - 0x0000000037] size 0x00000008 gran 0x03 io
\r
1698 PCI: 00:14.1 14 <- [0x0000000048 - 0x000000004b] size 0x00000004 gran 0x02 io
\r
1699 PCI: 00:14.1 18 <- [0x0000000038 - 0x000000003f] size 0x00000008 gran 0x03 io
\r
1700 PCI: 00:14.1 1c <- [0x000000004c - 0x000000004f] size 0x00000004 gran 0x02 io
\r
1701 PCI: 00:14.1 20 <- [0x0000000010 - 0x000000001f] size 0x00000010 gran 0x04 io
\r
1702 PCI: 00:14.2 10 <- [0x00d4000000 - 0x00d4003fff] size 0x00004000 gran 0x0e mem64
\r
1703 PCI: 00:14.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
\r
1704 PCI: 00:14.4 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
\r
1705 PCI: 00:14.4 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 mem
\r
1706 PCI: 00:14.5 10 <- [0x00d4006000 - 0x00d4006fff] size 0x00001000 gran 0x0c mem
\r
1707 PCI: 00:16.0 10 <- [0x00d4007000 - 0x00d4007fff] size 0x00001000 gran 0x0c mem
\r
1708 PCI: 00:16.2 10 <- [0x00d4008600 - 0x00d40086ff] size 0x00000100 gran 0x08 mem
\r
1709 PCI: 00:18.3 94 <- [0x00d0000000 - 0x00d3ffffff] size 0x04000000 gran 0x1a mem <gart>
\r
1710 PCI: 00:18.3 94 <- [0x00d0000000 - 0x00d3ffffff] size 0x04000000 gran 0x1a mem <gart>
\r
1711 PCI: 00:18.0 assign_resources, bus 0 link: 0
\r
1712 PCI: 00:18.0 assign_resources, bus 0 link: 1
\r
1713 PCI: 00:18.0 assign_resources, bus 0 link: 1
\r
1714 PCI: 00:18.3 94 <- [0x00d8000000 - 0x00dbffffff] size 0x04000000 gran 0x1a mem <gart>
\r
1715 PCI: 00:18.3 94 <- [0x00d8000000 - 0x00dbffffff] size 0x04000000 gran 0x1a mem <gart>
\r
1716 PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
\r
1717 Root Device assign_resources, bus 0 link: 0
\r
1718 Done setting resources.
\r
1719 Show resources in subtree (Root Device)...After assigning values.
\r
1720 Root Device child on link 0 APIC_CLUSTER: 0
\r
1721 APIC_CLUSTER: 0 child on link 0 APIC: 00
\r
1728 PCI_DOMAIN: 0000 child on link 0 PCI: 00:18.0
\r
1729 PCI_DOMAIN: 0000 resource base 0 size 1000 align 12 gran 0 limit ffff flags 40040100 index 10000000
\r
1730 PCI_DOMAIN: 0000 resource base d0000000 size c100000 align 26 gran 0 limit dfffffff flags 40040200 index 10000100
\r
1731 PCI_DOMAIN: 0000 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
\r
1732 PCI_DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10
\r
1733 PCI_DOMAIN: 0000 resource base c0000 size cff40000 align 0 gran 0 limit 0 flags e0004200 index 20
\r
1734 PCI_DOMAIN: 0000 resource base 100000000 size 120000000 align 0 gran 0 limit 0 flags e0004200 index 30
\r
1735 PCI: 00:18.0 child on link 0 PCI: 00:00.0
\r
1736 PCI: 00:18.0 resource base 0 size 1000 align 12 gran 12 limit ffff flags 60080100 index 10d8
\r
1737 PCI: 00:18.0 resource base dc000000 size 100000 align 20 gran 20 limit dfffffff flags 60081200 index 10b8
\r
1738 PCI: 00:18.0 resource base d0000000 size 4100000 align 26 gran 20 limit dfffffff flags 60080200 index 10b0
\r
1739 PCI: 00:18.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080100 index 110d0
\r
1740 PCI: 00:18.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081200 index 110a8
\r
1741 PCI: 00:18.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080200 index 110a0
\r
1743 PCI: 00:00.0 resource base dc000000 size 100 align 8 gran 8 limit dfffffff flags 60001200 index fc
\r
1745 PCI: 00:11.0 resource base 20 size 8 align 3 gran 3 limit ffff flags 60000100 index 10
\r
1746 PCI: 00:11.0 resource base 40 size 4 align 2 gran 2 limit ffff flags 60000100 index 14
\r
1747 PCI: 00:11.0 resource base 28 size 8 align 3 gran 3 limit ffff flags 60000100 index 18
\r
1748 PCI: 00:11.0 resource base 44 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c
\r
1749 PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 60000100 index 20
\r
1750 PCI: 00:11.0 resource base d4008000 size 400 align 10 gran 10 limit dfffffff flags 60000200 index 24
\r
1752 PCI: 00:12.0 resource base d4004000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 10
\r
1754 PCI: 00:12.2 resource base d4008400 size 100 align 8 gran 8 limit dfffffff flags 60000200 index 10
\r
1756 PCI: 00:13.0 resource base d4005000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 10
\r
1758 PCI: 00:13.2 resource base d4008500 size 100 align 8 gran 8 limit dfffffff flags 60000200 index 10
\r
1761 PCI: 00:14.1 resource base 30 size 8 align 3 gran 3 limit ffff flags 60000100 index 10
\r
1762 PCI: 00:14.1 resource base 48 size 4 align 2 gran 2 limit ffff flags 60000100 index 14
\r
1763 PCI: 00:14.1 resource base 38 size 8 align 3 gran 3 limit ffff flags 60000100 index 18
\r
1764 PCI: 00:14.1 resource base 4c size 4 align 2 gran 2 limit ffff flags 60000100 index 1c
\r
1765 PCI: 00:14.1 resource base 10 size 10 align 4 gran 4 limit ffff flags 60000100 index 20
\r
1767 PCI: 00:14.2 resource base d4000000 size 4000 align 14 gran 14 limit dfffffff flags 60000201 index 10
\r
1770 PCI: 00:14.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
\r
1771 PCI: 00:14.4 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
\r
1772 PCI: 00:14.4 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080202 index 20
\r
1774 PCI: 00:14.5 resource base d4006000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 10
\r
1776 PCI: 00:16.0 resource base d4007000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 10
\r
1778 PCI: 00:16.2 resource base d4008600 size 100 align 8 gran 8 limit dfffffff flags 60000200 index 10
\r
1783 PCI: 00:18.3 resource base d0000000 size 4000000 align 26 gran 26 limit dfffffff flags 60000200 index 94
\r
1804 PCI: 00:14.0 child on link 0 I2C: 00:50
\r
1811 PCI: 00:14.3 child on link 0 PNP: 002e.0
\r
1813 PNP: 002e.0 resource base 3f0 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
1814 PNP: 002e.0 resource base 6 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
1815 PNP: 002e.0 resource base 2 size 0 align 0 gran 0 limit 0 flags c0000800 index 74
\r
1817 PNP: 002e.1 resource base 378 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
1818 PNP: 002e.1 resource base 7 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
1820 PNP: 002e.2 resource base 3f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
1821 PNP: 002e.2 resource base 4 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
1823 PNP: 002e.3 resource base 2f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
1824 PNP: 002e.3 resource base 3 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
1826 PNP: 002e.5 resource base 60 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
1827 PNP: 002e.5 resource base 64 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
\r
1828 PNP: 002e.5 resource base 1 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
1829 PNP: 002e.5 resource base c size 0 align 0 gran 0 limit 0 flags c0000400 index 72
\r
1831 PNP: 002e.6 resource base 100 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
\r
1833 PNP: 002e.7 resource base 220 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
1834 PNP: 002e.7 resource base 300 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
\r
1835 PNP: 002e.7 resource base 9 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
1840 PNP: 002e.b resource base 290 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
1841 PNP: 002e.b resource base 5 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
1854 PCI: 00:18.3 resource base d8000000 size 4000000 align 26 gran 26 limit dfffffff flags 60000200 index 94
\r
1856 Done allocating resources.
\r
1858 Enabling resources...
\r
1859 PCI: 00:18.0 cmd <- 00
\r
1860 PCI: 00:18.1 subsystem <- 1043/843e
\r
1861 PCI: 00:18.1 cmd <- 00
\r
1862 PCI: 00:18.2 subsystem <- 1043/843e
\r
1863 PCI: 00:18.2 cmd <- 00
\r
1864 PCI: 00:18.3 cmd <- 00
\r
1865 PCI: 00:18.4 subsystem <- 1043/843e
\r
1866 PCI: 00:18.4 cmd <- 00
\r
1867 PCI: 00:00.0 cmd <- 02
\r
1868 PCI: 00:11.0 cmd <- 03
\r
1869 PCI: 00:12.0 cmd <- 02
\r
1870 PCI: 00:12.2 cmd <- 02
\r
1871 PCI: 00:13.0 cmd <- 02
\r
1872 PCI: 00:13.2 cmd <- 02
\r
1873 PCI: 00:14.0 cmd <- 403
\r
1874 PCI: 00:14.1 cmd <- 01
\r
1875 PCI: 00:14.2 cmd <- 02
\r
1876 PCI: 00:14.3 cmd <- 0f
\r
1877 PCI: 00:14.4 bridge ctrl <- 0003
\r
1878 PCI: 00:14.4 cmd <- 00
\r
1879 PCI: 00:14.5 cmd <- 02
\r
1880 PCI: 00:16.0 cmd <- 02
\r
1881 PCI: 00:16.2 cmd <- 02
\r
1882 PCI: 00:18.0 cmd <- 00
\r
1883 PCI: 00:18.1 cmd <- 00
\r
1884 PCI: 00:18.2 cmd <- 00
\r
1885 PCI: 00:18.3 cmd <- 00
\r
1886 PCI: 00:18.4 cmd <- 00
\r
1888 Initializing devices...
\r
1890 APIC_CLUSTER: 0 init
\r
1891 start_eip=0x00006000, offset=0x00200000, code_size=0x0000005b
\r
1892 Initializing CPU #0
\r
1893 CPU: vendor AMD device 100fa0
\r
1894 CPU: family 10, model 0a, stepping 00
\r
1895 nodeid = 00, coreid = 00
\r
1899 Setting fixed MTRRs(0-88) type: UC
\r
1900 Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
\r
1901 Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
\r
1903 Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB
\r
1904 ADDRESS_MASK_HIGH=0xffff
\r
1905 Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB
\r
1906 ADDRESS_MASK_HIGH=0xffff
\r
1907 Setting variable MTRR 2, base: 3328MB, range: 256MB, type UC
\r
1908 ADDRESS_MASK_HIGH=0xffff
\r
1909 Setting variable MTRR 3, base: 3584MB, range: 512MB, type UC
\r
1910 ADDRESS_MASK_HIGH=0xffff
\r
1911 DONE variable MTRRs
\r
1912 Clear out the extra MTRR's
\r
1913 call enable_var_mtrr()
\r
1914 Leave x86_setup_var_mtrrs
\r
1918 Fixed MTRRs : Enabled
\r
1919 Variable MTRRs: Enabled
\r
1922 Setting up local apic... apic_id: 0x00 done.
\r
1924 CPU model: AMD Processor model unknown
\r
1925 siblings = 05, CPU #0 initialized
\r
1927 Waiting for send to finish...
\r
1928 +Deasserting INIT.
\r
1929 Waiting for send to finish...
\r
1930 +#startup loops: 1.
\r
1931 Sending STARTUP #1 to 1.
\r
1934 Waiting for send to finish...
\r
1936 Initializing CPU #1
\r
1937 CPU: vendor AMD device 100fa0
\r
1938 CPU: family 10, model 0a, stepping 00
\r
1939 nodeid = 00, coreid = 01
\r
1943 Setting fixed MTRRs(0-88) type: UC
\r
1944 Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
\r
1945 Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
\r
1947 Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB
\r
1948 ADDRESS_MASK_HIGH=0xffff
\r
1949 Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB
\r
1950 ADDRESS_MASK_HIGH=0xffff
\r
1951 Setting variable MTRR 2, base: 3328MB, range: 256MB, type UC
\r
1952 ADDRESS_MASK_HIGH=0xffff
\r
1953 Setting variable MTRR 3, base: 3584MB, range: 512MB, type UC
\r
1954 ADDRESS_MASK_HIGH=0xffff
\r
1955 DONE variable MTRRs
\r
1956 Clear out the extra MTRR's
\r
1957 call enable_var_mtrr()
\r
1958 Leave x86_setup_var_mtrrs
\r
1962 Fixed MTRRs : Enabled
\r
1963 Variable MTRRs: Enabled
\r
1966 Setting up local apic... apic_id: 0x01 done.
\r
1968 CPU model: AMD Processor model unknown
\r
1969 siblings = 05, CPU #1 initialized
\r
1971 Waiting for send to finish...
\r
1972 +Deasserting INIT.
\r
1973 Waiting for send to finish...
\r
1974 +#startup loops: 1.
\r
1975 Sending STARTUP #1 to 2.
\r
1978 Waiting for send to finish...
\r
1980 Initializing CPU #2
\r
1981 CPU: vendor AMD device 100fa0
\r
1982 CPU: family 10, model 0a, stepping 00
\r
1983 nodeid = 00, coreid = 02
\r
1987 Setting fixed MTRRs(0-88) type: UC
\r
1988 Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
\r
1989 Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
\r
1991 Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB
\r
1992 ADDRESS_MASK_HIGH=0xffff
\r
1993 Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB
\r
1994 ADDRESS_MASK_HIGH=0xffff
\r
1995 Setting variable MTRR 2, base: 3328MB, range: 256MB, type UC
\r
1996 ADDRESS_MASK_HIGH=0xffff
\r
1997 Setting variable MTRR 3, base: 3584MB, range: 512MB, type UC
\r
1998 ADDRESS_MASK_HIGH=0xffff
\r
1999 DONE variable MTRRs
\r
2000 Clear out the extra MTRR's
\r
2001 call enable_var_mtrr()
\r
2002 Leave x86_setup_var_mtrrs
\r
2006 Fixed MTRRs : Enabled
\r
2007 Variable MTRRs: Enabled
\r
2010 Setting up local apic... apic_id: 0x02 done.
\r
2012 CPU model: AMD Processor model unknown
\r
2013 siblings = 05, CPU #2 initialized
\r
2015 Waiting for send to finish...
\r
2016 +Deasserting INIT.
\r
2017 Waiting for send to finish...
\r
2018 +#startup loops: 1.
\r
2019 Sending STARTUP #1 to 3.
\r
2022 Waiting for send to finish...
\r
2024 Initializing CPU #3
\r
2025 CPU: vendor AMD device 100fa0
\r
2026 CPU: family 10, model 0a, stepping 00
\r
2027 nodeid = 00, coreid = 03
\r
2031 Setting fixed MTRRs(0-88) type: UC
\r
2032 Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
\r
2033 Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
\r
2035 Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB
\r
2036 ADDRESS_MASK_HIGH=0xffff
\r
2037 Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB
\r
2038 ADDRESS_MASK_HIGH=0xffff
\r
2039 Setting variable MTRR 2, base: 3328MB, range: 256MB, type UC
\r
2040 ADDRESS_MASK_HIGH=0xffff
\r
2041 Setting variable MTRR 3, base: 3584MB, range: 512MB, type UC
\r
2042 ADDRESS_MASK_HIGH=0xffff
\r
2043 DONE variable MTRRs
\r
2044 Clear out the extra MTRR's
\r
2045 call enable_var_mtrr()
\r
2046 Leave x86_setup_var_mtrrs
\r
2050 Fixed MTRRs : Enabled
\r
2051 Variable MTRRs: Enabled
\r
2054 Setting up local apic... apic_id: 0x03 done.
\r
2056 CPU model: AMD Processor model unknown
\r
2057 siblings = 05, CPU #3 initialized
\r
2059 Waiting for send to finish...
\r
2060 +Deasserting INIT.
\r
2061 Waiting for send to finish...
\r
2062 +#startup loops: 1.
\r
2063 Sending STARTUP #1 to 4.
\r
2066 Waiting for send to finish...
\r
2068 Initializing CPU #4
\r
2069 CPU: vendor AMD device 100fa0
\r
2070 CPU: family 10, model 0a, stepping 00
\r
2071 nodeid = 00, coreid = 04
\r
2075 Setting fixed MTRRs(0-88) type: UC
\r
2076 Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
\r
2077 Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
\r
2079 Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB
\r
2080 ADDRESS_MASK_HIGH=0xffff
\r
2081 Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB
\r
2082 ADDRESS_MASK_HIGH=0xffff
\r
2083 Setting variable MTRR 2, base: 3328MB, range: 256MB, type UC
\r
2084 ADDRESS_MASK_HIGH=0xffff
\r
2085 Setting variable MTRR 3, base: 3584MB, range: 512MB, type UC
\r
2086 ADDRESS_MASK_HIGH=0xffff
\r
2087 DONE variable MTRRs
\r
2088 Clear out the extra MTRR's
\r
2089 call enable_var_mtrr()
\r
2090 Leave x86_setup_var_mtrrs
\r
2094 Fixed MTRRs : Enabled
\r
2095 Variable MTRRs: Enabled
\r
2098 Setting up local apic... apic_id: 0x04 done.
\r
2100 CPU model: AMD Processor model unknown
\r
2101 siblings = 05, CPU #4 initialized
\r
2103 Waiting for send to finish...
\r
2104 +Deasserting INIT.
\r
2105 Waiting for send to finish...
\r
2106 +#startup loops: 1.
\r
2107 Sending STARTUP #1 to 5.
\r
2110 Waiting for send to finish...
\r
2112 Initializing CPU #5
\r
2113 Waiting for 1 CPUS to stop
\r
2114 CPU: vendor AMD device 100fa0
\r
2115 CPU: family 10, model 0a, stepping 00
\r
2116 nodeid = 00, coreid = 05
\r
2120 Setting fixed MTRRs(0-88) type: UC
\r
2121 Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
\r
2122 Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
\r
2124 Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB
\r
2125 ADDRESS_MASK_HIGH=0xffff
\r
2126 Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB
\r
2127 ADDRESS_MASK_HIGH=0xffff
\r
2128 Setting variable MTRR 2, base: 3328MB, range: 256MB, type UC
\r
2129 ADDRESS_MASK_HIGH=0xffff
\r
2130 Setting variable MTRR 3, base: 3584MB, range: 512MB, type UC
\r
2131 ADDRESS_MASK_HIGH=0xffff
\r
2132 DONE variable MTRRs
\r
2133 Clear out the extra MTRR's
\r
2134 call enable_var_mtrr()
\r
2135 Leave x86_setup_var_mtrrs
\r
2139 Fixed MTRRs : Enabled
\r
2140 Variable MTRRs: Enabled
\r
2143 Setting up local apic... apic_id: 0x05 done.
\r
2145 CPU model: AMD Processor model unknown
\r
2146 siblings = 05, CPU #5 initialized
\r
2147 All AP CPUs stopped
\r
2148 SB900 - Early.c - sb_After_Pci_Init - Start.
\r
2149 SB900 - Cfg.c - sb900_cimx_config - Start.
\r
2150 SB900 - Cfg.c - sb900_cimx_config - End.
\r
2151 SB900 - Early.c - sb_After_Pci_Init - End.
\r
2152 SB900 - Early.c - sb_Mid_Post_Init - Start.
\r
2153 SB900 - Cfg.c - sb900_cimx_config - Start.
\r
2154 SB900 - Cfg.c - sb900_cimx_config - End.
\r
2155 SB900 - Early.c - sb_Mid_Post_Init - End.
\r
2160 NB: Function 3 Misc Control.. done.
\r
2163 IOAPIC: Initializing IOAPIC at 0xdc000000
\r
2164 IOAPIC: Bootstrap Processor Local APIC = 0x00
\r
2166 IOAPIC: 24 interrupts
\r
2167 IOAPIC: Enabling interrupts on FSB
\r
2168 IOAPIC not responding.
\r
2185 NB: Function 3 Misc Control.. done.
\r
2187 Devices initialized
\r
2188 Show all devs...After init.
\r
2189 Root Device: enabled 1
\r
2190 APIC_CLUSTER: 0: enabled 1
\r
2191 APIC: 00: enabled 1
\r
2192 PCI_DOMAIN: 0000: enabled 1
\r
2193 PCI: 00:18.0: enabled 1
\r
2194 PCI: 00:00.0: enabled 1
\r
2195 PCI: 00:00.1: enabled 0
\r
2196 PCI: 00:02.0: enabled 1
\r
2197 PCI: 00:03.0: enabled 0
\r
2198 PCI: 00:04.0: enabled 0
\r
2199 PCI: 00:05.0: enabled 0
\r
2200 PCI: 00:06.0: enabled 0
\r
2201 PCI: 00:07.0: enabled 0
\r
2202 PCI: 00:08.0: enabled 0
\r
2203 PCI: 00:09.0: enabled 0
\r
2204 PCI: 00:0a.0: enabled 0
\r
2205 PCI: 00:0b.0: enabled 0
\r
2206 PCI: 00:0c.0: enabled 0
\r
2207 PCI: 00:0d.0: enabled 1
\r
2208 PCI: 00:11.0: enabled 1
\r
2209 PCI: 00:12.0: enabled 1
\r
2210 PCI: 00:12.2: enabled 1
\r
2211 PCI: 00:13.0: enabled 1
\r
2212 PCI: 00:13.2: enabled 1
\r
2213 PCI: 00:14.0: enabled 1
\r
2214 I2C: 00:50: enabled 1
\r
2215 I2C: 00:51: enabled 1
\r
2216 I2C: 00:52: enabled 1
\r
2217 I2C: 00:53: enabled 1
\r
2218 PCI: 00:14.1: enabled 1
\r
2219 PCI: 00:14.2: enabled 1
\r
2220 PCI: 00:14.3: enabled 1
\r
2221 PNP: 002e.0: enabled 0
\r
2222 PNP: 002e.1: enabled 0
\r
2223 PNP: 002e.2: enabled 1
\r
2224 PNP: 002e.3: enabled 1
\r
2225 PNP: 002e.5: enabled 1
\r
2226 PNP: 002e.6: enabled 0
\r
2227 PNP: 002e.7: enabled 0
\r
2228 PNP: 002e.8: enabled 0
\r
2229 PNP: 002e.9: enabled 0
\r
2230 PNP: 002e.a: enabled 0
\r
2231 PNP: 002e.b: enabled 1
\r
2232 PCI: 00:14.4: enabled 0
\r
2233 PCI: 00:14.5: enabled 1
\r
2234 PCI: 00:14.6: enabled 0
\r
2235 PCI: 00:15.0: enabled 1
\r
2236 PCI: 00:15.1: enabled 1
\r
2237 PCI: 00:15.2: enabled 1
\r
2238 PCI: 00:15.3: enabled 1
\r
2239 PCI: 00:16.0: enabled 1
\r
2240 PCI: 00:16.2: enabled 1
\r
2241 PCI: 00:18.1: enabled 1
\r
2242 PCI: 00:18.2: enabled 1
\r
2243 PCI: 00:18.3: enabled 1
\r
2244 PCI: 00:18.4: enabled 1
\r
2245 APIC: 01: enabled 1
\r
2246 APIC: 02: enabled 1
\r
2247 APIC: 03: enabled 1
\r
2248 APIC: 04: enabled 1
\r
2249 APIC: 05: enabled 1
\r
2250 PCI: 00:00.0: enabled 1
\r
2251 PCI: 00:11.0: enabled 1
\r
2252 PCI: 00:12.0: enabled 1
\r
2253 PCI: 00:12.2: enabled 1
\r
2254 PCI: 00:13.0: enabled 1
\r
2255 PCI: 00:13.2: enabled 1
\r
2256 PCI: 00:14.0: enabled 1
\r
2257 PCI: 00:14.1: enabled 1
\r
2258 PCI: 00:14.2: enabled 1
\r
2259 PCI: 00:14.3: enabled 1
\r
2260 PCI: 00:14.4: enabled 1
\r
2261 PCI: 00:14.5: enabled 1
\r
2262 PCI: 00:16.0: enabled 1
\r
2263 PCI: 00:16.2: enabled 1
\r
2264 PCI: 00:18.0: enabled 1
\r
2265 PCI: 00:18.1: enabled 1
\r
2266 PCI: 00:18.2: enabled 1
\r
2267 PCI: 00:18.3: enabled 1
\r
2268 PCI: 00:18.4: enabled 1
\r
2270 Initializing CBMEM area to 0xcfff0000 (65536 bytes)
\r
2271 Adding CBMEM entry as no. 1
\r
2272 Moving GDT to cfff0200...ok
\r
2273 High Tables Base is cfff0000.
\r
2275 SB900 - Early.c - sb_Late_Post - Start.
\r
2276 SB900 - Cfg.c - sb900_cimx_config - Start.
\r
2277 SB900 - Cfg.c - sb900_cimx_config - End.
\r
2278 SB900 - Early.c - sb_Late_Post - End.
\r
2279 Writing IRQ routing tables to 0xf0000...write_pirq_routing_table done.
\r
2280 Adding CBMEM entry as no. 2
\r
2281 Writing IRQ routing tables to 0xcfff0400...write_pirq_routing_table done.
\r
2282 PIRQ table: 48 bytes.
\r
2284 Wrote the mp table end at: 000f0410 - 000f055c
\r
2285 Adding CBMEM entry as no. 3
\r
2286 Wrote the mp table end at: cfff1410 - cfff155c
\r
2287 MP table: 348 bytes.
\r
2289 Adding CBMEM entry as no. 4
\r
2290 ACPI: Writing ACPI tables at cfff2400...
\r
2291 ACPI: * HPET at cfff24c8
\r
2292 ACPI: added table 1/32, length now 40
\r
2293 ACPI: * MADT at cfff2500
\r
2294 ACPI: added table 2/32, length now 44
\r
2295 ACPI: * SRAT at cfff2580
\r
2296 SRAT: lapic cpu_index=00, node_id=00, apic_id=00
\r
2297 SRAT: lapic cpu_index=01, node_id=00, apic_id=01
\r
2298 SRAT: lapic cpu_index=02, node_id=00, apic_id=02
\r
2299 SRAT: lapic cpu_index=03, node_id=00, apic_id=03
\r
2300 SRAT: lapic cpu_index=04, node_id=00, apic_id=04
\r
2301 SRAT: lapic cpu_index=05, node_id=00, apic_id=05
\r
2302 set_srat_mem: dev PCI_DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280
\r
2303 set_srat_mem: dev PCI_DOMAIN: 0000, res->index=0020 startk=00000300, sizek=0033fd00
\r
2304 set_srat_mem: dev PCI_DOMAIN: 0000, res->index=0030 startk=00400000, sizek=00480000
\r
2305 ACPI: added table 3/32, length now 48
\r
2306 ACPI: * SLIT at cfff2688
\r
2307 ACPI: added table 4/32, length now 52
\r
2308 ACPI: * SSDT at cfff26c0
\r
2309 ACPI: added table 5/32, length now 56
\r
2310 ACPI: * SSDT for PState at cfff2cf5
\r
2311 ACPI: * DSDT at cfff2cf8
\r
2312 ACPI: * DSDT @ cfff2cf8 Length 288b
\r
2313 ACPI: * FACS at cfff5588
\r
2314 ACPI: * FADT at cfff55c8
\r
2315 ACPI_BLK_BASE: 0x0800
\r
2316 ACPI: added table 6/32, length now 60
\r
2318 ACPI tables: 12988 bytes.
\r
2319 Adding CBMEM entry as no. 5
\r
2320 smbios_write_tables: cfffd800
\r
2321 Root Device (ASUS M5A99X-EVO Mainboard)
\r
2322 APIC_CLUSTER: 0 (AMD FAM10 Root Complex)
\r
2323 APIC: 00 (socket AM3)
\r
2324 PCI_DOMAIN: 0000 (AMD FAM10 Root Complex)
\r
2325 PCI: 00:18.0 (AMD FAM10 Northbridge)
\r
2326 PCI: 00:00.0 (ATI rd890)
\r
2327 PCI: 00:00.1 (ATI rd890)
\r
2328 PCI: 00:02.0 (ATI rd890)
\r
2329 PCI: 00:03.0 (ATI rd890)
\r
2330 PCI: 00:04.0 (ATI rd890)
\r
2331 PCI: 00:05.0 (ATI rd890)
\r
2332 PCI: 00:06.0 (ATI rd890)
\r
2333 PCI: 00:07.0 (ATI rd890)
\r
2334 PCI: 00:08.0 (ATI rd890)
\r
2335 PCI: 00:09.0 (ATI rd890)
\r
2336 PCI: 00:0a.0 (ATI rd890)
\r
2337 PCI: 00:0b.0 (ATI rd890)
\r
2338 PCI: 00:0c.0 (ATI rd890)
\r
2339 PCI: 00:0d.0 (ATI rd890)
\r
2340 PCI: 00:11.0 (ATI SB900)
\r
2341 PCI: 00:12.0 (ATI SB900)
\r
2342 PCI: 00:12.2 (ATI SB900)
\r
2343 PCI: 00:13.0 (ATI SB900)
\r
2344 PCI: 00:13.2 (ATI SB900)
\r
2345 PCI: 00:14.0 (ATI SB900)
\r
2350 PCI: 00:14.1 (ATI SB900)
\r
2351 PCI: 00:14.2 (ATI SB900)
\r
2352 PCI: 00:14.3 (ATI SB900)
\r
2353 PNP: 002e.0 (ITE IT8721F Super I/O)
\r
2354 PNP: 002e.1 (ITE IT8721F Super I/O)
\r
2355 PNP: 002e.2 (ITE IT8721F Super I/O)
\r
2356 PNP: 002e.3 (ITE IT8721F Super I/O)
\r
2357 PNP: 002e.5 (ITE IT8721F Super I/O)
\r
2358 PNP: 002e.6 (ITE IT8721F Super I/O)
\r
2359 PNP: 002e.7 (ITE IT8721F Super I/O)
\r
2360 PNP: 002e.8 (ITE IT8721F Super I/O)
\r
2361 PNP: 002e.9 (ITE IT8721F Super I/O)
\r
2362 PNP: 002e.a (ITE IT8721F Super I/O)
\r
2363 PNP: 002e.b (ITE IT8721F Super I/O)
\r
2364 PCI: 00:14.4 (ATI SB900)
\r
2365 PCI: 00:14.5 (ATI SB900)
\r
2366 PCI: 00:14.6 (ATI SB900)
\r
2367 PCI: 00:15.0 (ATI SB900)
\r
2368 PCI: 00:15.1 (ATI SB900)
\r
2369 PCI: 00:15.2 (ATI SB900)
\r
2370 PCI: 00:15.3 (ATI SB900)
\r
2371 PCI: 00:16.0 (ATI SB900)
\r
2372 PCI: 00:16.2 (ATI SB900)
\r
2373 PCI: 00:18.1 (AMD FAM10 Northbridge)
\r
2374 PCI: 00:18.2 (AMD FAM10 Northbridge)
\r
2375 PCI: 00:18.3 (AMD FAM10 Northbridge)
\r
2376 PCI: 00:18.4 (AMD FAM10 Northbridge)
\r
2401 SMBIOS tables: 275 bytes.
\r
2403 Adding CBMEM entry as no. 6
\r
2404 Writing high table forward entry at 0x00000500
\r
2405 Wrote coreboot table at: 00000500 - 00000518 checksum 4fde
\r
2406 New low_table_end: 0x00000518
\r
2407 Now going to write high coreboot table at 0xcfffe000
\r
2408 rom_table_end = 0xcfffe000
\r
2409 Adjust low_table_end from 0x00000518 to 0x00001000
\r
2410 Adjust rom_table_end from 0xcfffe000 to 0xd0000000
\r
2411 Adding high table area
\r
2412 coreboot memory table:
\r
2413 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
\r
2414 1. 0000000000001000-000000000009ffff: RAM
\r
2415 2. 00000000000c0000-00000000cffeffff: RAM
\r
2416 3. 00000000cfff0000-00000000cfffffff: CONFIGURATION TABLES
\r
2417 4. 00000000e0000000-00000000efffffff: RESERVED
\r
2418 5. 0000000100000000-000000021fffffff: RAM
\r
2419 Wrote coreboot table at: cfffe000 - cfffe1e4 checksum 6447
\r
2420 coreboot table: 484 bytes.
\r
2423 Multiboot Information structure has been written.
\r
2424 0. FREE SPACE d0000000 00000000
\r
2425 1. GDT cfff0200 00000200
\r
2426 2. IRQ TABLE cfff0400 00001000
\r
2427 3. SMP TABLE cfff1400 00001000
\r
2428 4. ACPI cfff2400 0000b400
\r
2429 5. SMBIOS cfffd800 00000800
\r
2430 6. COREBOOT cfffe000 00002000
\r
2431 Searching for fallback/payload
\r
2432 Check cmos_layout.bin
\r
2433 Check fallback/romstage
\r
2434 Check fallback/coreboot_ram
\r
2435 Check fallback/payload
\r
2437 Loading segment from rom address 0xffc43ef8
\r
2438 data (compression=1)
\r
2439 New segment dstaddr 0xed150 memsize 0x12eb0 srcaddr 0xffc43f30 filesize 0x9759
\r
2440 (cleaned up) New segment addr 0xed150 size 0x12eb0 offset 0xffc43f30 filesize 0x9759
\r
2441 Loading segment from rom address 0xffc43f14
\r
2442 Entry Point 0x00000000
\r
2443 Loading Segment: addr: 0x00000000000ed150 memsz: 0x0000000000012eb0 filesz: 0x0000000000009759
\r
2444 lb: [0x0000000000200000, 0x0000000000340000)
\r
2445 Post relocation: addr: 0x00000000000ed150 memsz: 0x0000000000012eb0 filesz: 0x0000000000009759
\r
2447 [ 0x000ed150, 00100000, 0x00100000) <- ffc43f30
\r
2448 dest 000ed150, end 00100000, bouncebuffer cfd70000
\r
2450 Jumping to boot code at fc63c
\r
2452 entry = 0x000fc63c
\r
2453 lb_start = 0x00200000
\r
2454 lb_size = 0x00140000
\r
2455 adjust = 0xcfcb0000
\r
2456 buffer = 0xcfd70000
\r
2457 elf_boot_notes = 0x0023b1d0
\r
2458 adjusted_boot_notes = 0xcfeeb1d0
\r
2459 Start bios (version 1.6.3-20120208_175037-oldx86)
\r
2461 Attempting to find coreboot table
\r
2462 Found coreboot table forwarder.
\r
2463 Now attempting to find coreboot memory map
\r
2464 Add to e820 map: 00000000 00001000 2
\r
2465 Add to e820 map: 00001000 0009f000 1
\r
2466 Add to e820 map: 000c0000 cff30000 1
\r
2467 Add to e820 map: cfff0000 00010000 2
\r
2468 Add to e820 map: e0000000 10000000 2
\r
2469 Add to e820 map: 00000000 20000000 1
\r
2470 Add to e820 map: 00000000 00004000 1
\r
2471 Found mainboard ASUS M5A99X-EVO
\r
2472 Found CBFS header at 0xfffffca0
\r
2473 Add to e820 map: 000a0000 00050000 -1
\r
2474 Add to e820 map: 000f0000 00010000 2
\r
2475 Ram Size=0xcfff0000 (0x0000000120000000 high)
\r
2477 Add to e820 map: cffe0000 00010000 2
\r
2480 Add to e820 map: 0009fc00 00000400 2
\r
2497 Searching CBFS for prefix etc/extra-pci-roots
\r
2498 Found CBFS file cmos_layout.bin
\r
2499 Found CBFS file fallback/romstage
\r
2500 Found CBFS file fallback/coreboot_ram
\r
2501 Found CBFS file fallback/payload
\r
2502 Found CBFS file config
\r
2504 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdfe70 (detail=0xcffdfee0)
\r
2505 PCI device 00:00.0 (vd=1002:5a14 c=0600)
\r
2506 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdfdd0 (detail=0xcffdfe40)
\r
2507 PCI device 00:11.0 (vd=1002:4393 c=0101)
\r
2508 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdfd30 (detail=0xcffdfda0)
\r
2509 PCI device 00:12.0 (vd=1002:4397 c=0c03)
\r
2510 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdfc90 (detail=0xcffdfd00)
\r
2511 PCI device 00:12.2 (vd=1002:4396 c=0c03)
\r
2512 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdfbf0 (detail=0xcffdfc60)
\r
2513 PCI device 00:13.0 (vd=1002:4397 c=0c03)
\r
2514 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdfb50 (detail=0xcffdfbc0)
\r
2515 PCI device 00:13.2 (vd=1002:4396 c=0c03)
\r
2516 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdfab0 (detail=0xcffdfb20)
\r
2517 PCI device 00:14.0 (vd=1002:4385 c=0c05)
\r
2518 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdfa10 (detail=0xcffdfa80)
\r
2519 PCI device 00:14.1 (vd=1002:439c c=0101)
\r
2520 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdf970 (detail=0xcffdf9e0)
\r
2521 PCI device 00:14.2 (vd=1002:4383 c=0403)
\r
2522 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdf8d0 (detail=0xcffdf940)
\r
2523 PCI device 00:14.3 (vd=1002:439d c=0601)
\r
2524 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdf830 (detail=0xcffdf8a0)
\r
2525 PCI device 00:14.4 (vd=1002:4384 c=0604)
\r
2526 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdf790 (detail=0xcffdf800)
\r
2527 PCI device 00:14.5 (vd=1002:4399 c=0c03)
\r
2528 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdf6f0 (detail=0xcffdf760)
\r
2529 PCI device 00:16.0 (vd=1002:4397 c=0c03)
\r
2530 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdf650 (detail=0xcffdf6c0)
\r
2531 PCI device 00:16.2 (vd=1002:4396 c=0c03)
\r
2532 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdf5b0 (detail=0xcffdf620)
\r
2533 PCI device 00:18.0 (vd=1022:1200 c=0600)
\r
2534 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdf510 (detail=0xcffdf580)
\r
2535 PCI device 00:18.1 (vd=1022:1201 c=0600)
\r
2536 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdf470 (detail=0xcffdf4e0)
\r
2537 PCI device 00:18.2 (vd=1022:1202 c=0600)
\r
2538 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdf3d0 (detail=0xcffdf440)
\r
2539 PCI device 00:18.3 (vd=1022:1203 c=0600)
\r
2540 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdf330 (detail=0xcffdf3a0)
\r
2541 PCI device 00:18.4 (vd=1022:1204 c=0600)
\r
2542 Found 19 PCI devices (max PCI bus is 01)
\r
2543 Searching CBFS for prefix bootorder
\r
2544 Found CBFS file cmos_layout.bin
\r
2545 Found CBFS file fallback/romstage
\r
2546 Found CBFS file fallback/coreboot_ram
\r
2547 Found CBFS file fallback/payload
\r
2548 Found CBFS file config
\r
2550 Found 1 cpu(s) max supported 1 cpu(s)
\r
2552 hhhhanldwpe_hc1 ii=0irq1 irc0rqq=cf02=
\r
2554 init PNPBIOS table
\r
2555 init keybhoahhandrhhadleandpi
\r_hw
2556 irc10c1q=rq= iq=f00ff000irq=300ff0d3
\rf
2558 Relocating coreboot bios tableshh
2559 ahndahhndleawpi_h irc10c1q=irq= de cfrq=0i=f0rq0ffe0rq=3i83icf=0qrqf000=83=f6h0qh=h
\89hha
\89ndla_hw
\89ec
\891piirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1prq
\89 i=h0hh
\89nhahand
\89lh
\89we_ic1p
\89irq
\89 =0qhha
\89hhhndla
\89hw
\89e_i
\89c1prq
\89ih=0h h
\89hha
\89ndla_hw
\89eic
\891p
\89rq i=0 i
\890rq=hahhhhndl
\89a_h
\89wec1pi
\89irq
\89 h=0qhh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89==0qhhhhhadl
\89an
\89hwe_pic1
\89rq
\89 i=h0hh
\89nhahand
\89lh
\89we_ic1p
\89rq
\89 i=0hhh
\89nhhandl
\89a_h
\89we
\89c1pi irq
\89hq=0rahhhhndl
\89a_h
\89we
\89c1piirq
\89 h=0hqh
\89hhandla
\89_hw
\89ec
\891pi
\89irq q=
\89=0chbhh
\89nhahand
\89lh
\89we_ic1p
\89irq
\89 =0qhha
\89hhhndla
\89hw
\89e_
\89c1piirq
\89 h=0hqh
\89hha
\89ndla_hw
\89eic
\891p
\89rq i=0 i
\890rq=hahhhhndl
\89a_h
\89wec1pi
\89irq
\89 h=0qhh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89==0qhhhhhadl
\89an
\89hwe_pic1
\89rq
\89 i=h0hh
\89nhahand
\89lh
\89we_ic1p
\89rq
\89 i=0hhha
\89nhhdla
\89n_h
\89ew
\89c1piirq
\89 h=0hqh
\89hha
\89ndla_hw
\89ec
\891piirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 =0hqhhhha
\89ndl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hha
\89ndlahw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 =0hqhhhha
\89ndl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hha
\89ndlahw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1prq
\89 i=h0hh
\89nhahand
\89lh
\89we_ic1p
\89irq
\89 h=0qhh
\89hhadla
\89n_h
\89ew
\89c1piirq
\89 h=0hqh
\89hha
\89ndla_hw
\89ec
\891piirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1prq
\89 i=h0hh
\89nhahand
\89lh
\89we_ic1p
\89irq
\89 =0qhha
\89hhhndla
\89hw
\89e_
\89c1piirq
\89 h=0hqh
\89hha
\89ndla_hw
\89eic
\891p
\89rq i0 i
\89=hrqh=h
\89hhandla
\89_hw
\89ec
\891pi
\89irq q=
\89=0ch2hh
\89nhahand
\89lh
\89we_ic1p
\89irq
\89 h=0qh
\89hhahndl
\89a_h
\89we
\89c1pi irq
\89hq=0rahhhhndl
\89a_h
\89wec1pi
\89irq
\89 h=0qhh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89h==0qhhhhadl
\89an
\89hwe_pic1
\89rq
\89 i=h0hh
\89nhahand
\89lh
\89we_ic1p
\89rq
\89 i=0hhha
\89nhhdla
\89n_h
\89ew
\89c1piirq
\89 h=0hqh
\89hha
\89ndla_hw
\89ec
\891piirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1prq
\89 i=h0hh
\89nhahand
\89lh
\89we_ic1p
\89irq
\89 h=0qh
\89hhahndl
\89a_h
\89we
\89c1pi irq
\89hq=0rahhhhndl
\89a_h
\89wec1pi
\89irq
\89 h=0qhh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89a
\89we_hpic1
\89rq
\89 i=h0hh
\89nhahand
\89lh
\89we_ic1p
\89rq
\89 i=0hhha
\89nhhdla
\89n_h
\89ew
\89c1piirq
\89 h=0hqh
\89hha
\89ndla_hw
\89ec
\891piirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1prq
\89 i=h0hh
\89nhahand
\89lh
\89we_ic1p
\89irq
\89 h=0qhh
\89hhadla
\89n_h
\89ew
\89c1piirq
\89 h=0hqh
\89hha
\89ndla_hw
\89ec
\891piirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hha
\89ndlahw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 =0hqhhhha
\89ndl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hha
\89ndlahw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 =0hqhhhha
\89ndl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hha
\89ndlahw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1prq
\89 i=h0hh
\89nhahand
\89lh
\89we_ic1p
\89irq
\89 =0qhha
\89hhhndla
\89hw
\89e_i
\89c1prq
\89ih=0h h
\89hha
\89ndla_hw
\89eic
\891p
\89rq i=0 i
\890rq=hahhhhndl
\89a_h
\89wec1pi
\89irq
\89 h=0qhh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89==0qhhhhhadl
\89an
\89hwe_pic1
\89rq
\89 i=h0hh
\89nhahand
\89lh
\89we_ic1p
\89rq
\89 i=0hhh
\89nhhandl
\89a_h
\89we
\89c1pi irq
\89hq=0rahhhhndl
\89a_h
\89wec1pi
\89irq
\89 h=0qhh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89h==0qhhhhadl
\89an
\89hwe_pic1
\89rq
\89 i=h0hh
\89nhahand
\89lh
\89we_ic1p
\89rq
\89 i=0hhha
\89nhhdla
\89n_h
\89ew
\89c1piirq
\89 h=0hqh
\89hha
\89ndla_hw
\89ec
\891piirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hha
\89ndlahw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 =0hqhhhha
\89ndl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hha
\89ndlahw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 =0hqhhhha
\89ndl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hha
\89ndlahw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1prq
\89 i=h0hh
\89nhahand
\89lh
\89we_ic1p
\89irq
\89 h=0qhh
\89hhadla
\89n_h
\89ew
\89c1piirq
\89 h=0hqh
\89hha
\89ndla_hw
\89ec
\891piirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1prq
\89 i=h0hh
\89nhahand
\89lh
\89we_ic1p
\89irq
\89 =0qhha
\89hhhndla
\89hw
\89e_i
\89c1prq
\89ih=0h h
\89hha
\89ndla_hw
\89eic
\891p
\89rq i=0 i
\890rq=hahhhhndl
\89a_h
\89wec1pi
\89irq
\89 h=0qhh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89==0qhhhhhadl
\89an
\89hwe_pic1
\89rq
\89 i=h0hh
\89nhahand
\89l
\89we_hpic
\891r
\89q i0 i=
\89h0rq=hhhhandl
\89ah
\89we_
\89ic1pirq
\89 =0hqhhhha
\89ndl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hha
\89ndlahw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 =0hqhhhha
\89ndl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hha
\89ndla_hw
\89ec
\891piirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1prq
\89 i=h0hh
\89nhahand
\89lh
\89we_ic1p
\89irq
\89 h=0qhh
\89hhadla
\89n_h
\89ew
\89c1piirq
\89 h=0hqh
\89hha
\89ndla_hw
\89ec
\891piirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89w
2560 rqh=hhhha
\89ndl
\89ah
\89we_ic1p
\89rq
\89 i=h0hh
\89nhahand
\89lh
\89we_ic1p
\89irq
\89 =0qhha
\89hhhndla
\89hw
\89e_
\89c1piirq
\89 h=0hqh
\89hha
\89ndla_hw
\89eic
\891p
\89rq i0 i
\89=hrqh=h
\89hhandla
\89_hw
\89ec
\891pi
\89irq q=
\89=0ch0hh
\89nhahand
\89lh
\89we_ic1p
\89irq
\89 h=0qh
\89hhahndl
\89a_h
\89we
\89c1pi irq
\89hq=0rahhhhndl
\89a_h
\89we
\89c1piirq
\89 h=0hqh
\89hhandla
\89_hw
\89ec
\891pi
\89irq q=
\89=0chfhh
\89nhahand
\89lh
\89we_ic1p
\89irq
\89 =0qhha
\89hhhndla
\89hw
\89e_
\89c1piirq
\89 h=0hqh
\89hha
\89ndla_hw
\89eic
\891p
\89rq i=0 i
\890rq=hahhhhndl
\89a_h
\89wec1pi
\89irq
\89 h=0qhh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89==0qhhhhhadl
\89an
\89hwe_pic1
\89rq
\89 i=h0hh
\89nhahand
\89lh
\89we_ic1p
\89rq
\89 i=0hhh
\89nhhandl
\89a_h
\89we
\89c1pi irq
\89hq=0rahhhhndl
\89a_h
\89we
\89c1piirq
\89 h=0hqh
\89hhandla
\89_hw
\89ec
\891pi
\89irq q=
\89=0chchh
\89nhahand
\89lh
\89we_ic1p
\89irq
\89 h=0qhh
\89hhadla
\89n_h
\89ew
\89c1piirq
\89 h=0hqh
\89hha
\89ndla_hw
\89ec
\891piirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 =0hqhhhha
\89ndl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1prq
\89 i=h0hh
\89nhahand
\89lh
\89we_ic1p
\89irq
\89 h=0qhh
\89hhadla
\89n_h
\89ew
\89c1piirq
\89 h=0hqh
\89hha
\89ndla_hw
\89ec
\891piirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 =0hqhhhha
\89ndl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hha
\89ndlahw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 =0hqhhhha
\89ndl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hha
\89ndla_hw
\89ec
\891piirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 =0hqhhhha
\89ndl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1prq
\89 i=h0hh
\89nhahand
\89lh
\89we_ic1p
\89irq
\89 h=0qh
\89hhahndl
\89a_h
\89we
\89c1pi irq
\89hq=0rahhhhndl
\89a_h
\89we
\89c1piirq
\89 h=0hqh
\89hhandla
\89_hw
\89ec
\891pi
\89irq q=
\89=0ch3hh
\89nhahand
\89lh
\89we_ic1p
\89irq
\89 h=0qh
\89hhahndl
\89a_h
\89we
\89c1pi irq
\89hq=0rahhhhndl
\89a_h
\89we
\89c1piirq
\89 h=0hqh
\89hhandla
\89_hw
\89ec
\891pi
\89irq q=
\89=0ch1hh
\89nhahand
\89lh
\89we_ic1p
\89irq
\89 =0qhha
\89hhhndla
\89hw
\89e_
\89c1piirq
\89 h=0hqh
\89hha
\89ndla_hw
\89eic
\891p
\89rq i=0 i
\890rq=hahhhhndl
\89a_h
\89wec1pi
\89irq
\89 h=0qhh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89==0qhhhhhadl
\89an
\89hwe_pic1
\89rq
\89 i=h0hh
\89nhahand
\89lh
\89we_ic1p
\89rq
\89 i=0hhh
\89nhhandl
\89a_h
\89we
\89c1pi irq
\89hq=0rahhhhndl
\89a_h
\89we
\89c1piirq
\89 h=0hqh
\89hhandla
\89_hw
\89ec
\891pi
\89irq q=
\89=0chehh
\89nhahand
\89lh
\89we_ic1p
\89irq
\89 =0qhha
\89hhhndla
\89hw
\89e_
\89c1piirq
\89 h=0hqh
\89hha
\89ndla_hw
\89eic
\891p
\89rq i0 i
\89=hrqh=h
\89hhandla
\89_hw
\89ec
\891pi
\89irq q=
\89=0chdhh
\89nhahand
\89lh
\89we_ic1p
\89irq
\89 h=0qhh
\89hhadla
\89n_h
\89ew
\89c1piirq
\89 h=0hqh
\89hha
\89ndla_hw
\89ec
\891piirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 =0hqhhhha
\89ndl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hha
\89ndlahw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 =0hqhhhha
\89ndl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hha
\89ndla_hw
\89ec
\891piirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1prq
\89 i=h0hh
\89nhahand
\89lh
\89we_ic1p
\89irq
\89 h=0qhh
\89hhadla
\89n_h
\89ew
\89c1piirq
\89 h=0hqh
\89hha
\89ndla_hw
\89ec
\891piirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_ic1p
\89rq
\89 i=h0hh
\89nhahand
\89lh
\89we_ic1p
\89irq
\89 h=0qh
\89hhahndl
\89a_h
\89we
\89c1pi irq
\89hq=0rahhhhndl
\89a_h
\89wec1pi
\89irq
\89 h=0qhh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89==0qhhhhhadl
\89an
\89hwe_pic1
\89rq
\89 i=h0hh
\89nhahand
\89lh
\89we_ic1p
\89rq
\89 i=0hhha
\89nhhdla
\89n_h
\89ew
\89c1piirq
\89 h=0hqh
\89hha
\89ndla_hw
\89ec
\891piirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 =0hqhhhha
\89ndl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hha
\89ndlahw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 =0hqhhhha
\89ndl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hha
\89ndla_hw
\89ec
\891piirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1prq
\89 i=h0hh
\89nhahand
\89lh
\89we_ic1p
\89irq
\89 =0qhha
\89hhhndla
\89hw
\89e_i
\89c1prq
\89ih=0h h
\89hha
\89ndla_hw
\89eic
\891p
\89rq i=0 i
\890rq=hahhhhndl
\89a_h
\89wec1pi
\89irq
\89 h=0qhh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89==0qhhhhhadl
\89an
\89hwe_pic1
\89rq
\89 i=h0hh
\89nhahand
\89lh
\89we_ic1p
\89rq
\89 i=0hhh
\89nhhandl
\89a_h
\89we
\89c1pi irq
\89hq=0rahhhhndl
\89a_h
\89wec1pi
\89irq
\89 h=0qhh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89==0qhhhhhadl
\89an
\89hwe_pic1
\89rq
\89 i=h0hh
\89nhahand
\89lh
\89we_ic1p
\89rq
\89 i=0hhh
\89nhhandl
\89a_h
\89we
\89c1pi irq
\89hq=0rahhhhndl
\89a_h
\89we
\89c1piirq
\89 h=0hqh
\89hhandla
\89_hw
\89ec
\891pi
\89irq q=
\89=0chdhh
\89nhahand
\89lh
\89we_ic1p
\89irq
\89 =0qhha
\89hhhndla
\89hw
\89e_i
\89c1prq
\89ih=0h h
\89hha
\89ndla_hw
\89eic
\891p
\89rq i=0 i
\890rq=hahhhhndl
\89a_h
\89wec1pi
\89irq
\89 h=0qhh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89==0qhhhhhadl
\89an
\89hwe_pic1
\89rq
\89 i=h0hh
\89nhahand
\89lh
\89we_ic1p
\89rq
\89 i=0hhha
\89nhhdla
\89n_h
\89ew
\89c1piirq
\89 h=0hqh
\89hha
\89ndla_hw
\89ec
\891piirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1pirq
\89 h=0hqh
\89hhandla
\89hw
\89e_i
\89c1pirq
\89h==0qhhhhandl
\89ah
\89we_
\89ic1prq
\89 i=h0hh
\89nhahand
\89lh
\89we_ic1p
\89irq
\89 h=0qh
2564 INIT detected from --- { APICID = 00 NODEID = 00 COREID = 00} ---
\r
2566 Issuing SOFT_RESET...
\r
2569 coreboot-4.0-2039-gd16b170-dirty Wed Feb 8 18:07:46 CET 2012 starting...
\r
2571 BSP Family_Model: 00100fa0
\r
2572 *sysinfo range: [000cc000,000cf360]
\r
2574 cpu_init_detectedx = 00000000
\r
2575 microcode: equivalent rev id = 0x10a0, current patch id = 0x00000000
\r
2576 microcode: patch id to apply = 0x010000bf
\r
2577 microcode: updated to patch id = 0x010000bf success
\r
2582 Enter amd_ht_init()
\r
2583 Exit amd_ht_init()
\r
2585 SB900 - Early.c - get_sbdn - Start.
\r
2586 SB900 - Early.c - get_sbdn - End.
\r
2587 cpuSetAMDPCI 00 done
\r
2588 Prep FID/VID Node:00
\r
2589 P-state info in MSRC001_0064 is invalid !!!
\r
2590 P-state info in MSRc0010064 is invalid !!!
\r
2598 start_other_cores()
\r
2599 init node: 00 cores: 05
\r
2600 Start other core - nodeid: 00 cores: 05
\r
2602 started ap apicid: PPPPPOOOOOSSSSSTTTTT::::: 00000xxxxx3333300000
\r\r\r\r\r
2607 cccccooooorrrrreeeeexxxxx::::: --------------- {{{{{ AAAAAPPPPPIIIIICCCCCIIIIIDDDDD ===== 0000041253 NNNNNOOOOODDDDDEEEEEIIIIIDDDDD ===== 0000000000 CCCCCOOOOORRRRREEEEEIIIIIDDDDD ===== 0000024135}}}}} ---------------
\r\r\r\r\r
2612 * AmPmmmmii iii0cccccrrr1rrooooocccccooooodddddeeeee::::: eeeeeqqqqquuuuuiiiiivvvvvaaaaallllleeeeennnnnttttt rrrrreeeeevvvvv iiiiiddddd ===== 00000xxxxx1111100000aaaaa00000,,,,, cccccuuuuurrrrrrrrrreeeeennnnnttttt pppppaaaaatttttccccchhhhh iiiiiddddd ===== 00000xxxxx0000000000000000000000000000000000000000
\r\r\r\r\r
2617 startmmmmmediiiiiccc
\rcc
2618 rrrrrooooocccccooooodddddeeeee::::: pppppaaaaatttttccccchhhhh iiiiiddddd tttttooooo aaaaapppppppppplllllyyyyy ===== 00000xxxxx000001111100000000000000000000bbbbbfffff
\r\r\r\r\r
2623 *mmmmmii iiicccccArrPrrrooooo ccc0cc2ooooodddddeeeee::::: uuuuupppppdddddaaaaattttteeeeeddddd tttttooooo pppppaaaaatttttccccchhhhh iiiiiddddd ===== 00000xxxxx000001111100000000000000000000bbbbbfffff sssssuuuuucccccccccceeeeessssssssss
\r\r\r\r\r
2633 sctccccpppappruuuuuSSStSSeeeeeettttdtA
\rAAAAMMMM
2634 MDDDDDMMMMMSSSSSRRRRR * AP 0 dd3dddooooonnnnneeeee
\r\r\r\r\r
2639 siiiitninainnniiiirttt_ttt____effdifffdiiii
\rdd
2640 vddivvvviiiidddd_d___s_stssstatttgaaaaeggggeeee2222 2 a aapaapipppiciiicccciiiiidddd:d:: :: 0 02000
\r1543
2649 cimx/rd890 early.c nb_Poweron_Init() Start
\r
2650 cimx/rd890 early.c nb_Poweron_Init() End. return status=0
\r
2652 Begin FIDVID MSR 0xc0010071 0x31c20031 0x40013440
\r
2655 End FIDVIDMSR 0xc0010071 0x31c20031 0x40013440
\r
2656 AmdHtInit status: 0
\r
2661 raminit_amdmct begin:
\r
2662 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2663 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2664 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2665 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2666 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2667 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2668 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2669 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2670 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2671 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2672 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2673 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2674 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2675 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2676 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2677 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2678 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2679 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2680 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2681 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2682 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2683 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2684 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2685 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2686 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2687 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2688 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2689 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2690 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2691 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2692 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2693 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2694 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2695 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2696 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2697 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2698 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2699 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2700 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2701 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2702 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2703 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2704 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2705 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2706 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2707 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2708 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2709 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2710 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2711 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2712 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2713 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2714 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2715 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2716 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2717 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2718 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2719 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2720 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2721 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2722 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2723 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2724 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2725 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2726 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2727 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2728 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2729 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2730 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2731 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2732 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2733 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2734 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2735 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2736 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2737 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2738 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2739 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2740 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2741 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2742 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2743 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2744 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2745 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2746 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2747 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2748 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2749 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2750 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2751 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2752 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2753 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2754 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2755 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2756 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2757 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2758 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2759 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2760 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2761 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2762 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2763 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2764 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2765 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2766 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2767 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2768 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2769 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2770 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2771 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2772 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2773 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2774 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2775 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2776 SB900 - Smbus.c - do_smbus_read_byte - Start.
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2777 SB900 - Smbus.c - do_smbus_read_byte - End.
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2778 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2779 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2780 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2781 SB900 - Smbus.c - do_smbus_read_byte - End.
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2782 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2783 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2784 SB900 - Smbus.c - do_smbus_read_byte - Start.
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2785 SB900 - Smbus.c - do_smbus_read_byte - End.
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2786 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2787 SB900 - Smbus.c - do_smbus_read_byte - End.
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2788 SB900 - Smbus.c - do_smbus_read_byte - Start.
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2789 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2790 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2791 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2792 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2793 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2794 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2795 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2796 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2797 SB900 - Smbus.c - do_smbus_read_byte - End.
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2798 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2799 SB900 - Smbus.c - do_smbus_read_byte - End.
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2800 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2801 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2802 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2803 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2804 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2805 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2806 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2807 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2808 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2809 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2810 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2811 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2812 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2813 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2814 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2815 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2816 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2817 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2818 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2819 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2820 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2821 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2822 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2823 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2824 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2825 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2826 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2827 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2828 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2829 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2830 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2831 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2832 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2833 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2834 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2835 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2836 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2837 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2838 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2839 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2840 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2841 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2842 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2843 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2844 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2845 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2846 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2847 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2848 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2849 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2850 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2851 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2852 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2853 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2854 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2855 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2856 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2857 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2858 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2859 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2860 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2861 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2862 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2863 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2864 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2865 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2866 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2867 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2868 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2869 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2870 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2871 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2872 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2873 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2874 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2875 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2876 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2877 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2878 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2879 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2880 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2881 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2882 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2883 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2884 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2885 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2886 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2887 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2888 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2889 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2890 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2891 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2892 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2893 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2894 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2895 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2896 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2897 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2898 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2899 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2900 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2901 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2902 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2903 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2904 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2905 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2906 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2907 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2908 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2909 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2910 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2911 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2912 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2913 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2914 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2915 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2916 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2917 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2918 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2919 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2920 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2921 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2922 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2923 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2924 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2925 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2926 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2927 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2928 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2929 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2930 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2931 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2932 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2933 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2934 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2935 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2936 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2937 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2938 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2939 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2940 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2941 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2942 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2943 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2944 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2945 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2946 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2947 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2948 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2949 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2950 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2951 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2952 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2953 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2954 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2955 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2956 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2957 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2958 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2959 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2960 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2961 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2962 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2963 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2964 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2965 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2966 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2967 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2968 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2969 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2970 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2971 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2972 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2973 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2974 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2975 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2976 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2977 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2978 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2979 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2980 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2981 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2982 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2983 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2984 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2985 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2986 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2987 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2988 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2989 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2990 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2991 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2992 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2993 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2994 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2995 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2996 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2997 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
2998 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
2999 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3000 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3001 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3002 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3003 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3004 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3005 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3006 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3007 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3008 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3009 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3010 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3011 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3012 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3013 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3014 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3015 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3016 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3017 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3018 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3019 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3020 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3021 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3022 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3023 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3024 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3025 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3026 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3027 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3028 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3029 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3030 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3031 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3032 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3033 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3034 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3035 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3036 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3037 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3038 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3039 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3040 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3041 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3042 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3043 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3044 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3045 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3046 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3047 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3048 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3049 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3050 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3051 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3052 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3053 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3054 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3055 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3056 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3057 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3058 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3059 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3060 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3061 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3062 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3063 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3064 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3065 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3066 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3067 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3068 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3069 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3070 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3071 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3072 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3073 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3074 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3075 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3076 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3077 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3078 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3079 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3080 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3081 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3082 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3083 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3084 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3085 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3086 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3087 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3088 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3089 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3090 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3091 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3092 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3093 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3094 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3095 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3096 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3097 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3098 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3099 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3100 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3101 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3102 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3103 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3104 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3105 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3106 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3107 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3108 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3109 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3110 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3111 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3112 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3113 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3114 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3115 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3116 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3117 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3118 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3119 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3120 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3121 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3122 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3123 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3124 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3125 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3126 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3127 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3128 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3129 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3130 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3131 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3132 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3133 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3134 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3135 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3136 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3137 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3138 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3139 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3140 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3141 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3142 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3143 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3144 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3145 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3146 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3147 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3148 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3149 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3150 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3151 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3152 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3153 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3154 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3155 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3156 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3157 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3158 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3159 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3160 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3161 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3162 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3163 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3164 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3165 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3166 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3167 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3168 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3169 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3170 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3171 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3172 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3173 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3174 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3175 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3176 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3177 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3178 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3179 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3180 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3181 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3182 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3183 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3184 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3185 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3186 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3187 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3188 DIMMPresence: DIMMValid=c
\r
3189 DIMMPresence: DIMMPresent=c
\r
3190 DIMMPresence: RegDIMMPresent=0
\r
3191 DIMMPresence: DimmECCPresent=0
\r
3192 DIMMPresence: DimmPARPresent=0
\r
3193 DIMMPresence: Dimmx4Present=0
\r
3194 DIMMPresence: Dimmx8Present=c
\r
3195 DIMMPresence: Dimmx16Present=0
\r
3196 DIMMPresence: DimmPlPresent=0
\r
3197 DIMMPresence: DimmDRPresent=c
\r
3198 DIMMPresence: DimmQRPresent=0
\r
3199 DIMMPresence: DATAload[0]=2
\r
3200 DIMMPresence: MAload[0]=10
\r
3201 DIMMPresence: MAdimms[0]=1
\r
3202 DIMMPresence: DATAload[1]=2
\r
3203 DIMMPresence: MAload[1]=10
\r
3204 DIMMPresence: MAdimms[1]=1
\r
3205 DIMMPresence: Status 1000
\r
3206 DIMMPresence: ErrStatus 0
\r
3207 DIMMPresence: ErrCode 0
\r
3208 DIMMPresence: Done
\r
3210 DCTInit_D: mct_DIMMPresence Done
\r
3211 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3212 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3213 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3214 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3215 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3216 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3217 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3218 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3219 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3220 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3221 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3222 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3223 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3224 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3225 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3226 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3227 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3228 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3229 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3230 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3231 SPDCalcWidth: Status 1000
\r
3232 SPDCalcWidth: ErrStatus 0
\r
3233 SPDCalcWidth: ErrCode 0
\r
3234 SPDCalcWidth: Done
\r
3235 DCTInit_D: mct_SPDCalcWidth Done
\r
3236 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3237 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3238 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3239 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3240 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3241 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3242 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3243 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3244 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3245 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3246 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3247 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3248 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3249 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3250 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3251 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3252 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3253 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3254 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3255 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3256 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3257 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3258 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3259 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3260 SPDGetTCL_D: DIMMCASL 4
\r
3261 SPDGetTCL_D: DIMMAutoSpeed 4
\r
3262 SPDGetTCL_D: Status 1000
\r
3263 SPDGetTCL_D: ErrStatus 0
\r
3264 SPDGetTCL_D: ErrCode 0
\r
3267 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3268 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3269 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3270 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3271 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3272 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3273 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3274 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3275 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3276 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3277 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3278 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3279 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3280 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3281 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3282 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3283 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3284 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3285 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3286 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3287 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3288 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3289 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3290 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3291 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3292 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3293 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3294 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3295 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3296 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3297 AutoCycTiming: Status 1000
\r
3298 AutoCycTiming: ErrStatus 0
\r
3299 AutoCycTiming: ErrCode 0
\r
3300 AutoCycTiming: Done
\r
3302 DCTInit_D: AutoCycTiming_D Done
\r
3303 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3304 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3305 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3306 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3307 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3308 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3309 SPDSetBanks: CSPresent c
\r
3310 SPDSetBanks: Status 1000
\r
3311 SPDSetBanks: ErrStatus 0
\r
3312 SPDSetBanks: ErrCode 0
\r
3315 AfterStitch pDCTstat->NodeSysBase = 0
\r
3316 mct_AfterStitchMemory: pDCTstat->NodeSysLimit = ffffff
\r
3317 StitchMemory: Status 1000
\r
3318 StitchMemory: ErrStatus 0
\r
3319 StitchMemory: ErrCode 0
\r
3320 StitchMemory: Done
\r
3322 InterleaveBanks_D: Status 1000
\r
3323 InterleaveBanks_D: ErrStatus 0
\r
3324 InterleaveBanks_D: ErrCode 0
\r
3325 InterleaveBanks_D: Done
\r
3327 AutoConfig_D: DramControl: 2a06
\r
3328 AutoConfig_D: DramTimingLo: 90092
\r
3329 AutoConfig_D: DramConfigMisc: 0
\r
3330 AutoConfig_D: DramConfigMisc2: 0
\r
3331 AutoConfig_D: DramConfigLo: 10000
\r
3332 AutoConfig_D: DramConfigHi: f40000b
\r
3333 AutoConfig: Status 1000
\r
3334 AutoConfig: ErrStatus 0
\r
3335 AutoConfig: ErrCode 0
\r
3338 DCTInit_D: AutoConfig_D Done
\r
3339 DCTInit_D: PlatformSpec_D Done
\r
3340 DCTInit_D: StartupDCT_D
\r
3341 DCTInit_D: mct_DIMMPresence Done
\r
3342 SPDCalcWidth: Status 1000
\r
3343 SPDCalcWidth: ErrStatus 0
\r
3344 SPDCalcWidth: ErrCode 0
\r
3345 SPDCalcWidth: Done
\r
3346 DCTInit_D: mct_SPDCalcWidth Done
\r
3347 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3348 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3349 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3350 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3351 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3352 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3353 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3354 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3355 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3356 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3357 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3358 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3359 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3360 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3361 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3362 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3363 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3364 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3365 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3366 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3367 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3368 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3369 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3370 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3371 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3372 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3373 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3374 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3375 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3376 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3377 AutoCycTiming: Status 1000
\r
3378 AutoCycTiming: ErrStatus 0
\r
3379 AutoCycTiming: ErrCode 0
\r
3380 AutoCycTiming: Done
\r
3382 DCTInit_D: AutoCycTiming_D Done
\r
3383 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3384 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3385 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3386 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3387 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3388 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3389 SPDSetBanks: CSPresent c
\r
3390 SPDSetBanks: Status 1000
\r
3391 SPDSetBanks: ErrStatus 0
\r
3392 SPDSetBanks: ErrCode 0
\r
3395 AfterStitch pDCTstat->NodeSysBase = 0
\r
3396 mct_AfterStitchMemory: pDCTstat->NodeSysLimit = 1fffffe
\r
3397 StitchMemory: Status 1000
\r
3398 StitchMemory: ErrStatus 0
\r
3399 StitchMemory: ErrCode 0
\r
3400 StitchMemory: Done
\r
3402 InterleaveBanks_D: Status 1000
\r
3403 InterleaveBanks_D: ErrStatus 0
\r
3404 InterleaveBanks_D: ErrCode 0
\r
3405 InterleaveBanks_D: Done
\r
3407 AutoConfig_D: DramControl: 2a06
\r
3408 AutoConfig_D: DramTimingLo: 90092
\r
3409 AutoConfig_D: DramConfigMisc: 0
\r
3410 AutoConfig_D: DramConfigMisc2: 0
\r
3411 AutoConfig_D: DramConfigLo: 10000
\r
3412 AutoConfig_D: DramConfigHi: f40000b
\r
3413 AutoConfig: Status 1000
\r
3414 AutoConfig: ErrStatus 0
\r
3415 AutoConfig: ErrCode 0
\r
3418 DCTInit_D: AutoConfig_D Done
\r
3419 DCTInit_D: PlatformSpec_D Done
\r
3420 DCTInit_D: StartupDCT_D
\r
3421 mctAutoInitMCT_D: SyncDCTsReady_D
\r
3422 mctAutoInitMCT_D: HTMemMapInit_D
\r
3423 Node: 00 base: 00 limit: 1ffffff BottomIO: e00000
\r
3424 Node: 00 base: 03 limit: 21fffff
\r
3425 Node: 01 base: 00 limit: 00
\r
3426 Node: 02 base: 00 limit: 00
\r
3427 Node: 03 base: 00 limit: 00
\r
3428 Node: 04 base: 00 limit: 00
\r
3429 Node: 05 base: 00 limit: 00
\r
3430 Node: 06 base: 00 limit: 00
\r
3431 Node: 07 base: 00 limit: 00
\r
3432 mctAutoInitMCT_D: CPUMemTyping_D
\r
3433 CPUMemTyping: Cache32bTOP:e00000
\r
3434 CPUMemTyping: Bottom32bIO:e00000
\r
3435 CPUMemTyping: Bottom40bIO:2200000
\r
3436 mctAutoInitMCT_D: DQSTiming_D
\r
3437 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3438 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3439 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3440 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3441 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3442 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3443 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3444 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3445 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3446 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3447 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3448 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3449 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3450 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3451 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3452 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3453 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3454 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3455 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3456 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3457 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3458 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3459 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3460 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3461 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3462 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3463 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3464 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3465 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3466 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3467 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3468 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3469 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3470 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3471 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3472 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3473 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3474 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3475 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3476 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3477 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3478 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3479 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3480 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3481 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3482 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3483 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3484 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3485 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3486 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3487 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3488 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3489 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3490 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3491 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3492 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3493 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3494 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3495 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
3496 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
3497 TrainRcvrEn: Status 1100
\r
3498 TrainRcvrEn: ErrStatus 0
\r
3499 TrainRcvrEn: ErrCode 0
\r
3502 TrainDQSRdWrPos: Status 1100
\r
3503 TrainDQSRdWrPos: TrainErrors 0
\r
3504 TrainDQSRdWrPos: ErrStatus 0
\r
3505 TrainDQSRdWrPos: ErrCode 0
\r
3506 TrainDQSRdWrPos: Done
\r
3508 TrainDQSRdWrPos: Status 1100
\r
3509 TrainDQSRdWrPos: TrainErrors 0
\r
3510 TrainDQSRdWrPos: ErrStatus 0
\r
3511 TrainDQSRdWrPos: ErrCode 0
\r
3512 TrainDQSRdWrPos: Done
\r
3514 TrainDQSRdWrPos: Status 1100
\r
3515 TrainDQSRdWrPos: TrainErrors 0
\r
3516 TrainDQSRdWrPos: ErrStatus 0
\r
3517 TrainDQSRdWrPos: ErrCode 0
\r
3518 TrainDQSRdWrPos: Done
\r
3520 TrainDQSRdWrPos: Status 1100
\r
3521 TrainDQSRdWrPos: TrainErrors 0
\r
3522 TrainDQSRdWrPos: ErrStatus 0
\r
3523 TrainDQSRdWrPos: ErrCode 0
\r
3524 TrainDQSRdWrPos: Done
\r
3526 mctAutoInitMCT_D: UMAMemTyping_D
\r
3527 mctAutoInitMCT_D: :OtherTiming
\r
3528 InterleaveNodes_D: Status 1100
\r
3529 InterleaveNodes_D: ErrStatus 0
\r
3530 InterleaveNodes_D: ErrCode 0
\r
3531 InterleaveNodes_D: Done
\r
3533 InterleaveChannels_D: Node 0
\r
3534 InterleaveChannels_D: Status 1100
\r
3535 InterleaveChannels_D: ErrStatus 0
\r
3536 InterleaveChannels_D: ErrCode 0
\r
3537 InterleaveChannels_D: Node 1
\r
3538 InterleaveChannels_D: Status 1000
\r
3539 InterleaveChannels_D: ErrStatus 0
\r
3540 InterleaveChannels_D: ErrCode 0
\r
3541 InterleaveChannels_D: Node 2
\r
3542 InterleaveChannels_D: Status 1000
\r
3543 InterleaveChannels_D: ErrStatus 0
\r
3544 InterleaveChannels_D: ErrCode 0
\r
3545 InterleaveChannels_D: Node 3
\r
3546 InterleaveChannels_D: Status 1000
\r
3547 InterleaveChannels_D: ErrStatus 0
\r
3548 InterleaveChannels_D: ErrCode 0
\r
3549 InterleaveChannels_D: Node 4
\r
3550 InterleaveChannels_D: Status 1000
\r
3551 InterleaveChannels_D: ErrStatus 0
\r
3552 InterleaveChannels_D: ErrCode 0
\r
3553 InterleaveChannels_D: Node 5
\r
3554 InterleaveChannels_D: Status 1000
\r
3555 InterleaveChannels_D: ErrStatus 0
\r
3556 InterleaveChannels_D: ErrCode 0
\r
3557 InterleaveChannels_D: Node 6
\r
3558 InterleaveChannels_D: Status 1000
\r
3559 InterleaveChannels_D: ErrStatus 0
\r
3560 InterleaveChannels_D: ErrCode 0
\r
3561 InterleaveChannels_D: Node 7
\r
3562 InterleaveChannels_D: Status 1000
\r
3563 InterleaveChannels_D: ErrStatus 0
\r
3564 InterleaveChannels_D: ErrCode 0
\r
3565 InterleaveChannels_D: Done
\r
3567 mctAutoInitMCT_D: ECCInit_D
\r
3569 raminit_amdmct end:
\r
3574 Copying data from cache to RAM -- switching to use RAM as stack... Done
\r
3576 Disabling cache as ram now
\r
3577 Clearing initial memory region: Done
\r
3579 Searching for fallback/coreboot_ram
\r
3580 Check cmos_layout.bin
\r
3581 Check fallback/romstage
\r
3582 Check fallback/coreboot_ram
\r
3583 Stage: loading fallback/coreboot_ram @ 0x200000 (1310720 bytes), entry @ 0x200000
\r
3584 Stage: done loading.
\r
3588 coreboot-4.0-2039-gd16b170-dirty Wed Feb 8 18:07:46 CET 2012 booting...
\r
3590 Enumerating buses...
\r
3591 Show all devs...Before device enumeration.
\r
3592 Root Device: enabled 1
\r
3593 APIC_CLUSTER: 0: enabled 1
\r
3594 APIC: 00: enabled 1
\r
3595 PCI_DOMAIN: 0000: enabled 1
\r
3596 PCI: 00:18.0: enabled 1
\r
3597 PCI: 00:00.0: enabled 1
\r
3598 PCI: 00:00.1: enabled 0
\r
3599 PCI: 00:02.0: enabled 1
\r
3600 PCI: 00:03.0: enabled 0
\r
3601 PCI: 00:04.0: enabled 0
\r
3602 PCI: 00:05.0: enabled 0
\r
3603 PCI: 00:06.0: enabled 0
\r
3604 PCI: 00:07.0: enabled 0
\r
3605 PCI: 00:08.0: enabled 0
\r
3606 PCI: 00:09.0: enabled 0
\r
3607 PCI: 00:0a.0: enabled 0
\r
3608 PCI: 00:0b.0: enabled 0
\r
3609 PCI: 00:0c.0: enabled 0
\r
3610 PCI: 00:0d.0: enabled 1
\r
3611 PCI: 00:11.0: enabled 1
\r
3612 PCI: 00:12.0: enabled 1
\r
3613 PCI: 00:12.2: enabled 1
\r
3614 PCI: 00:13.0: enabled 1
\r
3615 PCI: 00:13.2: enabled 1
\r
3616 PCI: 00:14.0: enabled 1
\r
3617 I2C: 00:50: enabled 1
\r
3618 I2C: 00:51: enabled 1
\r
3619 I2C: 00:52: enabled 1
\r
3620 I2C: 00:53: enabled 1
\r
3621 PCI: 00:14.1: enabled 1
\r
3622 PCI: 00:14.2: enabled 1
\r
3623 PCI: 00:14.3: enabled 1
\r
3624 PNP: 002e.0: enabled 0
\r
3625 PNP: 002e.1: enabled 0
\r
3626 PNP: 002e.2: enabled 1
\r
3627 PNP: 002e.3: enabled 1
\r
3628 PNP: 002e.5: enabled 1
\r
3629 PNP: 002e.6: enabled 0
\r
3630 PNP: 002e.7: enabled 0
\r
3631 PNP: 002e.8: enabled 0
\r
3632 PNP: 002e.9: enabled 0
\r
3633 PNP: 002e.a: enabled 0
\r
3634 PNP: 002e.b: enabled 1
\r
3635 PCI: 00:14.4: enabled 0
\r
3636 PCI: 00:14.5: enabled 1
\r
3637 PCI: 00:14.6: enabled 0
\r
3638 PCI: 00:15.0: enabled 1
\r
3639 PCI: 00:15.1: enabled 1
\r
3640 PCI: 00:15.2: enabled 1
\r
3641 PCI: 00:15.3: enabled 1
\r
3642 PCI: 00:16.0: enabled 1
\r
3643 PCI: 00:16.2: enabled 1
\r
3644 PCI: 00:18.1: enabled 1
\r
3645 PCI: 00:18.2: enabled 1
\r
3646 PCI: 00:18.3: enabled 1
\r
3647 PCI: 00:18.4: enabled 1
\r
3648 Compare with tree...
\r
3649 Root Device: enabled 1
\r
3650 APIC_CLUSTER: 0: enabled 1
\r
3651 APIC: 00: enabled 1
\r
3652 PCI_DOMAIN: 0000: enabled 1
\r
3653 PCI: 00:18.0: enabled 1
\r
3654 PCI: 00:00.0: enabled 1
\r
3655 PCI: 00:00.1: enabled 0
\r
3656 PCI: 00:02.0: enabled 1
\r
3657 PCI: 00:03.0: enabled 0
\r
3658 PCI: 00:04.0: enabled 0
\r
3659 PCI: 00:05.0: enabled 0
\r
3660 PCI: 00:06.0: enabled 0
\r
3661 PCI: 00:07.0: enabled 0
\r
3662 PCI: 00:08.0: enabled 0
\r
3663 PCI: 00:09.0: enabled 0
\r
3664 PCI: 00:0a.0: enabled 0
\r
3665 PCI: 00:0b.0: enabled 0
\r
3666 PCI: 00:0c.0: enabled 0
\r
3667 PCI: 00:0d.0: enabled 1
\r
3668 PCI: 00:11.0: enabled 1
\r
3669 PCI: 00:12.0: enabled 1
\r
3670 PCI: 00:12.2: enabled 1
\r
3671 PCI: 00:13.0: enabled 1
\r
3672 PCI: 00:13.2: enabled 1
\r
3673 PCI: 00:14.0: enabled 1
\r
3674 I2C: 00:50: enabled 1
\r
3675 I2C: 00:51: enabled 1
\r
3676 I2C: 00:52: enabled 1
\r
3677 I2C: 00:53: enabled 1
\r
3678 PCI: 00:14.1: enabled 1
\r
3679 PCI: 00:14.2: enabled 1
\r
3680 PCI: 00:14.3: enabled 1
\r
3681 PNP: 002e.0: enabled 0
\r
3682 PNP: 002e.1: enabled 0
\r
3683 PNP: 002e.2: enabled 1
\r
3684 PNP: 002e.3: enabled 1
\r
3685 PNP: 002e.5: enabled 1
\r
3686 PNP: 002e.6: enabled 0
\r
3687 PNP: 002e.7: enabled 0
\r
3688 PNP: 002e.8: enabled 0
\r
3689 PNP: 002e.9: enabled 0
\r
3690 PNP: 002e.a: enabled 0
\r
3691 PNP: 002e.b: enabled 1
\r
3692 PCI: 00:14.4: enabled 0
\r
3693 PCI: 00:14.5: enabled 1
\r
3694 PCI: 00:14.6: enabled 0
\r
3695 PCI: 00:15.0: enabled 1
\r
3696 PCI: 00:15.1: enabled 1
\r
3697 PCI: 00:15.2: enabled 1
\r
3698 PCI: 00:15.3: enabled 1
\r
3699 PCI: 00:16.0: enabled 1
\r
3700 PCI: 00:16.2: enabled 1
\r
3701 PCI: 00:18.1: enabled 1
\r
3702 PCI: 00:18.2: enabled 1
\r
3703 PCI: 00:18.3: enabled 1
\r
3704 PCI: 00:18.4: enabled 1
\r
3705 Mainboard ASUS M5A99X-EVO Enable. dev=0x00239e38
\r
3706 scan_static_bus for Root Device
\r
3707 APIC_CLUSTER: 0 enabled
\r
3708 PCI_DOMAIN: 0000 enabled
\r
3709 APIC_CLUSTER: 0 scanning...
\r
3710 PCI: 00:18.3 siblings=5
\r
3711 CPU: APIC: 00 enabled
\r
3712 CPU: APIC: 01 enabled
\r
3713 CPU: APIC: 02 enabled
\r
3714 CPU: APIC: 03 enabled
\r
3715 CPU: APIC: 04 enabled
\r
3716 CPU: APIC: 05 enabled
\r
3717 PCI_DOMAIN: 0000 scanning...
\r
3718 PCI: pci_scan_bus for bus 00
\r
3720 PCI: 00:18.0 [1022/1200] bus ops
\r
3721 PCI: 00:18.0 [1022/1200] enabled
\r
3722 PCI: 00:18.1 [1022/1201] enabled
\r
3723 PCI: 00:18.2 [1022/1202] enabled
\r
3724 PCI: 00:18.3 [1022/1203] ops
\r
3725 PCI: 00:18.3 [1022/1203] enabled
\r
3726 PCI: 00:18.4 [1022/1204] enabled
\r
3728 PCI: Using configuration type 1
\r
3729 PCI: 00:00.0 [1002/5a14] ops
\r
3730 PCI: 00:00.0 [1002/5a14] enabled
\r
3731 Capability: type 0x08 @ 0xf0
\r
3733 Capability: type 0x08 @ 0xf0
\r
3734 Capability: type 0x08 @ 0xc4
\r
3736 PCI: pci_scan_bus for bus 00
\r
3737 PCI: pci_scan_bus limits devfn 0 - devfn ffffffff
\r
3738 PCI: pci_scan_bus upper limit too big. Using 0xff.
\r
3740 PCI: 00:00.0 [1002/5a14] enabled
\r
3741 PCI: 00:11.0 [1002/4393] enabled
\r
3742 PCI: 00:12.0 [1002/4397] enabled
\r
3743 PCI: 00:12.2 [1002/4396] enabled
\r
3744 PCI: 00:13.0 [1002/4397] enabled
\r
3745 PCI: 00:13.2 [1002/4396] enabled
\r
3746 PCI: 00:14.0 [1002/4385] enabled
\r
3747 PCI: 00:14.1 [1002/439c] enabled
\r
3748 PCI: 00:14.2 [1002/4383] enabled
\r
3749 PCI: 00:14.3 [1002/439d] enabled
\r
3750 PCI: 00:14.4 [1002/4384] enabled
\r
3751 PCI: 00:14.5 [1002/4399] enabled
\r
3752 PCI: 00:16.0 [1002/4397] enabled
\r
3753 PCI: 00:16.2 [1002/4396] enabled
\r
3754 PCI: 00:18.0 [1022/1200] bus ops
\r
3755 PCI: 00:18.0 [1022/1200] enabled
\r
3756 PCI: 00:18.1 [1022/1201] enabled
\r
3757 PCI: 00:18.2 [1022/1202] enabled
\r
3758 PCI: 00:18.3 [1022/1203] ops
\r
3759 PCI: 00:18.3 [1022/1203] enabled
\r
3760 PCI: 00:18.4 [1022/1204] enabled
\r
3762 do_pci_scan_bridge for PCI: 00:14.4
\r
3763 PCI: pci_scan_bus for bus 01
\r
3766 PCI: pci_scan_bus returning with max=001
\r
3768 do_pci_scan_bridge returns max 1
\r
3769 PCI: pci_scan_bus returning with max=001
\r
3771 PCI: pci_scan_bus returning with max=001
\r
3773 PCI_DOMAIN: 0000 passpw: enabled
\r
3774 scan_static_bus for Root Device done
\r
3777 Allocating resources...
\r
3778 Reading resources...
\r
3779 Root Device read_resources bus 0 link: 0
\r
3780 APIC_CLUSTER: 0 read_resources bus 0 link: 0
\r
3781 APIC: 00 missing read_resources
\r
3782 APIC: 01 missing read_resources
\r
3783 APIC: 02 missing read_resources
\r
3784 APIC: 03 missing read_resources
\r
3785 APIC: 04 missing read_resources
\r
3786 APIC: 05 missing read_resources
\r
3787 APIC_CLUSTER: 0 read_resources bus 0 link: 0 done
\r
3788 PCI_DOMAIN: 0000 read_resources bus 0 link: 0
\r
3789 PCI: 00:18.0 read_resources bus 0 link: 0
\r
3790 PCI: 00:14.4 read_resources bus 1 link: 0
\r
3791 PCI: 00:14.4 read_resources bus 1 link: 0 done
\r
3792 PCI: 00:18.0 read_resources bus 0 link: 0 done
\r
3793 PCI: 00:18.0 read_resources bus 0 link: 1
\r
3794 PCI: 00:00.0 missing read_resources
\r
3795 PCI: 00:02.0 missing read_resources
\r
3796 PCI: 00:0d.0 missing read_resources
\r
3797 PCI: 00:11.0 missing read_resources
\r
3798 PCI: 00:12.0 missing read_resources
\r
3799 PCI: 00:12.2 missing read_resources
\r
3800 PCI: 00:13.0 missing read_resources
\r
3801 PCI: 00:13.2 missing read_resources
\r
3802 PCI: 00:14.0 missing read_resources
\r
3803 PCI: 00:14.1 missing read_resources
\r
3804 PCI: 00:14.2 missing read_resources
\r
3805 PCI: 00:14.3 missing read_resources
\r
3806 PCI: 00:14.5 missing read_resources
\r
3807 PCI: 00:15.0 missing read_resources
\r
3808 PCI: 00:15.1 missing read_resources
\r
3809 PCI: 00:15.2 missing read_resources
\r
3810 PCI: 00:15.3 missing read_resources
\r
3811 PCI: 00:16.0 missing read_resources
\r
3812 PCI: 00:16.2 missing read_resources
\r
3813 PCI: 00:18.0 read_resources bus 0 link: 1 done
\r
3814 PCI: 00:18.0 read_resources bus 0 link: 2
\r
3815 PCI: 00:18.0 read_resources bus 0 link: 2 done
\r
3816 PCI: 00:18.0 read_resources bus 0 link: 3
\r
3817 PCI: 00:18.0 read_resources bus 0 link: 3 done
\r
3818 PCI: 00:18.0 read_resources bus 0 link: 4
\r
3819 PCI: 00:18.0 read_resources bus 0 link: 4 done
\r
3820 PCI: 00:18.0 read_resources bus 0 link: 5
\r
3821 PCI: 00:18.0 read_resources bus 0 link: 5 done
\r
3822 PCI: 00:18.0 read_resources bus 0 link: 6
\r
3823 PCI: 00:18.0 read_resources bus 0 link: 6 done
\r
3824 PCI: 00:18.0 read_resources bus 0 link: 7
\r
3825 PCI: 00:18.0 read_resources bus 0 link: 7 done
\r
3826 PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done
\r
3827 Root Device read_resources bus 0 link: 0 done
\r
3828 Done reading resources.
\r
3829 Show resources in subtree (Root Device)...After reading.
\r
3830 Root Device child on link 0 APIC_CLUSTER: 0
\r
3831 APIC_CLUSTER: 0 child on link 0 APIC: 00
\r
3838 PCI_DOMAIN: 0000 child on link 0 PCI: 00:18.0
\r
3839 PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
\r
3840 PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
\r
3841 PCI_DOMAIN: 0000 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
\r
3842 PCI: 00:18.0 child on link 0 PCI: 00:00.0
\r
3843 PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 10d8
\r
3844 PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 10b8
\r
3845 PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 80200 index 10b0
\r
3846 PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 110d0
\r
3847 PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 110a8
\r
3848 PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 80200 index 110a0
\r
3850 PCI: 00:00.0 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 1200 index fc
\r
3852 PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
\r
3853 PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
\r
3854 PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
\r
3855 PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
\r
3856 PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
\r
3857 PCI: 00:11.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 24
\r
3859 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
\r
3861 PCI: 00:12.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
\r
3863 PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
\r
3865 PCI: 00:13.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
\r
3868 PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
\r
3869 PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
\r
3870 PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
\r
3871 PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
\r
3872 PCI: 00:14.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
\r
3874 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
\r
3877 PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
\r
3878 PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
\r
3879 PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
\r
3881 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
\r
3883 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
\r
3885 PCI: 00:16.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
\r
3890 PCI: 00:18.3 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 200 index 94
\r
3911 PCI: 00:14.0 child on link 0 I2C: 00:50
\r
3918 PCI: 00:14.3 child on link 0 PNP: 002e.0
\r
3920 PNP: 002e.0 resource base 3f0 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
3921 PNP: 002e.0 resource base 6 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
3922 PNP: 002e.0 resource base 2 size 0 align 0 gran 0 limit 0 flags c0000800 index 74
\r
3924 PNP: 002e.1 resource base 378 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
3925 PNP: 002e.1 resource base 7 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
3927 PNP: 002e.2 resource base 3f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
3928 PNP: 002e.2 resource base 4 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
3930 PNP: 002e.3 resource base 2f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
3931 PNP: 002e.3 resource base 3 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
3933 PNP: 002e.5 resource base 60 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
3934 PNP: 002e.5 resource base 64 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
\r
3935 PNP: 002e.5 resource base 1 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
3936 PNP: 002e.5 resource base c size 0 align 0 gran 0 limit 0 flags c0000400 index 72
\r
3938 PNP: 002e.6 resource base 100 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
\r
3940 PNP: 002e.7 resource base 220 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
3941 PNP: 002e.7 resource base 300 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
\r
3942 PNP: 002e.7 resource base 9 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
3947 PNP: 002e.b resource base 290 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
3948 PNP: 002e.b resource base 5 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
3961 PCI: 00:18.3 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 200 index 94
\r
3963 PCI_DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
\r
3964 PCI: 00:18.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
\r
3965 PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
\r
3966 PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
\r
3967 PCI: 00:11.0 20 * [0x0 - 0xf] io
\r
3968 PCI: 00:14.1 20 * [0x10 - 0x1f] io
\r
3969 PCI: 00:11.0 10 * [0x20 - 0x27] io
\r
3970 PCI: 00:11.0 18 * [0x28 - 0x2f] io
\r
3971 PCI: 00:14.1 10 * [0x30 - 0x37] io
\r
3972 PCI: 00:14.1 18 * [0x38 - 0x3f] io
\r
3973 PCI: 00:11.0 14 * [0x40 - 0x43] io
\r
3974 PCI: 00:11.0 1c * [0x44 - 0x47] io
\r
3975 PCI: 00:14.1 14 * [0x48 - 0x4b] io
\r
3976 PCI: 00:14.1 1c * [0x4c - 0x4f] io
\r
3977 PCI: 00:18.0 compute_resources_io: base: 50 size: 1000 align: 12 gran: 12 limit: ffff done
\r
3978 PCI: 00:18.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
\r
3979 PCI: 00:18.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
\r
3980 PCI: 00:18.0 10d8 * [0x0 - 0xfff] io
\r
3981 PCI_DOMAIN: 0000 compute_resources_io: base: 1000 size: 1000 align: 12 gran: 0 limit: ffff done
\r
3982 PCI_DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
\r
3983 PCI: 00:18.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff
\r
3984 PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
\r
3985 PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
\r
3986 PCI: 00:00.0 fc * [0x0 - 0xff] prefmem
\r
3987 PCI: 00:18.0 compute_resources_prefmem: base: 100 size: 100000 align: 20 gran: 20 limit: ffffffff done
\r
3988 PCI: 00:18.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff
\r
3989 PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
\r
3990 PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
\r
3991 PCI: 00:18.3 94 * [0x0 - 0x3ffffff] mem
\r
3992 PCI: 00:14.2 10 * [0x4000000 - 0x4003fff] mem
\r
3993 PCI: 00:12.0 10 * [0x4004000 - 0x4004fff] mem
\r
3994 PCI: 00:13.0 10 * [0x4005000 - 0x4005fff] mem
\r
3995 PCI: 00:14.5 10 * [0x4006000 - 0x4006fff] mem
\r
3996 PCI: 00:16.0 10 * [0x4007000 - 0x4007fff] mem
\r
3997 PCI: 00:11.0 24 * [0x4008000 - 0x40083ff] mem
\r
3998 PCI: 00:12.2 10 * [0x4008400 - 0x40084ff] mem
\r
3999 PCI: 00:13.2 10 * [0x4008500 - 0x40085ff] mem
\r
4000 PCI: 00:16.2 10 * [0x4008600 - 0x40086ff] mem
\r
4001 PCI: 00:18.0 compute_resources_mem: base: 4008700 size: 4100000 align: 26 gran: 20 limit: ffffffff done
\r
4002 PCI: 00:18.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff
\r
4003 PCI: 00:18.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff done
\r
4004 PCI: 00:18.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff
\r
4005 PCI: 00:18.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff done
\r
4006 PCI: 00:18.0 10b0 * [0x0 - 0x40fffff] mem
\r
4007 PCI: 00:18.3 94 * [0x8000000 - 0xbffffff] mem
\r
4008 PCI: 00:18.0 10b8 * [0xc000000 - 0xc0fffff] prefmem
\r
4009 PCI_DOMAIN: 0000 compute_resources_mem: base: c100000 size: c100000 align: 26 gran: 0 limit: ffffffff done
\r
4010 avoid_fixed_resources: PCI_DOMAIN: 0000
\r
4011 avoid_fixed_resources:@PCI_DOMAIN: 0000 10000000 limit 0000ffff
\r
4012 avoid_fixed_resources:@PCI_DOMAIN: 0000 10000100 limit ffffffff
\r
4013 constrain_resources: PCI_DOMAIN: 0000
\r
4014 constrain_resources: PCI: 00:18.0
\r
4015 constrain_resources: PCI: 00:00.0
\r
4016 constrain_resources: PCI: 00:11.0
\r
4017 constrain_resources: PCI: 00:12.0
\r
4018 constrain_resources: PCI: 00:12.2
\r
4019 constrain_resources: PCI: 00:13.0
\r
4020 constrain_resources: PCI: 00:13.2
\r
4021 constrain_resources: PCI: 00:14.0
\r
4022 constrain_resources: PCI: 00:14.1
\r
4023 constrain_resources: PCI: 00:14.2
\r
4024 constrain_resources: PCI: 00:14.3
\r
4025 constrain_resources: PCI: 00:14.4
\r
4026 constrain_resources: PCI: 00:14.5
\r
4027 constrain_resources: PCI: 00:16.0
\r
4028 constrain_resources: PCI: 00:16.2
\r
4029 constrain_resources: PCI: 00:18.0
\r
4030 constrain_resources: PCI: 00:18.1
\r
4031 constrain_resources: PCI: 00:18.2
\r
4032 constrain_resources: PCI: 00:18.3
\r
4033 constrain_resources: PCI: 00:18.4
\r
4034 constrain_resources: PCI: 00:00.0
\r
4035 constrain_resources: PCI: 00:02.0
\r
4036 constrain_resources: PCI: 00:0d.0
\r
4037 constrain_resources: PCI: 00:11.0
\r
4038 constrain_resources: PCI: 00:12.0
\r
4039 constrain_resources: PCI: 00:12.2
\r
4040 constrain_resources: PCI: 00:13.0
\r
4041 constrain_resources: PCI: 00:13.2
\r
4042 constrain_resources: PCI: 00:14.0
\r
4043 constrain_resources: I2C: 00:50
\r
4044 constrain_resources: I2C: 00:51
\r
4045 constrain_resources: I2C: 00:52
\r
4046 constrain_resources: I2C: 00:53
\r
4047 constrain_resources: PCI: 00:14.1
\r
4048 constrain_resources: PCI: 00:14.2
\r
4049 constrain_resources: PCI: 00:14.3
\r
4050 constrain_resources: PNP: 002e.2
\r
4051 skipping PNP: 002e.2@60 fixed resource, size=0!
\r
4052 skipping PNP: 002e.2@70 fixed resource, size=0!
\r
4053 constrain_resources: PNP: 002e.3
\r
4054 skipping PNP: 002e.3@60 fixed resource, size=0!
\r
4055 skipping PNP: 002e.3@70 fixed resource, size=0!
\r
4056 constrain_resources: PNP: 002e.5
\r
4057 skipping PNP: 002e.5@60 fixed resource, size=0!
\r
4058 skipping PNP: 002e.5@62 fixed resource, size=0!
\r
4059 skipping PNP: 002e.5@70 fixed resource, size=0!
\r
4060 skipping PNP: 002e.5@72 fixed resource, size=0!
\r
4061 constrain_resources: PNP: 002e.b
\r
4062 skipping PNP: 002e.b@60 fixed resource, size=0!
\r
4063 skipping PNP: 002e.b@70 fixed resource, size=0!
\r
4064 constrain_resources: PCI: 00:14.5
\r
4065 constrain_resources: PCI: 00:15.0
\r
4066 constrain_resources: PCI: 00:15.1
\r
4067 constrain_resources: PCI: 00:15.2
\r
4068 constrain_resources: PCI: 00:15.3
\r
4069 constrain_resources: PCI: 00:16.0
\r
4070 constrain_resources: PCI: 00:16.2
\r
4071 constrain_resources: PCI: 00:18.1
\r
4072 constrain_resources: PCI: 00:18.2
\r
4073 constrain_resources: PCI: 00:18.3
\r
4074 constrain_resources: PCI: 00:18.4
\r
4075 avoid_fixed_resources2: PCI_DOMAIN: 0000@10000000 limit 0000ffff
\r
4076 lim->base 00000000 lim->limit 0000ffff
\r
4077 avoid_fixed_resources2: PCI_DOMAIN: 0000@10000100 limit ffffffff
\r
4078 lim->base 00000000 lim->limit dfffffff
\r
4079 Setting resources...
\r
4080 PCI_DOMAIN: 0000 allocate_resources_io: base:0 size:1000 align:12 gran:0 limit:ffff
\r
4081 Assigned: PCI: 00:18.0 10d8 * [0x0 - 0xfff] io
\r
4082 PCI_DOMAIN: 0000 allocate_resources_io: next_base: 1000 size: 1000 align: 12 gran: 0 done
\r
4083 PCI: 00:18.0 allocate_resources_io: base:0 size:1000 align:12 gran:12 limit:ffff
\r
4084 Assigned: PCI: 00:11.0 20 * [0x0 - 0xf] io
\r
4085 Assigned: PCI: 00:14.1 20 * [0x10 - 0x1f] io
\r
4086 Assigned: PCI: 00:11.0 10 * [0x20 - 0x27] io
\r
4087 Assigned: PCI: 00:11.0 18 * [0x28 - 0x2f] io
\r
4088 Assigned: PCI: 00:14.1 10 * [0x30 - 0x37] io
\r
4089 Assigned: PCI: 00:14.1 18 * [0x38 - 0x3f] io
\r
4090 Assigned: PCI: 00:11.0 14 * [0x40 - 0x43] io
\r
4091 Assigned: PCI: 00:11.0 1c * [0x44 - 0x47] io
\r
4092 Assigned: PCI: 00:14.1 14 * [0x48 - 0x4b] io
\r
4093 Assigned: PCI: 00:14.1 1c * [0x4c - 0x4f] io
\r
4094 PCI: 00:18.0 allocate_resources_io: next_base: 50 size: 1000 align: 12 gran: 12 done
\r
4095 PCI: 00:14.4 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
\r
4096 PCI: 00:14.4 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
\r
4097 PCI: 00:18.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
\r
4098 PCI: 00:18.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
\r
4099 PCI_DOMAIN: 0000 allocate_resources_mem: base:d0000000 size:c100000 align:26 gran:0 limit:dfffffff
\r
4100 Assigned: PCI: 00:18.0 10b0 * [0xd0000000 - 0xd40fffff] mem
\r
4101 Assigned: PCI: 00:18.3 94 * [0xd8000000 - 0xdbffffff] mem
\r
4102 Assigned: PCI: 00:18.0 10b8 * [0xdc000000 - 0xdc0fffff] prefmem
\r
4103 PCI_DOMAIN: 0000 allocate_resources_mem: next_base: dc100000 size: c100000 align: 26 gran: 0 done
\r
4104 PCI: 00:18.0 allocate_resources_prefmem: base:dc000000 size:100000 align:20 gran:20 limit:dfffffff
\r
4105 Assigned: PCI: 00:00.0 fc * [0xdc000000 - 0xdc0000ff] prefmem
\r
4106 PCI: 00:18.0 allocate_resources_prefmem: next_base: dc000100 size: 100000 align: 20 gran: 20 done
\r
4107 PCI: 00:14.4 allocate_resources_prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
\r
4108 PCI: 00:14.4 allocate_resources_prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
\r
4109 PCI: 00:18.0 allocate_resources_mem: base:d0000000 size:4100000 align:26 gran:20 limit:dfffffff
\r
4110 Assigned: PCI: 00:18.3 94 * [0xd0000000 - 0xd3ffffff] mem
\r
4111 Assigned: PCI: 00:14.2 10 * [0xd4000000 - 0xd4003fff] mem
\r
4112 Assigned: PCI: 00:12.0 10 * [0xd4004000 - 0xd4004fff] mem
\r
4113 Assigned: PCI: 00:13.0 10 * [0xd4005000 - 0xd4005fff] mem
\r
4114 Assigned: PCI: 00:14.5 10 * [0xd4006000 - 0xd4006fff] mem
\r
4115 Assigned: PCI: 00:16.0 10 * [0xd4007000 - 0xd4007fff] mem
\r
4116 Assigned: PCI: 00:11.0 24 * [0xd4008000 - 0xd40083ff] mem
\r
4117 Assigned: PCI: 00:12.2 10 * [0xd4008400 - 0xd40084ff] mem
\r
4118 Assigned: PCI: 00:13.2 10 * [0xd4008500 - 0xd40085ff] mem
\r
4119 Assigned: PCI: 00:16.2 10 * [0xd4008600 - 0xd40086ff] mem
\r
4120 PCI: 00:18.0 allocate_resources_mem: next_base: d4008700 size: 4100000 align: 26 gran: 20 done
\r
4121 PCI: 00:14.4 allocate_resources_mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
\r
4122 PCI: 00:14.4 allocate_resources_mem: next_base: dfffffff size: 0 align: 20 gran: 20 done
\r
4123 PCI: 00:18.0 allocate_resources_prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
\r
4124 PCI: 00:18.0 allocate_resources_prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
\r
4125 PCI: 00:18.0 allocate_resources_mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
\r
4126 PCI: 00:18.0 allocate_resources_mem: next_base: dfffffff size: 0 align: 20 gran: 20 done
\r
4127 Root Device assign_resources, bus 0 link: 0
\r
4128 split: 64K table at =cfff0000
\r
4129 0: mmio_basek=00340000, basek=00400000, limitk=00880000
\r
4130 PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
\r
4131 PCI: 00:18.0 10d8 <- [0x0000000000 - 0x0000000fff] size 0x00001000 gran 0x0c io <node 0 link 0>
\r
4132 PCI: 00:18.0 10b8 <- [0x00dc000000 - 0x00dc0fffff] size 0x00100000 gran 0x14 prefmem <node 0 link 0>
\r
4133 PCI: 00:18.0 10b0 <- [0x00d0000000 - 0x00d40fffff] size 0x04100000 gran 0x14 mem <node 0 link 0>
\r
4134 PCI: 00:18.0 110d0 <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c io <node 0 link 1>
\r
4135 PCI: 00:18.0 110a8 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 prefmem <node 0 link 1>
\r
4136 PCI: 00:18.0 110a0 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 mem <node 0 link 1>
\r
4137 PCI: 00:18.0 assign_resources, bus 0 link: 0
\r
4138 PCI: 00:00.0 fc <- [0x00dc000000 - 0x00dc0000ff] size 0x00000100 gran 0x08 prefmem
\r
4139 PCI: 00:11.0 10 <- [0x0000000020 - 0x0000000027] size 0x00000008 gran 0x03 io
\r
4140 PCI: 00:11.0 14 <- [0x0000000040 - 0x0000000043] size 0x00000004 gran 0x02 io
\r
4141 PCI: 00:11.0 18 <- [0x0000000028 - 0x000000002f] size 0x00000008 gran 0x03 io
\r
4142 PCI: 00:11.0 1c <- [0x0000000044 - 0x0000000047] size 0x00000004 gran 0x02 io
\r
4143 PCI: 00:11.0 20 <- [0x0000000000 - 0x000000000f] size 0x00000010 gran 0x04 io
\r
4144 PCI: 00:11.0 24 <- [0x00d4008000 - 0x00d40083ff] size 0x00000400 gran 0x0a mem
\r
4145 PCI: 00:12.0 10 <- [0x00d4004000 - 0x00d4004fff] size 0x00001000 gran 0x0c mem
\r
4146 PCI: 00:12.2 10 <- [0x00d4008400 - 0x00d40084ff] size 0x00000100 gran 0x08 mem
\r
4147 PCI: 00:13.0 10 <- [0x00d4005000 - 0x00d4005fff] size 0x00001000 gran 0x0c mem
\r
4148 PCI: 00:13.2 10 <- [0x00d4008500 - 0x00d40085ff] size 0x00000100 gran 0x08 mem
\r
4149 PCI: 00:14.1 10 <- [0x0000000030 - 0x0000000037] size 0x00000008 gran 0x03 io
\r
4150 PCI: 00:14.1 14 <- [0x0000000048 - 0x000000004b] size 0x00000004 gran 0x02 io
\r
4151 PCI: 00:14.1 18 <- [0x0000000038 - 0x000000003f] size 0x00000008 gran 0x03 io
\r
4152 PCI: 00:14.1 1c <- [0x000000004c - 0x000000004f] size 0x00000004 gran 0x02 io
\r
4153 PCI: 00:14.1 20 <- [0x0000000010 - 0x000000001f] size 0x00000010 gran 0x04 io
\r
4154 PCI: 00:14.2 10 <- [0x00d4000000 - 0x00d4003fff] size 0x00004000 gran 0x0e mem64
\r
4155 PCI: 00:14.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
\r
4156 PCI: 00:14.4 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
\r
4157 PCI: 00:14.4 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 mem
\r
4158 PCI: 00:14.5 10 <- [0x00d4006000 - 0x00d4006fff] size 0x00001000 gran 0x0c mem
\r
4159 PCI: 00:16.0 10 <- [0x00d4007000 - 0x00d4007fff] size 0x00001000 gran 0x0c mem
\r
4160 PCI: 00:16.2 10 <- [0x00d4008600 - 0x00d40086ff] size 0x00000100 gran 0x08 mem
\r
4161 PCI: 00:18.3 94 <- [0x00d0000000 - 0x00d3ffffff] size 0x04000000 gran 0x1a mem <gart>
\r
4162 PCI: 00:18.3 94 <- [0x00d0000000 - 0x00d3ffffff] size 0x04000000 gran 0x1a mem <gart>
\r
4163 PCI: 00:18.0 assign_resources, bus 0 link: 0
\r
4164 PCI: 00:18.0 assign_resources, bus 0 link: 1
\r
4165 PCI: 00:18.0 assign_resources, bus 0 link: 1
\r
4166 PCI: 00:18.3 94 <- [0x00d8000000 - 0x00dbffffff] size 0x04000000 gran 0x1a mem <gart>
\r
4167 PCI: 00:18.3 94 <- [0x00d8000000 - 0x00dbffffff] size 0x04000000 gran 0x1a mem <gart>
\r
4168 PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
\r
4169 Root Device assign_resources, bus 0 link: 0
\r
4170 Done setting resources.
\r
4171 Show resources in subtree (Root Device)...After assigning values.
\r
4172 Root Device child on link 0 APIC_CLUSTER: 0
\r
4173 APIC_CLUSTER: 0 child on link 0 APIC: 00
\r
4180 PCI_DOMAIN: 0000 child on link 0 PCI: 00:18.0
\r
4181 PCI_DOMAIN: 0000 resource base 0 size 1000 align 12 gran 0 limit ffff flags 40040100 index 10000000
\r
4182 PCI_DOMAIN: 0000 resource base d0000000 size c100000 align 26 gran 0 limit dfffffff flags 40040200 index 10000100
\r
4183 PCI_DOMAIN: 0000 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
\r
4184 PCI_DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10
\r
4185 PCI_DOMAIN: 0000 resource base c0000 size cff40000 align 0 gran 0 limit 0 flags e0004200 index 20
\r
4186 PCI_DOMAIN: 0000 resource base 100000000 size 120000000 align 0 gran 0 limit 0 flags e0004200 index 30
\r
4187 PCI: 00:18.0 child on link 0 PCI: 00:00.0
\r
4188 PCI: 00:18.0 resource base 0 size 1000 align 12 gran 12 limit ffff flags 60080100 index 10d8
\r
4189 PCI: 00:18.0 resource base dc000000 size 100000 align 20 gran 20 limit dfffffff flags 60081200 index 10b8
\r
4190 PCI: 00:18.0 resource base d0000000 size 4100000 align 26 gran 20 limit dfffffff flags 60080200 index 10b0
\r
4191 PCI: 00:18.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080100 index 110d0
\r
4192 PCI: 00:18.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081200 index 110a8
\r
4193 PCI: 00:18.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080200 index 110a0
\r
4195 PCI: 00:00.0 resource base dc000000 size 100 align 8 gran 8 limit dfffffff flags 60001200 index fc
\r
4197 PCI: 00:11.0 resource base 20 size 8 align 3 gran 3 limit ffff flags 60000100 index 10
\r
4198 PCI: 00:11.0 resource base 40 size 4 align 2 gran 2 limit ffff flags 60000100 index 14
\r
4199 PCI: 00:11.0 resource base 28 size 8 align 3 gran 3 limit ffff flags 60000100 index 18
\r
4200 PCI: 00:11.0 resource base 44 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c
\r
4201 PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 60000100 index 20
\r
4202 PCI: 00:11.0 resource base d4008000 size 400 align 10 gran 10 limit dfffffff flags 60000200 index 24
\r
4204 PCI: 00:12.0 resource base d4004000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 10
\r
4206 PCI: 00:12.2 resource base d4008400 size 100 align 8 gran 8 limit dfffffff flags 60000200 index 10
\r
4208 PCI: 00:13.0 resource base d4005000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 10
\r
4210 PCI: 00:13.2 resource base d4008500 size 100 align 8 gran 8 limit dfffffff flags 60000200 index 10
\r
4213 PCI: 00:14.1 resource base 30 size 8 align 3 gran 3 limit ffff flags 60000100 index 10
\r
4214 PCI: 00:14.1 resource base 48 size 4 align 2 gran 2 limit ffff flags 60000100 index 14
\r
4215 PCI: 00:14.1 resource base 38 size 8 align 3 gran 3 limit ffff flags 60000100 index 18
\r
4216 PCI: 00:14.1 resource base 4c size 4 align 2 gran 2 limit ffff flags 60000100 index 1c
\r
4217 PCI: 00:14.1 resource base 10 size 10 align 4 gran 4 limit ffff flags 60000100 index 20
\r
4219 PCI: 00:14.2 resource base d4000000 size 4000 align 14 gran 14 limit dfffffff flags 60000201 index 10
\r
4222 PCI: 00:14.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
\r
4223 PCI: 00:14.4 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
\r
4224 PCI: 00:14.4 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080202 index 20
\r
4226 PCI: 00:14.5 resource base d4006000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 10
\r
4228 PCI: 00:16.0 resource base d4007000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 10
\r
4230 PCI: 00:16.2 resource base d4008600 size 100 align 8 gran 8 limit dfffffff flags 60000200 index 10
\r
4235 PCI: 00:18.3 resource base d0000000 size 4000000 align 26 gran 26 limit dfffffff flags 60000200 index 94
\r
4256 PCI: 00:14.0 child on link 0 I2C: 00:50
\r
4263 PCI: 00:14.3 child on link 0 PNP: 002e.0
\r
4265 PNP: 002e.0 resource base 3f0 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
4266 PNP: 002e.0 resource base 6 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
4267 PNP: 002e.0 resource base 2 size 0 align 0 gran 0 limit 0 flags c0000800 index 74
\r
4269 PNP: 002e.1 resource base 378 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
4270 PNP: 002e.1 resource base 7 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
4272 PNP: 002e.2 resource base 3f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
4273 PNP: 002e.2 resource base 4 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
4275 PNP: 002e.3 resource base 2f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
4276 PNP: 002e.3 resource base 3 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
4278 PNP: 002e.5 resource base 60 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
4279 PNP: 002e.5 resource base 64 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
\r
4280 PNP: 002e.5 resource base 1 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
4281 PNP: 002e.5 resource base c size 0 align 0 gran 0 limit 0 flags c0000400 index 72
\r
4283 PNP: 002e.6 resource base 100 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
\r
4285 PNP: 002e.7 resource base 220 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
4286 PNP: 002e.7 resource base 300 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
\r
4287 PNP: 002e.7 resource base 9 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
4292 PNP: 002e.b resource base 290 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
4293 PNP: 002e.b resource base 5 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
4306 PCI: 00:18.3 resource base d8000000 size 4000000 align 26 gran 26 limit dfffffff flags 60000200 index 94
\r
4308 Done allocating resources.
\r
4310 Enabling resources...
\r
4311 PCI: 00:18.0 cmd <- 00
\r
4312 PCI: 00:18.1 subsystem <- 1043/843e
\r
4313 PCI: 00:18.1 cmd <- 00
\r
4314 PCI: 00:18.2 subsystem <- 1043/843e
\r
4315 PCI: 00:18.2 cmd <- 00
\r
4316 PCI: 00:18.3 cmd <- 00
\r
4317 PCI: 00:18.4 subsystem <- 1043/843e
\r
4318 PCI: 00:18.4 cmd <- 00
\r
4319 PCI: 00:00.0 cmd <- 02
\r
4320 PCI: 00:11.0 cmd <- 03
\r
4321 PCI: 00:12.0 cmd <- 02
\r
4322 PCI: 00:12.2 cmd <- 02
\r
4323 PCI: 00:13.0 cmd <- 02
\r
4324 PCI: 00:13.2 cmd <- 02
\r
4325 PCI: 00:14.0 cmd <- 403
\r
4326 PCI: 00:14.1 cmd <- 01
\r
4327 PCI: 00:14.2 cmd <- 02
\r
4328 PCI: 00:14.3 cmd <- 0f
\r
4329 PCI: 00:14.4 bridge ctrl <- 0003
\r
4330 PCI: 00:14.4 cmd <- 00
\r
4331 PCI: 00:14.5 cmd <- 02
\r
4332 PCI: 00:16.0 cmd <- 02
\r
4333 PCI: 00:16.2 cmd <- 02
\r
4334 PCI: 00:18.0 cmd <- 00
\r
4335 PCI: 00:18.1 cmd <- 00
\r
4336 PCI: 00:18.2 cmd <- 00
\r
4337 PCI: 00:18.3 cmd <- 00
\r
4338 PCI: 00:18.4 cmd <- 00
\r
4340 Initializing devices...
\r
4342 APIC_CLUSTER: 0 init
\r
4343 start_eip=0x00006000, offset=0x00200000, code_size=0x0000005b
\r
4344 Initializing CPU #0
\r
4345 CPU: vendor AMD device 100fa0
\r
4346 CPU: family 10, model 0a, stepping 00
\r
4347 nodeid = 00, coreid = 00
\r
4351 Setting fixed MTRRs(0-88) type: UC
\r
4352 Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
\r
4353 Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
\r
4355 Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB
\r
4356 ADDRESS_MASK_HIGH=0xffff
\r
4357 Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB
\r
4358 ADDRESS_MASK_HIGH=0xffff
\r
4359 Setting variable MTRR 2, base: 3328MB, range: 256MB, type UC
\r
4360 ADDRESS_MASK_HIGH=0xffff
\r
4361 Setting variable MTRR 3, base: 3584MB, range: 512MB, type UC
\r
4362 ADDRESS_MASK_HIGH=0xffff
\r
4363 DONE variable MTRRs
\r
4364 Clear out the extra MTRR's
\r
4365 call enable_var_mtrr()
\r
4366 Leave x86_setup_var_mtrrs
\r
4370 Fixed MTRRs : Enabled
\r
4371 Variable MTRRs: Enabled
\r
4374 Setting up local apic... apic_id: 0x00 done.
\r
4376 CPU model: AMD Processor model unknown
\r
4377 siblings = 05, CPU #0 initialized
\r
4379 Waiting for send to finish...
\r
4380 +Deasserting INIT.
\r
4381 Waiting for send to finish...
\r
4382 +#startup loops: 1.
\r
4383 Sending STARTUP #1 to 1.
\r
4386 Waiting for send to finish...
\r
4388 Initializing CPU #1
\r
4389 CPU: vendor AMD device 100fa0
\r
4390 CPU: family 10, model 0a, stepping 00
\r
4391 nodeid = 00, coreid = 01
\r
4395 Setting fixed MTRRs(0-88) type: UC
\r
4396 Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
\r
4397 Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
\r
4399 Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB
\r
4400 ADDRESS_MASK_HIGH=0xffff
\r
4401 Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB
\r
4402 ADDRESS_MASK_HIGH=0xffff
\r
4403 Setting variable MTRR 2, base: 3328MB, range: 256MB, type UC
\r
4404 ADDRESS_MASK_HIGH=0xffff
\r
4405 Setting variable MTRR 3, base: 3584MB, range: 512MB, type UC
\r
4406 ADDRESS_MASK_HIGH=0xffff
\r
4407 DONE variable MTRRs
\r
4408 Clear out the extra MTRR's
\r
4409 call enable_var_mtrr()
\r
4410 Leave x86_setup_var_mtrrs
\r
4414 Fixed MTRRs : Enabled
\r
4415 Variable MTRRs: Enabled
\r
4418 Setting up local apic... apic_id: 0x01 done.
\r
4420 CPU model: AMD Processor model unknown
\r
4421 siblings = 05, CPU #1 initialized
\r
4423 Waiting for send to finish...
\r
4424 +Deasserting INIT.
\r
4425 Waiting for send to finish...
\r
4426 +#startup loops: 1.
\r
4427 Sending STARTUP #1 to 2.
\r
4430 Waiting for send to finish...
\r
4432 Initializing CPU #2
\r
4433 CPU: vendor AMD device 100fa0
\r
4434 CPU: family 10, model 0a, stepping 00
\r
4435 nodeid = 00, coreid = 02
\r
4439 Setting fixed MTRRs(0-88) type: UC
\r
4440 Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
\r
4441 Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
\r
4443 Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB
\r
4444 ADDRESS_MASK_HIGH=0xffff
\r
4445 Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB
\r
4446 ADDRESS_MASK_HIGH=0xffff
\r
4447 Setting variable MTRR 2, base: 3328MB, range: 256MB, type UC
\r
4448 ADDRESS_MASK_HIGH=0xffff
\r
4449 Setting variable MTRR 3, base: 3584MB, range: 512MB, type UC
\r
4450 ADDRESS_MASK_HIGH=0xffff
\r
4451 DONE variable MTRRs
\r
4452 Clear out the extra MTRR's
\r
4453 call enable_var_mtrr()
\r
4454 Leave x86_setup_var_mtrrs
\r
4458 Fixed MTRRs : Enabled
\r
4459 Variable MTRRs: Enabled
\r
4462 Setting up local apic... apic_id: 0x02 done.
\r
4464 CPU model: AMD Processor model unknown
\r
4465 siblings = 05, CPU #2 initialized
\r
4467 Waiting for send to finish...
\r
4468 +Deasserting INIT.
\r
4469 Waiting for send to finish...
\r
4470 +#startup loops: 1.
\r
4471 Sending STARTUP #1 to 3.
\r
4474 Waiting for send to finish...
\r
4476 Initializing CPU #3
\r
4477 CPU: vendor AMD device 100fa0
\r
4478 CPU: family 10, model 0a, stepping 00
\r
4479 nodeid = 00, coreid = 03
\r
4483 Setting fixed MTRRs(0-88) type: UC
\r
4484 Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
\r
4485 Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
\r
4487 Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB
\r
4488 ADDRESS_MASK_HIGH=0xffff
\r
4489 Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB
\r
4490 ADDRESS_MASK_HIGH=0xffff
\r
4491 Setting variable MTRR 2, base: 3328MB, range: 256MB, type UC
\r
4492 ADDRESS_MASK_HIGH=0xffff
\r
4493 Setting variable MTRR 3, base: 3584MB, range: 512MB, type UC
\r
4494 ADDRESS_MASK_HIGH=0xffff
\r
4495 DONE variable MTRRs
\r
4496 Clear out the extra MTRR's
\r
4497 call enable_var_mtrr()
\r
4498 Leave x86_setup_var_mtrrs
\r
4502 Fixed MTRRs : Enabled
\r
4503 Variable MTRRs: Enabled
\r
4506 Setting up local apic... apic_id: 0x03 done.
\r
4508 CPU model: AMD Processor model unknown
\r
4509 siblings = 05, CPU #3 initialized
\r
4511 Waiting for send to finish...
\r
4512 +Deasserting INIT.
\r
4513 Waiting for send to finish...
\r
4514 +#startup loops: 1.
\r
4515 Sending STARTUP #1 to 4.
\r
4518 Waiting for send to finish...
\r
4520 Initializing CPU #4
\r
4521 CPU: vendor AMD device 100fa0
\r
4522 CPU: family 10, model 0a, stepping 00
\r
4523 nodeid = 00, coreid = 04
\r
4527 Setting fixed MTRRs(0-88) type: UC
\r
4528 Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
\r
4529 Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
\r
4531 Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB
\r
4532 ADDRESS_MASK_HIGH=0xffff
\r
4533 Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB
\r
4534 ADDRESS_MASK_HIGH=0xffff
\r
4535 Setting variable MTRR 2, base: 3328MB, range: 256MB, type UC
\r
4536 ADDRESS_MASK_HIGH=0xffff
\r
4537 Setting variable MTRR 3, base: 3584MB, range: 512MB, type UC
\r
4538 ADDRESS_MASK_HIGH=0xffff
\r
4539 DONE variable MTRRs
\r
4540 Clear out the extra MTRR's
\r
4541 call enable_var_mtrr()
\r
4542 Leave x86_setup_var_mtrrs
\r
4546 Fixed MTRRs : Enabled
\r
4547 Variable MTRRs: Enabled
\r
4550 Setting up local apic... apic_id: 0x04 done.
\r
4552 CPU model: AMD Processor model unknown
\r
4553 siblings = 05, CPU #4 initialized
\r
4555 Waiting for send to finish...
\r
4556 +Deasserting INIT.
\r
4557 Waiting for send to finish...
\r
4558 +#startup loops: 1.
\r
4559 Sending STARTUP #1 to 5.
\r
4562 Waiting for send to finish...
\r
4564 Initializing CPU #5
\r
4565 Waiting for 1 CPUS to stop
\r
4566 CPU: vendor AMD device 100fa0
\r
4567 CPU: family 10, model 0a, stepping 00
\r
4568 nodeid = 00, coreid = 05
\r
4572 Setting fixed MTRRs(0-88) type: UC
\r
4573 Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
\r
4574 Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
\r
4576 Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB
\r
4577 ADDRESS_MASK_HIGH=0xffff
\r
4578 Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB
\r
4579 ADDRESS_MASK_HIGH=0xffff
\r
4580 Setting variable MTRR 2, base: 3328MB, range: 256MB, type UC
\r
4581 ADDRESS_MASK_HIGH=0xffff
\r
4582 Setting variable MTRR 3, base: 3584MB, range: 512MB, type UC
\r
4583 ADDRESS_MASK_HIGH=0xffff
\r
4584 DONE variable MTRRs
\r
4585 Clear out the extra MTRR's
\r
4586 call enable_var_mtrr()
\r
4587 Leave x86_setup_var_mtrrs
\r
4591 Fixed MTRRs : Enabled
\r
4592 Variable MTRRs: Enabled
\r
4595 Setting up local apic... apic_id: 0x05 done.
\r
4597 CPU model: AMD Processor model unknown
\r
4598 siblings = 05, CPU #5 initialized
\r
4599 All AP CPUs stopped
\r
4600 SB900 - Early.c - sb_After_Pci_Init - Start.
\r
4601 SB900 - Cfg.c - sb900_cimx_config - Start.
\r
4602 SB900 - Cfg.c - sb900_cimx_config - End.
\r
4603 SB900 - Early.c - sb_After_Pci_Init - End.
\r
4604 SB900 - Early.c - sb_Mid_Post_Init - Start.
\r
4605 SB900 - Cfg.c - sb900_cimx_config - Start.
\r
4606 SB900 - Cfg.c - sb900_cimx_config - End.
\r
4607 SB900 - Early.c - sb_Mid_Post_Init - End.
\r
4612 NB: Function 3 Misc Control.. done.
\r
4615 IOAPIC: Initializing IOAPIC at 0xdc000000
\r
4616 IOAPIC: Bootstrap Processor Local APIC = 0x00
\r
4618 IOAPIC: 24 interrupts
\r
4619 IOAPIC: Enabling interrupts on FSB
\r
4620 IOAPIC not responding.
\r
4637 NB: Function 3 Misc Control.. done.
\r
4639 Devices initialized
\r
4640 Show all devs...After init.
\r
4641 Root Device: enabled 1
\r
4642 APIC_CLUSTER: 0: enabled 1
\r
4643 APIC: 00: enabled 1
\r
4644 PCI_DOMAIN: 0000: enabled 1
\r
4645 PCI: 00:18.0: enabled 1
\r
4646 PCI: 00:00.0: enabled 1
\r
4647 PCI: 00:00.1: enabled 0
\r
4648 PCI: 00:02.0: enabled 1
\r
4649 PCI: 00:03.0: enabled 0
\r
4650 PCI: 00:04.0: enabled 0
\r
4651 PCI: 00:05.0: enabled 0
\r
4652 PCI: 00:06.0: enabled 0
\r
4653 PCI: 00:07.0: enabled 0
\r
4654 PCI: 00:08.0: enabled 0
\r
4655 PCI: 00:09.0: enabled 0
\r
4656 PCI: 00:0a.0: enabled 0
\r
4657 PCI: 00:0b.0: enabled 0
\r
4658 PCI: 00:0c.0: enabled 0
\r
4659 PCI: 00:0d.0: enabled 1
\r
4660 PCI: 00:11.0: enabled 1
\r
4661 PCI: 00:12.0: enabled 1
\r
4662 PCI: 00:12.2: enabled 1
\r
4663 PCI: 00:13.0: enabled 1
\r
4664 PCI: 00:13.2: enabled 1
\r
4665 PCI: 00:14.0: enabled 1
\r
4666 I2C: 00:50: enabled 1
\r
4667 I2C: 00:51: enabled 1
\r
4668 I2C: 00:52: enabled 1
\r
4669 I2C: 00:53: enabled 1
\r
4670 PCI: 00:14.1: enabled 1
\r
4671 PCI: 00:14.2: enabled 1
\r
4672 PCI: 00:14.3: enabled 1
\r
4673 PNP: 002e.0: enabled 0
\r
4674 PNP: 002e.1: enabled 0
\r
4675 PNP: 002e.2: enabled 1
\r
4676 PNP: 002e.3: enabled 1
\r
4677 PNP: 002e.5: enabled 1
\r
4678 PNP: 002e.6: enabled 0
\r
4679 PNP: 002e.7: enabled 0
\r
4680 PNP: 002e.8: enabled 0
\r
4681 PNP: 002e.9: enabled 0
\r
4682 PNP: 002e.a: enabled 0
\r
4683 PNP: 002e.b: enabled 1
\r
4684 PCI: 00:14.4: enabled 0
\r
4685 PCI: 00:14.5: enabled 1
\r
4686 PCI: 00:14.6: enabled 0
\r
4687 PCI: 00:15.0: enabled 1
\r
4688 PCI: 00:15.1: enabled 1
\r
4689 PCI: 00:15.2: enabled 1
\r
4690 PCI: 00:15.3: enabled 1
\r
4691 PCI: 00:16.0: enabled 1
\r
4692 PCI: 00:16.2: enabled 1
\r
4693 PCI: 00:18.1: enabled 1
\r
4694 PCI: 00:18.2: enabled 1
\r
4695 PCI: 00:18.3: enabled 1
\r
4696 PCI: 00:18.4: enabled 1
\r
4697 APIC: 01: enabled 1
\r
4698 APIC: 02: enabled 1
\r
4699 APIC: 03: enabled 1
\r
4700 APIC: 04: enabled 1
\r
4701 APIC: 05: enabled 1
\r
4702 PCI: 00:00.0: enabled 1
\r
4703 PCI: 00:11.0: enabled 1
\r
4704 PCI: 00:12.0: enabled 1
\r
4705 PCI: 00:12.2: enabled 1
\r
4706 PCI: 00:13.0: enabled 1
\r
4707 PCI: 00:13.2: enabled 1
\r
4708 PCI: 00:14.0: enabled 1
\r
4709 PCI: 00:14.1: enabled 1
\r
4710 PCI: 00:14.2: enabled 1
\r
4711 PCI: 00:14.3: enabled 1
\r
4712 PCI: 00:14.4: enabled 1
\r
4713 PCI: 00:14.5: enabled 1
\r
4714 PCI: 00:16.0: enabled 1
\r
4715 PCI: 00:16.2: enabled 1
\r
4716 PCI: 00:18.0: enabled 1
\r
4717 PCI: 00:18.1: enabled 1
\r
4718 PCI: 00:18.2: enabled 1
\r
4719 PCI: 00:18.3: enabled 1
\r
4720 PCI: 00:18.4: enabled 1
\r
4722 Initializing CBMEM area to 0xcfff0000 (65536 bytes)
\r
4723 Adding CBMEM entry as no. 1
\r
4724 Moving GDT to cfff0200...ok
\r
4725 High Tables Base is cfff0000.
\r
4727 SB900 - Early.c - sb_Late_Post - Start.
\r
4728 SB900 - Cfg.c - sb900_cimx_config - Start.
\r
4729 SB900 - Cfg.c - sb900_cimx_config - End.
\r
4730 SB900 - Early.c - sb_Late_Post - End.
\r
4731 Writing IRQ routing tables to 0xf0000...write_pirq_routing_table done.
\r
4732 Adding CBMEM entry as no. 2
\r
4733 Writing IRQ routing tables to 0xcfff0400...write_pirq_routing_table done.
\r
4734 PIRQ table: 48 bytes.
\r
4736 Wrote the mp table end at: 000f0410 - 000f055c
\r
4737 Adding CBMEM entry as no. 3
\r
4738 Wrote the mp table end at: cfff1410 - cfff155c
\r
4739 MP table: 348 bytes.
\r
4741 Adding CBMEM entry as no. 4
\r
4742 ACPI: Writing ACPI tables at cfff2400...
\r
4743 ACPI: * HPET at cfff24c8
\r
4744 ACPI: added table 1/32, length now 40
\r
4745 ACPI: * MADT at cfff2500
\r
4746 ACPI: added table 2/32, length now 44
\r
4747 ACPI: * SRAT at cfff2580
\r
4748 SRAT: lapic cpu_index=00, node_id=00, apic_id=00
\r
4749 SRAT: lapic cpu_index=01, node_id=00, apic_id=01
\r
4750 SRAT: lapic cpu_index=02, node_id=00, apic_id=02
\r
4751 SRAT: lapic cpu_index=03, node_id=00, apic_id=03
\r
4752 SRAT: lapic cpu_index=04, node_id=00, apic_id=04
\r
4753 SRAT: lapic cpu_index=05, node_id=00, apic_id=05
\r
4754 set_srat_mem: dev PCI_DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280
\r
4755 set_srat_mem: dev PCI_DOMAIN: 0000, res->index=0020 startk=00000300, sizek=0033fd00
\r
4756 set_srat_mem: dev PCI_DOMAIN: 0000, res->index=0030 startk=00400000, sizek=00480000
\r
4757 ACPI: added table 3/32, length now 48
\r
4758 ACPI: * SLIT at cfff2688
\r
4759 ACPI: added table 4/32, length now 52
\r
4760 ACPI: * SSDT at cfff26c0
\r
4761 ACPI: added table 5/32, length now 56
\r
4762 ACPI: * SSDT for PState at cfff2cf5
\r
4763 ACPI: * DSDT at cfff2cf8
\r
4764 ACPI: * DSDT @ cfff2cf8 Length 288b
\r
4765 ACPI: * FACS at cfff5588
\r
4766 ACPI: * FADT at cfff55c8
\r
4767 ACPI_BLK_BASE: 0x0800
\r
4768 ACPI: added table 6/32, length now 60
\r
4770 ACPI tables: 12988 bytes.
\r
4771 Adding CBMEM entry as no. 5
\r
4772 smbios_write_tables: cfffd800
\r
4773 Root Device (ASUS M5A99X-EVO Mainboard)
\r
4774 APIC_CLUSTER: 0 (AMD FAM10 Root Complex)
\r
4775 APIC: 00 (socket AM3)
\r
4776 PCI_DOMAIN: 0000 (AMD FAM10 Root Complex)
\r
4777 PCI: 00:18.0 (AMD FAM10 Northbridge)
\r
4778 PCI: 00:00.0 (ATI rd890)
\r
4779 PCI: 00:00.1 (ATI rd890)
\r
4780 PCI: 00:02.0 (ATI rd890)
\r
4781 PCI: 00:03.0 (ATI rd890)
\r
4782 PCI: 00:04.0 (ATI rd890)
\r
4783 PCI: 00:05.0 (ATI rd890)
\r
4784 PCI: 00:06.0 (ATI rd890)
\r
4785 PCI: 00:07.0 (ATI rd890)
\r
4786 PCI: 00:08.0 (ATI rd890)
\r
4787 PCI: 00:09.0 (ATI rd890)
\r
4788 PCI: 00:0a.0 (ATI rd890)
\r
4789 PCI: 00:0b.0 (ATI rd890)
\r
4790 PCI: 00:0c.0 (ATI rd890)
\r
4791 PCI: 00:0d.0 (ATI rd890)
\r
4792 PCI: 00:11.0 (ATI SB900)
\r
4793 PCI: 00:12.0 (ATI SB900)
\r
4794 PCI: 00:12.2 (ATI SB900)
\r
4795 PCI: 00:13.0 (ATI SB900)
\r
4796 PCI: 00:13.2 (ATI SB900)
\r
4797 PCI: 00:14.0 (ATI SB900)
\r
4802 PCI: 00:14.1 (ATI SB900)
\r
4803 PCI: 00:14.2 (ATI SB900)
\r
4804 PCI: 00:14.3 (ATI SB900)
\r
4805 PNP: 002e.0 (ITE IT8721F Super I/O)
\r
4806 PNP: 002e.1 (ITE IT8721F Super I/O)
\r
4807 PNP: 002e.2 (ITE IT8721F Super I/O)
\r
4808 PNP: 002e.3 (ITE IT8721F Super I/O)
\r
4809 PNP: 002e.5 (ITE IT8721F Super I/O)
\r
4810 PNP: 002e.6 (ITE IT8721F Super I/O)
\r
4811 PNP: 002e.7 (ITE IT8721F Super I/O)
\r
4812 PNP: 002e.8 (ITE IT8721F Super I/O)
\r
4813 PNP: 002e.9 (ITE IT8721F Super I/O)
\r
4814 PNP: 002e.a (ITE IT8721F Super I/O)
\r
4815 PNP: 002e.b (ITE IT8721F Super I/O)
\r
4816 PCI: 00:14.4 (ATI SB900)
\r
4817 PCI: 00:14.5 (ATI SB900)
\r
4818 PCI: 00:14.6 (ATI SB900)
\r
4819 PCI: 00:15.0 (ATI SB900)
\r
4820 PCI: 00:15.1 (ATI SB900)
\r
4821 PCI: 00:15.2 (ATI SB900)
\r
4822 PCI: 00:15.3 (ATI SB900)
\r
4823 PCI: 00:16.0 (ATI SB900)
\r
4824 PCI: 00:16.2 (ATI SB900)
\r
4825 PCI: 00:18.1 (AMD FAM10 Northbridge)
\r
4826 PCI: 00:18.2 (AMD FAM10 Northbridge)
\r
4827 PCI: 00:18.3 (AMD FAM10 Northbridge)
\r
4828 PCI: 00:18.4 (AMD FAM10 Northbridge)
\r
4853 SMBIOS tables: 275 bytes.
\r
4855 Adding CBMEM entry as no. 6
\r
4856 Writing high table forward entry at 0x00000500
\r
4857 Wrote coreboot table at: 00000500 - 00000518 checksum 4fde
\r
4858 New low_table_end: 0x00000518
\r
4859 Now going to write high coreboot table at 0xcfffe000
\r
4860 rom_table_end = 0xcfffe000
\r
4861 Adjust low_table_end from 0x00000518 to 0x00001000
\r
4862 Adjust rom_table_end from 0xcfffe000 to 0xd0000000
\r
4863 Adding high table area
\r
4864 coreboot memory table:
\r
4865 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
\r
4866 1. 0000000000001000-000000000009ffff: RAM
\r
4867 2. 00000000000c0000-00000000cffeffff: RAM
\r
4868 3. 00000000cfff0000-00000000cfffffff: CONFIGURATION TABLES
\r
4869 4. 00000000e0000000-00000000efffffff: RESERVED
\r
4870 5. 0000000100000000-000000021fffffff: RAM
\r
4871 Wrote coreboot table at: cfffe000 - cfffe1e4 checksum 6447
\r
4872 coreboot table: 484 bytes.
\r
4875 Multiboot Information structure has been written.
\r
4876 0. FREE SPACE d0000000 00000000
\r
4877 1. GDT cfff0200 00000200
\r
4878 2. IRQ TABLE cfff0400 00001000
\r
4879 3. SMP TABLE cfff1400 00001000
\r
4880 4. ACPI cfff2400 0000b400
\r
4881 5. SMBIOS cfffd800 00000800
\r
4882 6. COREBOOT cfffe000 00002000
\r
4883 Searching for fallback/payload
\r
4884 Check cmos_layout.bin
\r
4885 Check fallback/romstage
\r
4886 Check fallback/coreboot_ram
\r
4887 Check fallback/payload
\r
4889 Loading segment from rom address 0xffc43ef8
\r
4890 data (compression=1)
\r
4891 New segment dstaddr 0xed150 memsize 0x12eb0 srcaddr 0xffc43f30 filesize 0x9759
\r
4892 (cleaned up) New segment addr 0xed150 size 0x12eb0 offset 0xffc43f30 filesize 0x9759
\r
4893 Loading segment from rom address 0xffc43f14
\r
4894 Entry Point 0x00000000
\r
4895 Loading Segment: addr: 0x00000000000ed150 memsz: 0x0000000000012eb0 filesz: 0x0000000000009759
\r
4896 lb: [0x0000000000200000, 0x0000000000340000)
\r
4897 Post relocation: addr: 0x00000000000ed150 memsz: 0x0000000000012eb0 filesz: 0x0000000000009759
\r
4899 [ 0x000ed150, 00100000, 0x00100000) <- ffc43f30
\r
4900 dest 000ed150, end 00100000, bouncebuffer cfd70000
\r
4902 Jumping to boot code at fc63c
\r
4904 entry = 0x000fc63c
\r
4905 lb_start = 0x00200000
\r
4906 lb_size = 0x00140000
\r
4907 adjust = 0xcfcb0000
\r
4908 buffer = 0xcfd70000
\r
4909 elf_boot_notes = 0x0023b1d0
\r
4910 adjusted_boot_notes = 0xcfeeb1d0
\r
4911 Start bios (version 1.6.3-20120208_175037-oldx86)
\r
4913 Attempting to find coreboot table
\r
4914 Found coreboot table forwarder.
\r
4915 Now attempting to find coreboot memory map
\r
4916 Add to e820 map: 00000000 00001000 2
\r
4917 Add to e820 map: 00001000 0009f000 1
\r
4918 Add to e820 map: 000c0000 cff30000 1
\r
4919 Add to e820 map: cfff0000 00010000 2
\r
4920 Add to e820 map: e0000000 10000000 2
\r
4921 Add to e820 map: 00000000 20000000 1
\r
4922 Add to e820 map: 00000000 00004000 1
\r
4923 Found mainboard ASUS M5A99X-EVO
\r
4924 Found CBFS header at 0xfffffca0
\r
4925 Add to e820 map: 000a0000 00050000 -1
\r
4926 Add to e820 map: 000f0000 00010000 2
\r
4927 Ram Size=0xcfff0000 (0x0000000120000000 high)
\r
4929 Add to e820 map: cffe0000 00010000 2
\r
4932 Add to e820 map: 0009fc00 00000400 2
\r
4949 Searching CBFS for prefix etc/extra-pci-roots
\r
4950 Found CBFS file cmos_layout.bin
\r
4951 Found CBFS file fallback/romstage
\r
4952 Found CBFS file fallback/coreboot_ram
\r
4953 Found CBFS file fallback/payload
\r
4954 Found CBFS file config
\r
4956 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdfe70 (detail=0xcffdfee0)
\r
4957 PCI device 00:00.0 (vd=1002:5a14 c=0600)
\r
4958 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdfdd0 (detail=0xcffdfe40)
\r
4959 PCI device 00:11.0 (vd=1002:4393 c=0101)
\r
4960 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdfd30 (detail=0xcffdfda0)
\r
4961 PCI device 00:12.0 (vd=1002:4397 c=0c03)
\r
4962 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdfc90 (detail=0xcffdfd00)
\r
4963 PCI device 00:12.2 (vd=1002:4396 c=0c03)
\r
4964 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdfbf0 (detail=0xcffdfc60)
\r
4965 PCI device 00:13.0 (vd=1002:4397 c=0c03)
\r
4966 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdfb50 (detail=0xcffdfbc0)
\r
4967 PCI device 00:13.2 (vd=1002:4396 c=0c03)
\r
4968 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdfab0 (detail=0xcffdfb20)
\r
4969 PCI device 00:14.0 (vd=1002:4385 c=0c05)
\r
4970 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdfa10 (detail=0xcffdfa80)
\r
4971 PCI device 00:14.1 (vd=1002:439c c=0101)
\r
4972 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdf970 (detail=0xcffdf9e0)
\r
4973 PCI device 00:14.2 (vd=1002:4383 c=0403)
\r
4974 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdf8d0 (detail=0xcffdf940)
\r
4975 PCI device 00:14.3 (vd=1002:439d c=0601)
\r
4976 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdf830 (detail=0xcffdf8a0)
\r
4977 PCI device 00:14.4 (vd=1002:4384 c=0604)
\r
4978 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdf790 (detail=0xcffdf800)
\r
4979 PCI device 00:14.5 (vd=1002:4399 c=0c03)
\r
4980 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdf6f0 (detail=0xcffdf760)
\r
4981 PCI device 00:16.0 (vd=1002:4397 c=0c03)
\r
4982 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdf650 (detail=0xcffdf6c0)
\r
4983 PCI device 00:16.2 (vd=1002:4396 c=0c03)
\r
4984 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdf5b0 (detail=0xcffdf620)
\r
4985 PCI device 00:18.0 (vd=1022:1200 c=0600)
\r
4986 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdf510 (detail=0xcffdf580)
\r
4987 PCI device 00:18.1 (vd=1022:1201 c=0600)
\r
4988 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdf470 (detail=0xcffdf4e0)
\r
4989 PCI device 00:18.2 (vd=1022:1202 c=0600)
\r
4990 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdf3d0 (detail=0xcffdf440)
\r
4991 PCI device 00:18.3 (vd=1022:1203 c=0600)
\r
4992 pmm_malloc zone=0x000f6758 handle=ffffffff size=112 align=10 ret=0xcffdf330 (detail=0xcffdf3a0)
\r
4993 PCI device 00:18.4 (vd=1022:1204 c=0600)
\r
4994 Found 19 PCI devices (max PCI bus is 01)
\r
4995 Searching CBFS for prefix bootorder
\r
4996 Found CBFS file cmos_layout.bin
\r
4997 Found CBFS file fallback/romstage
\r
4998 Found CBFS file fallback/coreboot_ram
\r
4999 Found CBFS file fallback/payload
\r
5000 Found CBFS file config
\r
5002 Found 1 cpu(s) max supported 1 cpu(s)
\r
5004 hhhahnhale_dhc1wpiirq =q=00rf00q=0fee0
\r
5006 init PNPBIOS table
\r
5007 init keybohaahhhdarhnddleanwpi_
\rh i
5008 rc10c1q=rq= i=f00q0f0e0rq=3i0000firfd3=cf5q3
\r
5010 Relocating coreboot bihohnas dlte_hahnhdadlebanlpi_hw1 irecrsqq=00q=f=
\rff