From e42af2345f9574b9c54ac4deb799670581c8680d Mon Sep 17 00:00:00 2001 From: Stefan Rebernig Date: Tue, 21 Dec 2010 21:41:24 +0100 Subject: [PATCH] added byte enable, tested ldi, ldb, stb --- 3a_asm/transcript | 3040 +++++---------------------------- cpu/de1_cyclone_fmax.tcl | 2 + cpu/sim/testcore.do | 2 + cpu/src/core_top.vhd | 60 +- cpu/src/fetch_stage_b.vhd | 2 +- cpu/src/mem_pkg.vhd | 19 + cpu/src/r_w_ram_be.vhd | 23 + cpu/src/r_w_ram_be_b.vhd | 41 + cpu/src/rom_b.vhd | 20 +- cpu/src/writeback_stage_b.vhd | 27 +- dt/dt.qsf | 39 +- 11 files changed, 583 insertions(+), 2692 deletions(-) create mode 100644 cpu/src/r_w_ram_be.vhd create mode 100644 cpu/src/r_w_ram_be_b.vhd diff --git a/3a_asm/transcript b/3a_asm/transcript index 32d3de3..5eff8f9 100644 --- a/3a_asm/transcript +++ b/3a_asm/transcript @@ -19,2486 +19,19 @@ ls # Text # transcript # tst +pwd +# /home/stefan/processor/calu/3a_asm cd .. -ls -# 1_isacmp -# 2_isa -# 3a_asm -# 3_asmsim -# 3b_sim -# 3c_disasm -# 3_test -# 4_block -# 8_benchs -# cpu -# dt -# isasty -# transcript -cd cpu -cd sim -# reading modelsim.ini -ls -# modelsim.ini -# testcore1.do -# testcore.do -# vsim.wlf -# wave.do -# work -do testcore.do -# ** Warning: (vlib-34) Library already exists at "work". -# Modifying modelsim.ini -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling package mem_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling entity r_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of r_w_ram -# -- Loading entity r_w_ram -# ** Warning: ../src/r_w_ram_b.vhd(118): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling entity r2_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of r2_w_ram -# -- Loading entity r2_w_ram -# ** Warning: ../src/r2_w_ram_b.vhd(18): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling package common_pkg -# -- Compiling package body common_pkg -# -- Loading package common_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling package extension_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package extension_uart_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package extension_uart_pkg -# -- Compiling entity extension_uart -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# ** Error: (vcom-13) Recompile work.core_pkg because work.extension_pkg has changed. -# ** Error: ../src/extension_uart_b.vhd(6): (vcom-1195) Cannot find expanded name "work.core_pkg". -# ** Error: ../src/extension_uart_b.vhd(6): Unknown expanded name. -# -- Loading package mem_pkg -# -- Loading package extension_pkg -# -- Loading package extension_uart_pkg -# ** Error: ../src/extension_uart_b.vhd(12): VHDL Compiler exiting -# ** Error: /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed. -# Error in macro ./testcore.do line 13 -# /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed. -# while executing -# "vcom -work work ../src/extension_uart_b.vhd" -do testcore.do -# ** Warning: (vlib-34) Library already exists at "work". -# Modifying modelsim.ini -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling package mem_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling entity r_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of r_w_ram -# -- Loading entity r_w_ram -# ** Warning: ../src/r_w_ram_b.vhd(118): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling entity r2_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of r2_w_ram -# -- Loading entity r2_w_ram -# ** Warning: ../src/r2_w_ram_b.vhd(18): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling package common_pkg -# -- Compiling package body common_pkg -# -- Loading package common_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package core_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling package extension_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package extension_uart_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package extension_uart_pkg -# -- Compiling entity extension_uart -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Loading package extension_uart_pkg -# -- Compiling architecture behav of extension_uart -# -- Loading entity extension_uart -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package extension_7seg_pkg -# -- Compiling package body extension_7seg_pkg -# -- Loading package extension_7seg_pkg -# ** Error: ../src/extension_7seg_pkg.vhd(76): (vcom-1014) Array type case expression must be of a locally static subtype. -# ** Error: ../src/extension_7seg_pkg.vhd(98): VHDL Compiler exiting -# ** Error: /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed. -# Error in macro ./testcore.do line 15 -# /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed. -# while executing -# "vcom -work work ../src/extension_7seg_pkg.vhd" -do testcore.do -# ** Warning: (vlib-34) Library already exists at "work". -# Modifying modelsim.ini -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling package mem_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling entity r_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of r_w_ram -# -- Loading entity r_w_ram -# ** Warning: ../src/r_w_ram_b.vhd(118): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling entity r2_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of r2_w_ram -# -- Loading entity r2_w_ram -# ** Warning: ../src/r2_w_ram_b.vhd(18): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling package common_pkg -# -- Compiling package body common_pkg -# -- Loading package common_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package core_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling package extension_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package extension_uart_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package extension_uart_pkg -# -- Compiling entity extension_uart -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Loading package extension_uart_pkg -# -- Compiling architecture behav of extension_uart -# -- Loading entity extension_uart -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package extension_7seg_pkg -# -- Compiling package body extension_7seg_pkg -# -- Loading package extension_7seg_pkg -# ** Error: ../src/extension_7seg_pkg.vhd(79): (vcom-1272) Length of expected is 6; length of actual is 5. -# ** Error: ../src/extension_7seg_pkg.vhd(80): (vcom-1272) Length of expected is 6; length of actual is 5. -# ** Error: ../src/extension_7seg_pkg.vhd(81): (vcom-1272) Length of expected is 6; length of actual is 5. -# ** Error: ../src/extension_7seg_pkg.vhd(82): (vcom-1272) Length of expected is 6; length of actual is 5. -# ** Error: ../src/extension_7seg_pkg.vhd(83): (vcom-1272) Length of expected is 6; length of actual is 5. -# ** Error: ../src/extension_7seg_pkg.vhd(84): (vcom-1272) Length of expected is 6; length of actual is 5. -# ** Error: ../src/extension_7seg_pkg.vhd(85): (vcom-1272) Length of expected is 6; length of actual is 5. -# ** Error: ../src/extension_7seg_pkg.vhd(86): (vcom-1272) Length of expected is 6; length of actual is 5. -# ** Error: ../src/extension_7seg_pkg.vhd(87): (vcom-1272) Length of expected is 6; length of actual is 5. -# ** Error: ../src/extension_7seg_pkg.vhd(88): (vcom-1272) Length of expected is 6; length of actual is 5. -# ** Error: ../src/extension_7seg_pkg.vhd(89): (vcom-1272) Length of expected is 6; length of actual is 5. -# ** Error: ../src/extension_7seg_pkg.vhd(90): (vcom-1272) Length of expected is 6; length of actual is 5. -# ** Error: ../src/extension_7seg_pkg.vhd(91): (vcom-1272) Length of expected is 6; length of actual is 5. -# ** Error: ../src/extension_7seg_pkg.vhd(92): (vcom-1272) Length of expected is 6; length of actual is 5. -# ** Error: ../src/extension_7seg_pkg.vhd(93): (vcom-1272) Length of expected is 6; length of actual is 5. -# ** Error: ../src/extension_7seg_pkg.vhd(94): (vcom-1272) Length of expected is 6; length of actual is 5. -# ** Error: ../src/extension_7seg_pkg.vhd(100): VHDL Compiler exiting -# ** Error: /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed. -# Error in macro ./testcore.do line 15 -# /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed. -# while executing -# "vcom -work work ../src/extension_7seg_pkg.vhd" -do testcore.do -# ** Warning: (vlib-34) Library already exists at "work". -# Modifying modelsim.ini -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling package mem_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling entity r_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of r_w_ram -# -- Loading entity r_w_ram -# ** Warning: ../src/r_w_ram_b.vhd(118): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling entity r2_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of r2_w_ram -# -- Loading entity r2_w_ram -# ** Warning: ../src/r2_w_ram_b.vhd(18): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling package common_pkg -# -- Compiling package body common_pkg -# -- Loading package common_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package core_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling package extension_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package extension_uart_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package extension_uart_pkg -# -- Compiling entity extension_uart -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Loading package extension_uart_pkg -# -- Compiling architecture behav of extension_uart -# -- Loading entity extension_uart -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package extension_7seg_pkg -# -- Compiling package body extension_7seg_pkg -# -- Loading package extension_7seg_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package extension_7seg_pkg -# -- Compiling entity extension_7seg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Loading package extension_7seg_pkg -# -- Compiling architecture behav of extension_7seg -# -- Loading entity extension_7seg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling entity rs232_tx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling architecture beh of rs232_tx -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading entity rs232_tx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling entity rs232_rx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling architecture beh of rs232_rx -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading entity rs232_rx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity decoder -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling architecture behav_d of decoder -# -- Loading entity decoder -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity fetch_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Compiling architecture behav of fetch_stage -# -- Loading entity fetch_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity decode_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling architecture behav of decode_stage -# -- Loading entity decode_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package alu_pkg -# -- Compiling package body alu_pkg -# -- Loading package alu_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling package extension_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture add_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture and_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture or_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture xor_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture shift_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling entity alu -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture behaviour of alu -# -- Loading entity alu -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling package extension_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling entity extension_gpm -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Compiling architecture behav of extension_gpm -# -- Loading entity extension_gpm -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling entity execute_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture behav of execute_stage -# -- Loading entity execute_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling entity writeback_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Loading package extension_uart_pkg -# -- Loading package extension_7seg_pkg -# -- Compiling architecture behav of writeback_stage -# -- Loading entity writeback_stage -# ** Warning: ../src/writeback_stage_b.vhd(206): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(220): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(233): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(245): Case choice must be a locally static expression. -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity pipeline_tb -# -- Compiling architecture behavior of pipeline_tb -# ** Error: ../src/pipeline_tb.vhd(138): Signal "sseg0" is type ieee.std_logic_1164.std_logic_vector; expecting type ieee.std_logic_1164.std_logic. -# ** Error: ../src/pipeline_tb.vhd(207): VHDL Compiler exiting -# ** Error: /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed. -# Error in macro ./testcore.do line 58 -# /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed. -# while executing -# "vcom -work work ../src/pipeline_tb.vhd" -do testcore.do -# ** Warning: (vlib-34) Library already exists at "work". -# Modifying modelsim.ini -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling package mem_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling entity r_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of r_w_ram -# -- Loading entity r_w_ram -# ** Warning: ../src/r_w_ram_b.vhd(118): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling entity r2_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of r2_w_ram -# -- Loading entity r2_w_ram -# ** Warning: ../src/r2_w_ram_b.vhd(18): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling package common_pkg -# -- Compiling package body common_pkg -# -- Loading package common_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package core_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling package extension_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package extension_uart_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package extension_uart_pkg -# -- Compiling entity extension_uart -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Loading package extension_uart_pkg -# -- Compiling architecture behav of extension_uart -# -- Loading entity extension_uart -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package extension_7seg_pkg -# -- Compiling package body extension_7seg_pkg -# -- Loading package extension_7seg_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package extension_7seg_pkg -# -- Compiling entity extension_7seg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Loading package extension_7seg_pkg -# -- Compiling architecture behav of extension_7seg -# -- Loading entity extension_7seg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling entity rs232_tx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling architecture beh of rs232_tx -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading entity rs232_tx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling entity rs232_rx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling architecture beh of rs232_rx -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading entity rs232_rx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity decoder -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling architecture behav_d of decoder -# -- Loading entity decoder -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity fetch_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Compiling architecture behav of fetch_stage -# -- Loading entity fetch_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity decode_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling architecture behav of decode_stage -# -- Loading entity decode_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package alu_pkg -# -- Compiling package body alu_pkg -# -- Loading package alu_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling package extension_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture add_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture and_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture or_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture xor_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture shift_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling entity alu -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture behaviour of alu -# -- Loading entity alu -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling package extension_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling entity extension_gpm -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Compiling architecture behav of extension_gpm -# -- Loading entity extension_gpm -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling entity execute_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture behav of execute_stage -# -- Loading entity execute_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling entity writeback_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Loading package extension_uart_pkg -# -- Loading package extension_7seg_pkg -# -- Compiling architecture behav of writeback_stage -# -- Loading entity writeback_stage -# ** Warning: ../src/writeback_stage_b.vhd(206): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(220): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(233): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(245): Case choice must be a locally static expression. -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity pipeline_tb -# -- Compiling architecture behavior of pipeline_tb -# -- Compiling configuration pipeline_conf_beh -# -- Loading entity pipeline_tb -# -- Loading architecture behavior of pipeline_tb -# -- Loading entity fetch_stage -# -- Loading entity decode_stage -# -- Loading package alu_pkg -# -- Loading entity execute_stage -# -- Loading entity writeback_stage -# vsim -t ns work.pipeline_conf_beh -# Loading std.standard -# Loading ieee.std_logic_1164(body) -# Loading ieee.numeric_std(body) -# Loading work.common_pkg(body) -# Loading work.extension_pkg -# Loading work.core_pkg -# Loading work.alu_pkg(body) -# Loading work.pipeline_conf_beh -# Loading work.pipeline_tb(behavior) -# Loading work.mem_pkg -# Loading work.fetch_stage(behav) -# Loading work.r_w_ram(behaviour) -# Loading work.decode_stage(behav) -# Loading work.r2_w_ram(behaviour) -# Loading work.decoder(behav_d) -# Loading work.execute_stage(behav) -# Loading work.alu(behaviour) -# Loading work.exec_op(add_op) -# Loading work.exec_op(and_op) -# Loading work.exec_op(or_op) -# Loading work.exec_op(xor_op) -# Loading work.exec_op(shift_op) -# Loading work.extension_gpm(behav) -# Loading work.extension_uart_pkg -# Loading work.extension_7seg_pkg(body) -# Loading work.writeback_stage(behav) -# Loading work.extension_uart(behav) -# Loading ieee.std_logic_arith(body) -# Loading ieee.std_logic_unsigned(body) -# Loading work.rs232_tx(beh) -# Loading work.rs232_rx(beh) -# Loading work.extension_7seg(behav) -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/gpmp_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 1 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 3 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 4 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 5 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 30 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram -do testcore.do -# ** Warning: (vlib-34) Library already exists at "work". -# Modifying modelsim.ini -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling package mem_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling entity r_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of r_w_ram -# -- Loading entity r_w_ram -# ** Warning: ../src/r_w_ram_b.vhd(118): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling entity r2_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of r2_w_ram -# -- Loading entity r2_w_ram -# ** Warning: ../src/r2_w_ram_b.vhd(18): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling package common_pkg -# -- Compiling package body common_pkg -# -- Loading package common_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package core_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling package extension_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package extension_uart_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package extension_uart_pkg -# -- Compiling entity extension_uart -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Loading package extension_uart_pkg -# -- Compiling architecture behav of extension_uart -# -- Loading entity extension_uart -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package extension_7seg_pkg -# -- Compiling package body extension_7seg_pkg -# -- Loading package extension_7seg_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package extension_7seg_pkg -# -- Compiling entity extension_7seg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Loading package extension_7seg_pkg -# -- Compiling architecture behav of extension_7seg -# -- Loading entity extension_7seg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling entity rs232_tx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling architecture beh of rs232_tx -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading entity rs232_tx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling entity rs232_rx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling architecture beh of rs232_rx -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading entity rs232_rx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity decoder -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling architecture behav_d of decoder -# -- Loading entity decoder -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity fetch_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Compiling architecture behav of fetch_stage -# -- Loading entity fetch_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity decode_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling architecture behav of decode_stage -# -- Loading entity decode_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package alu_pkg -# -- Compiling package body alu_pkg -# -- Loading package alu_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling package extension_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture add_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture and_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture or_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture xor_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture shift_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling entity alu -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture behaviour of alu -# -- Loading entity alu -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling package extension_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling entity extension_gpm -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Compiling architecture behav of extension_gpm -# -- Loading entity extension_gpm -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling entity execute_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture behav of execute_stage -# -- Loading entity execute_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling entity writeback_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Loading package extension_uart_pkg -# -- Loading package extension_7seg_pkg -# -- Compiling architecture behav of writeback_stage -# -- Loading entity writeback_stage -# ** Warning: ../src/writeback_stage_b.vhd(206): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(220): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(233): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(245): Case choice must be a locally static expression. -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity pipeline_tb -# -- Compiling architecture behavior of pipeline_tb -# -- Compiling configuration pipeline_conf_beh -# -- Loading entity pipeline_tb -# -- Loading architecture behavior of pipeline_tb -# -- Loading entity fetch_stage -# -- Loading entity decode_stage -# -- Loading package alu_pkg -# -- Loading entity execute_stage -# -- Loading entity writeback_stage -# vsim -t ns work.pipeline_conf_beh -# Loading std.standard -# Loading ieee.std_logic_1164(body) -# Loading ieee.numeric_std(body) -# Loading work.common_pkg(body) -# Loading work.extension_pkg -# Loading work.core_pkg -# Loading work.alu_pkg(body) -# Loading work.pipeline_conf_beh -# Loading work.pipeline_tb(behavior) -# Loading work.mem_pkg -# Loading work.fetch_stage(behav) -# Loading work.r_w_ram(behaviour) -# Loading work.decode_stage(behav) -# Loading work.r2_w_ram(behaviour) -# Loading work.decoder(behav_d) -# Loading work.execute_stage(behav) -# Loading work.alu(behaviour) -# Loading work.exec_op(add_op) -# Loading work.exec_op(and_op) -# Loading work.exec_op(or_op) -# Loading work.exec_op(xor_op) -# Loading work.exec_op(shift_op) -# Loading work.extension_gpm(behav) -# Loading work.extension_uart_pkg -# Loading work.extension_7seg_pkg(body) -# Loading work.writeback_stage(behav) -# Loading work.extension_uart(behav) -# Loading ieee.std_logic_arith(body) -# Loading ieee.std_logic_unsigned(body) -# Loading work.rs232_tx(beh) -# Loading work.rs232_rx(beh) -# Loading work.extension_7seg(behav) -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/gpmp_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 1 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 3 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 4 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 5 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 30 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram -do testcore.do -# ** Warning: (vlib-34) Library already exists at "work". -# Modifying modelsim.ini -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling package mem_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling entity r_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of r_w_ram -# -- Loading entity r_w_ram -# ** Warning: ../src/r_w_ram_b.vhd(118): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. -# ** Error: ../src/r_w_ram_b.vhd(234): (vcom-1014) Array type case expression must be of a locally static subtype. -# ** Warning: ../src/r_w_ram_b.vhd(236): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(237): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(238): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(240): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(241): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(242): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(244): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(245): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(246): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(249): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(250): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(251): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(252): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(253): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(255): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(256): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(257): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(258): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(259): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(260): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(261): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(262): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(263): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(265): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(266): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(267): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(270): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(271): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(272): Case choice must be a locally static expression. -# ** Warning: ../src/r_w_ram_b.vhd(273): Case choice must be a locally static expression. -# ** Error: ../src/r_w_ram_b.vhd(302): VHDL Compiler exiting -# ** Error: /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed. -# Error in macro ./testcore.do line 6 -# /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed. -# while executing -# "vcom -work work ../src/r_w_ram_b.vhd" -do testcore.do -# ** Warning: (vlib-34) Library already exists at "work". -# Modifying modelsim.ini -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling package mem_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling entity r_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of r_w_ram -# -- Loading entity r_w_ram -# ** Warning: ../src/r_w_ram_b.vhd(120): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. -# ** Warning: [14] ../src/r_w_ram_b.vhd(238): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(239): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(240): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(242): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(243): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(244): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(246): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(247): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(248): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(251): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(252): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(253): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(254): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(255): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(257): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(258): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(259): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(260): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(261): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(262): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(263): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(264): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(265): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(267): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(268): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(269): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(272): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(273): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(274): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(275): (vcom-1272) Length of expected is 32; length of actual is 11. -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling entity r2_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of r2_w_ram -# -- Loading entity r2_w_ram -# ** Warning: ../src/r2_w_ram_b.vhd(18): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling package common_pkg -# -- Compiling package body common_pkg -# -- Loading package common_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package core_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling package extension_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package extension_uart_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package extension_uart_pkg -# -- Compiling entity extension_uart -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Loading package extension_uart_pkg -# -- Compiling architecture behav of extension_uart -# -- Loading entity extension_uart -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package extension_7seg_pkg -# -- Compiling package body extension_7seg_pkg -# -- Loading package extension_7seg_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package extension_7seg_pkg -# -- Compiling entity extension_7seg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Loading package extension_7seg_pkg -# -- Compiling architecture behav of extension_7seg -# -- Loading entity extension_7seg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling entity rs232_tx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling architecture beh of rs232_tx -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading entity rs232_tx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling entity rs232_rx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling architecture beh of rs232_rx -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading entity rs232_rx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity decoder -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling architecture behav_d of decoder -# -- Loading entity decoder -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity fetch_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Compiling architecture behav of fetch_stage -# -- Loading entity fetch_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity decode_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling architecture behav of decode_stage -# -- Loading entity decode_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package alu_pkg -# -- Compiling package body alu_pkg -# -- Loading package alu_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling package extension_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture add_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture and_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture or_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture xor_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture shift_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling entity alu -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture behaviour of alu -# -- Loading entity alu -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling package extension_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling entity extension_gpm -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Compiling architecture behav of extension_gpm -# -- Loading entity extension_gpm -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling entity execute_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture behav of execute_stage -# -- Loading entity execute_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling entity writeback_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Loading package extension_uart_pkg -# -- Loading package extension_7seg_pkg -# -- Compiling architecture behav of writeback_stage -# -- Loading entity writeback_stage -# ** Warning: ../src/writeback_stage_b.vhd(206): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(220): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(233): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(245): Case choice must be a locally static expression. -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity pipeline_tb -# -- Compiling architecture behavior of pipeline_tb -# -- Compiling configuration pipeline_conf_beh -# -- Loading entity pipeline_tb -# -- Loading architecture behavior of pipeline_tb -# -- Loading entity fetch_stage -# -- Loading entity decode_stage -# -- Loading package alu_pkg -# -- Loading entity execute_stage -# -- Loading entity writeback_stage -# vsim -t ns work.pipeline_conf_beh -# Loading std.standard -# Loading ieee.std_logic_1164(body) -# Loading ieee.numeric_std(body) -# Loading work.common_pkg(body) -# Loading work.extension_pkg -# Loading work.core_pkg -# Loading work.alu_pkg(body) -# Loading work.pipeline_conf_beh -# Loading work.pipeline_tb(behavior) -# Loading work.mem_pkg -# Loading work.fetch_stage(behav) -# Loading work.r_w_ram(behaviour) -# Loading work.decode_stage(behav) -# Loading work.r2_w_ram(behaviour) -# Loading work.decoder(behav_d) -# Loading work.execute_stage(behav) -# Loading work.alu(behaviour) -# Loading work.exec_op(add_op) -# Loading work.exec_op(and_op) -# Loading work.exec_op(or_op) -# Loading work.exec_op(xor_op) -# Loading work.exec_op(shift_op) -# Loading work.extension_gpm(behav) -# Loading work.extension_uart_pkg -# Loading work.extension_7seg_pkg(body) -# Loading work.writeback_stage(behav) -# Loading work.extension_uart(behav) -# Loading ieee.std_logic_arith(body) -# Loading ieee.std_logic_unsigned(body) -# Loading work.rs232_tx(beh) -# Loading work.rs232_rx(beh) -# Loading work.extension_7seg(behav) -# ** Fatal: (vsim-3420) Array lengths do not match. Left is 32 (31 downto 0). Right is 11 (10 downto 0). -# Time: 0 ns Iteration: 0 Process: /pipeline_tb/writeback_st/data_ram/line__305 File: ../src/r_w_ram_b.vhd -# Fatal error in Architecture behaviour at ../src/r_w_ram_b.vhd line 305 -# -# HDL call sequence: -# Stopped at ../src/r_w_ram_b.vhd 305 Architecture behaviour -# -do testcore.do -# ** Warning: (vlib-34) Library already exists at "work". -# Modifying modelsim.ini -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling package mem_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling entity r_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of r_w_ram -# -- Loading entity r_w_ram -# ** Warning: ../src/r_w_ram_b.vhd(120): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. -# ** Warning: [14] ../src/r_w_ram_b.vhd(238): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(239): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(240): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(242): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(243): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(244): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(246): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(247): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(248): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(251): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(252): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(253): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(254): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(255): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(257): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(258): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(259): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(260): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(261): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(262): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(263): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(264): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(265): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(267): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(268): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(269): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(272): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(273): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(274): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(275): (vcom-1272) Length of expected is 32; length of actual is 11. -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling entity r2_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of r2_w_ram -# -- Loading entity r2_w_ram -# ** Warning: ../src/r2_w_ram_b.vhd(18): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling package common_pkg -# -- Compiling package body common_pkg -# -- Loading package common_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package core_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling package extension_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package extension_uart_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package extension_uart_pkg -# -- Compiling entity extension_uart -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Loading package extension_uart_pkg -# -- Compiling architecture behav of extension_uart -# -- Loading entity extension_uart -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package extension_7seg_pkg -# -- Compiling package body extension_7seg_pkg -# -- Loading package extension_7seg_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package extension_7seg_pkg -# -- Compiling entity extension_7seg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Loading package extension_7seg_pkg -# -- Compiling architecture behav of extension_7seg -# -- Loading entity extension_7seg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling entity rs232_tx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling architecture beh of rs232_tx -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading entity rs232_tx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling entity rs232_rx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling architecture beh of rs232_rx -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading entity rs232_rx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity decoder -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling architecture behav_d of decoder -# -- Loading entity decoder -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity fetch_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Compiling architecture behav of fetch_stage -# -- Loading entity fetch_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity decode_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling architecture behav of decode_stage -# -- Loading entity decode_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package alu_pkg -# -- Compiling package body alu_pkg -# -- Loading package alu_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling package extension_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture add_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture and_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture or_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture xor_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture shift_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling entity alu -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture behaviour of alu -# -- Loading entity alu -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling package extension_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling entity extension_gpm -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Compiling architecture behav of extension_gpm -# -- Loading entity extension_gpm -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling entity execute_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture behav of execute_stage -# -- Loading entity execute_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling entity writeback_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Loading package extension_uart_pkg -# -- Loading package extension_7seg_pkg -# -- Compiling architecture behav of writeback_stage -# -- Loading entity writeback_stage -# ** Warning: ../src/writeback_stage_b.vhd(206): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(220): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(233): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(245): Case choice must be a locally static expression. -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity pipeline_tb -# -- Compiling architecture behavior of pipeline_tb -# -- Compiling configuration pipeline_conf_beh -# -- Loading entity pipeline_tb -# -- Loading architecture behavior of pipeline_tb -# -- Loading entity fetch_stage -# -- Loading entity decode_stage -# -- Loading package alu_pkg -# -- Loading entity execute_stage -# -- Loading entity writeback_stage -# vsim -t ns work.pipeline_conf_beh -# Loading std.standard -# Loading ieee.std_logic_1164(body) -# Loading ieee.numeric_std(body) -# Loading work.common_pkg(body) -# Loading work.extension_pkg -# Loading work.core_pkg -# Loading work.alu_pkg(body) -# Loading work.pipeline_conf_beh -# Loading work.pipeline_tb(behavior) -# Loading work.mem_pkg -# Loading work.fetch_stage(behav) -# Loading work.r_w_ram(behaviour) -# Loading work.decode_stage(behav) -# Loading work.r2_w_ram(behaviour) -# Loading work.decoder(behav_d) -# Loading work.execute_stage(behav) -# Loading work.alu(behaviour) -# Loading work.exec_op(add_op) -# Loading work.exec_op(and_op) -# Loading work.exec_op(or_op) -# Loading work.exec_op(xor_op) -# Loading work.exec_op(shift_op) -# Loading work.extension_gpm(behav) -# Loading work.extension_uart_pkg -# Loading work.extension_7seg_pkg(body) -# Loading work.writeback_stage(behav) -# Loading work.extension_uart(behav) -# Loading ieee.std_logic_arith(body) -# Loading ieee.std_logic_unsigned(body) -# Loading work.rs232_tx(beh) -# Loading work.rs232_rx(beh) -# Loading work.extension_7seg(behav) -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/gpmp_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 1 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 3 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 4 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 5 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst +cd cpu/sim +# reading modelsim.ini +ls +# modelsim.ini +# testcore1.do +# testcore.do +# transcript +# vsim.wlf +# wave.do +# work do testcore.do # ** Warning: (vlib-34) Library already exists at "work". # Modifying modelsim.ini @@ -2519,37 +52,6 @@ do testcore.do # -- Loading package mem_pkg # -- Compiling architecture behaviour of r_w_ram # -- Loading entity r_w_ram -# ** Warning: ../src/r_w_ram_b.vhd(120): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. -# ** Warning: [14] ../src/r_w_ram_b.vhd(238): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(239): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(240): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(242): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(243): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(244): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(246): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(247): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(248): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(251): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(252): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(253): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(254): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(255): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(257): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(258): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(259): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(260): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(261): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(262): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(263): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(264): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(265): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(267): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(268): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(269): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(272): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(273): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(274): (vcom-1272) Length of expected is 32; length of actual is 11. -# ** Warning: [14] ../src/r_w_ram_b.vhd(275): (vcom-1272) Length of expected is 32; length of actual is 11. # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -2568,6 +70,18 @@ do testcore.do # -- Loading package standard # -- Loading package std_logic_1164 # -- Loading package numeric_std +# -- Compiling entity rom +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package mem_pkg +# -- Compiling architecture behaviour of rom +# -- Loading entity rom +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std # -- Compiling package common_pkg # -- Compiling package body common_pkg # -- Loading package common_pkg @@ -2576,14 +90,14 @@ do testcore.do # -- Loading package std_logic_1164 # -- Loading package numeric_std # -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package core_pkg +# -- Compiling package extension_pkg # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 # -- Loading package numeric_std # -- Loading package common_pkg -# -- Compiling package extension_pkg +# -- Loading package extension_pkg +# -- Compiling package core_pkg # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -2678,8 +192,8 @@ do testcore.do # -- Loading package numeric_std # -- Loading package common_pkg # -- Loading package extension_pkg -# -- Loading package core_pkg # -- Loading package extension_uart_pkg +# -- Loading package core_pkg # -- Compiling architecture beh of rs232_rx # -- Loading package std_logic_arith # -- Loading package std_logic_unsigned @@ -2882,10 +396,10 @@ do testcore.do # -- Loading package extension_7seg_pkg # -- Compiling architecture behav of writeback_stage # -- Loading entity writeback_stage -# ** Warning: ../src/writeback_stage_b.vhd(206): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(220): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(233): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(245): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(298): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(314): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(332): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(345): Case choice must be a locally static expression. # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -2915,7 +429,7 @@ do testcore.do # Loading work.pipeline_tb(behavior) # Loading work.mem_pkg # Loading work.fetch_stage(behav) -# Loading work.r_w_ram(behaviour) +# Loading work.rom(behaviour) # Loading work.decode_stage(behav) # Loading work.r2_w_ram(behaviour) # Loading work.decoder(behav_d) @@ -2930,6 +444,7 @@ do testcore.do # Loading work.extension_uart_pkg # Loading work.extension_7seg_pkg(body) # Loading work.writeback_stage(behav) +# Loading work.r_w_ram(behaviour) # Loading work.extension_uart(behav) # Loading ieee.std_logic_arith(body) # Loading ieee.std_logic_unsigned(body) @@ -2937,10 +452,14 @@ do testcore.do # Loading work.rs232_rx(beh) # Loading work.extension_7seg(behav) # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/writeback_st +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/gpmp_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 1 Instance: /pipeline_tb/writeback_st +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 1 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 3 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst @@ -2948,6 +467,12 @@ do testcore.do # Time: 0 ns Iteration: 4 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 5 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 20 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram +run +run +run +run do testcore.do # ** Warning: (vlib-34) Library already exists at "work". # Modifying modelsim.ini @@ -2968,7 +493,6 @@ do testcore.do # -- Loading package mem_pkg # -- Compiling architecture behaviour of r_w_ram # -- Loading entity r_w_ram -# ** Warning: ../src/r_w_ram_b.vhd(120): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -2987,6 +511,18 @@ do testcore.do # -- Loading package standard # -- Loading package std_logic_1164 # -- Loading package numeric_std +# -- Compiling entity rom +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package mem_pkg +# -- Compiling architecture behaviour of rom +# -- Loading entity rom +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std # -- Compiling package common_pkg # -- Compiling package body common_pkg # -- Loading package common_pkg @@ -2995,14 +531,14 @@ do testcore.do # -- Loading package std_logic_1164 # -- Loading package numeric_std # -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package core_pkg +# -- Compiling package extension_pkg # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 # -- Loading package numeric_std # -- Loading package common_pkg -# -- Compiling package extension_pkg +# -- Loading package extension_pkg +# -- Compiling package core_pkg # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -3097,8 +633,8 @@ do testcore.do # -- Loading package numeric_std # -- Loading package common_pkg # -- Loading package extension_pkg -# -- Loading package core_pkg # -- Loading package extension_uart_pkg +# -- Loading package core_pkg # -- Compiling architecture beh of rs232_rx # -- Loading package std_logic_arith # -- Loading package std_logic_unsigned @@ -3301,10 +837,10 @@ do testcore.do # -- Loading package extension_7seg_pkg # -- Compiling architecture behav of writeback_stage # -- Loading entity writeback_stage -# ** Warning: ../src/writeback_stage_b.vhd(206): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(220): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(233): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(245): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(298): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(314): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(332): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(345): Case choice must be a locally static expression. # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -3334,7 +870,7 @@ do testcore.do # Loading work.pipeline_tb(behavior) # Loading work.mem_pkg # Loading work.fetch_stage(behav) -# Loading work.r_w_ram(behaviour) +# Loading work.rom(behaviour) # Loading work.decode_stage(behav) # Loading work.r2_w_ram(behaviour) # Loading work.decoder(behav_d) @@ -3349,6 +885,7 @@ do testcore.do # Loading work.extension_uart_pkg # Loading work.extension_7seg_pkg(body) # Loading work.writeback_stage(behav) +# Loading work.r_w_ram(behaviour) # Loading work.extension_uart(behav) # Loading ieee.std_logic_arith(body) # Loading ieee.std_logic_unsigned(body) @@ -3356,10 +893,14 @@ do testcore.do # Loading work.rs232_rx(beh) # Loading work.extension_7seg(behav) # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/writeback_st +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/gpmp_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 1 Instance: /pipeline_tb/writeback_st +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 1 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 3 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst @@ -3367,6 +908,81 @@ do testcore.do # Time: 0 ns Iteration: 4 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 5 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 20 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram +do testcore.do +# ** Warning: (vlib-34) Library already exists at "work". +# Modifying modelsim.ini +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Compiling package mem_pkg +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Compiling entity r_w_ram +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package mem_pkg +# -- Compiling architecture behaviour of r_w_ram +# -- Loading entity r_w_ram +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package mem_pkg +# -- Compiling entity r2_w_ram +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package mem_pkg +# -- Compiling architecture behaviour of r2_w_ram +# -- Loading entity r2_w_ram +# ** Warning: ../src/r2_w_ram_b.vhd(18): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Compiling entity rom +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package mem_pkg +# -- Compiling architecture behaviour of rom +# -- Loading entity rom +# ** Error: ../src/rom_b.vhd(94): near "1": expecting "WHEN" +# ** Error: ../src/rom_b.vhd(94): (vcom-1136) Unknown identifier "ed000000". +# ** Error: ../src/rom_b.vhd(94): near "r0": expecting "<=" or ":=" +# ** Warning: [4] ../src/rom_b.vhd(94): (vcom-1207) An abstract literal and an identifier must have a separator between them. +# ** Error: ../src/rom_b.vhd(95): (vcom-1136) Unknown identifier "ed0d5e68". +# ** Error: ../src/rom_b.vhd(95): near "r1": expecting "<=" or ":=" +# ** Warning: [4] ../src/rom_b.vhd(95): (vcom-1207) An abstract literal and an identifier must have a separator between them. +# ** Error: ../src/rom_b.vhd(96): (vcom-1136) Unknown identifier "e9880000". +# ** Error: ../src/rom_b.vhd(96): near "r1": expecting "<=" or ":=" +# ** Warning: [4] ../src/rom_b.vhd(97): (vcom-1207) An abstract literal and an identifier must have a separator between them. +# ** Error: ../src/rom_b.vhd(97): (vcom-1136) Unknown identifier "e9100000". +# ** Error: ../src/rom_b.vhd(97): near "r2": expecting "<=" or ":=" +# ** Error: ../src/rom_b.vhd(98): (vcom-1136) Unknown identifier "e9180001". +# ** Error: ../src/rom_b.vhd(98): near "r3": expecting "<=" or ":=" +# ** Error: ../src/rom_b.vhd(99): (vcom-1136) Unknown identifier "ed190080". +# ** Error: ../src/rom_b.vhd(99): near "r3": expecting "<=" or ":=" +# ** Warning: [4] ../src/rom_b.vhd(99): (vcom-1207) An abstract literal and an identifier must have a separator between them. +# ** Error: ../src/rom_b.vhd(100): (vcom-1136) Unknown identifier "e7200000". +# ** Error: ../src/rom_b.vhd(100): near "r4": expecting "<=" or ":=" +# ** Warning: [4] ../src/rom_b.vhd(101): (vcom-1207) An abstract literal and an identifier must have a separator between them. +# ** Error: ../src/rom_b.vhd(101): (vcom-1136) Unknown identifier "e7a18000". +# ** Error: ../src/rom_b.vhd(101): near "r4": expecting "<=" or ":=" +# ** Error: /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed. +# Error in macro ./testcore.do line 10 +# /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed. +# while executing +# "vcom -work work ../src/rom_b.vhd" do testcore.do # ** Warning: (vlib-34) Library already exists at "work". # Modifying modelsim.ini @@ -3387,7 +1003,6 @@ do testcore.do # -- Loading package mem_pkg # -- Compiling architecture behaviour of r_w_ram # -- Loading entity r_w_ram -# ** Warning: ../src/r_w_ram_b.vhd(120): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -3406,6 +1021,18 @@ do testcore.do # -- Loading package standard # -- Loading package std_logic_1164 # -- Loading package numeric_std +# -- Compiling entity rom +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package mem_pkg +# -- Compiling architecture behaviour of rom +# -- Loading entity rom +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std # -- Compiling package common_pkg # -- Compiling package body common_pkg # -- Loading package common_pkg @@ -3414,14 +1041,14 @@ do testcore.do # -- Loading package std_logic_1164 # -- Loading package numeric_std # -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package core_pkg +# -- Compiling package extension_pkg # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 # -- Loading package numeric_std # -- Loading package common_pkg -# -- Compiling package extension_pkg +# -- Loading package extension_pkg +# -- Compiling package core_pkg # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -3516,8 +1143,8 @@ do testcore.do # -- Loading package numeric_std # -- Loading package common_pkg # -- Loading package extension_pkg -# -- Loading package core_pkg # -- Loading package extension_uart_pkg +# -- Loading package core_pkg # -- Compiling architecture beh of rs232_rx # -- Loading package std_logic_arith # -- Loading package std_logic_unsigned @@ -3720,10 +1347,10 @@ do testcore.do # -- Loading package extension_7seg_pkg # -- Compiling architecture behav of writeback_stage # -- Loading entity writeback_stage -# ** Warning: ../src/writeback_stage_b.vhd(206): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(220): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(233): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(245): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(298): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(314): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(332): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(345): Case choice must be a locally static expression. # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -3753,8 +1380,7 @@ do testcore.do # Loading work.pipeline_tb(behavior) # Loading work.mem_pkg # Loading work.fetch_stage(behav) -# ** Warning: (vsim-3473) Component instance "instruction_ram : rom" is not bound. -# Time: 0 ns Iteration: 0 Region: /pipeline_tb/fetch_st File: ../src/fetch_stage_b.vhd +# Loading work.rom(behaviour) # Loading work.decode_stage(behav) # Loading work.r2_w_ram(behaviour) # Loading work.decoder(behav_d) @@ -3777,10 +1403,14 @@ do testcore.do # Loading work.rs232_rx(beh) # Loading work.extension_7seg(behav) # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/writeback_st +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/gpmp_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 1 Instance: /pipeline_tb/writeback_st +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 1 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 3 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst @@ -3789,7 +1419,7 @@ do testcore.do # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 5 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 30 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram +# Time: 20 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram do testcore.do # ** Warning: (vlib-34) Library already exists at "work". # Modifying modelsim.ini @@ -3810,7 +1440,6 @@ do testcore.do # -- Loading package mem_pkg # -- Compiling architecture behaviour of r_w_ram # -- Loading entity r_w_ram -# ** Warning: ../src/r_w_ram_b.vhd(120): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -3829,6 +1458,18 @@ do testcore.do # -- Loading package standard # -- Loading package std_logic_1164 # -- Loading package numeric_std +# -- Compiling entity rom +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package mem_pkg +# -- Compiling architecture behaviour of rom +# -- Loading entity rom +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std # -- Compiling package common_pkg # -- Compiling package body common_pkg # -- Loading package common_pkg @@ -3837,14 +1478,14 @@ do testcore.do # -- Loading package std_logic_1164 # -- Loading package numeric_std # -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package core_pkg +# -- Compiling package extension_pkg # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 # -- Loading package numeric_std # -- Loading package common_pkg -# -- Compiling package extension_pkg +# -- Loading package extension_pkg +# -- Compiling package core_pkg # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -3939,8 +1580,8 @@ do testcore.do # -- Loading package numeric_std # -- Loading package common_pkg # -- Loading package extension_pkg -# -- Loading package core_pkg # -- Loading package extension_uart_pkg +# -- Loading package core_pkg # -- Compiling architecture beh of rs232_rx # -- Loading package std_logic_arith # -- Loading package std_logic_unsigned @@ -4143,10 +1784,10 @@ do testcore.do # -- Loading package extension_7seg_pkg # -- Compiling architecture behav of writeback_stage # -- Loading entity writeback_stage -# ** Warning: ../src/writeback_stage_b.vhd(206): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(220): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(233): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(245): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(298): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(314): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(332): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(345): Case choice must be a locally static expression. # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -4176,8 +1817,7 @@ do testcore.do # Loading work.pipeline_tb(behavior) # Loading work.mem_pkg # Loading work.fetch_stage(behav) -# ** Warning: (vsim-3473) Component instance "instruction_ram : rom" is not bound. -# Time: 0 ns Iteration: 0 Region: /pipeline_tb/fetch_st File: ../src/fetch_stage_b.vhd +# Loading work.rom(behaviour) # Loading work.decode_stage(behav) # Loading work.r2_w_ram(behaviour) # Loading work.decoder(behav_d) @@ -4200,10 +1840,14 @@ do testcore.do # Loading work.rs232_rx(beh) # Loading work.extension_7seg(behav) # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/writeback_st +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/gpmp_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 1 Instance: /pipeline_tb/writeback_st +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 1 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 3 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst @@ -4212,7 +1856,7 @@ do testcore.do # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 5 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 30 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram +# Time: 20 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram do testcore.do # ** Warning: (vlib-34) Library already exists at "work". # Modifying modelsim.ini @@ -4233,7 +1877,6 @@ do testcore.do # -- Loading package mem_pkg # -- Compiling architecture behaviour of r_w_ram # -- Loading entity r_w_ram -# ** Warning: ../src/r_w_ram_b.vhd(120): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -4252,6 +1895,18 @@ do testcore.do # -- Loading package standard # -- Loading package std_logic_1164 # -- Loading package numeric_std +# -- Compiling entity rom +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package mem_pkg +# -- Compiling architecture behaviour of rom +# -- Loading entity rom +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std # -- Compiling package common_pkg # -- Compiling package body common_pkg # -- Loading package common_pkg @@ -4260,14 +1915,14 @@ do testcore.do # -- Loading package std_logic_1164 # -- Loading package numeric_std # -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package core_pkg +# -- Compiling package extension_pkg # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 # -- Loading package numeric_std # -- Loading package common_pkg -# -- Compiling package extension_pkg +# -- Loading package extension_pkg +# -- Compiling package core_pkg # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -4362,8 +2017,8 @@ do testcore.do # -- Loading package numeric_std # -- Loading package common_pkg # -- Loading package extension_pkg -# -- Loading package core_pkg # -- Loading package extension_uart_pkg +# -- Loading package core_pkg # -- Compiling architecture beh of rs232_rx # -- Loading package std_logic_arith # -- Loading package std_logic_unsigned @@ -4566,10 +2221,10 @@ do testcore.do # -- Loading package extension_7seg_pkg # -- Compiling architecture behav of writeback_stage # -- Loading entity writeback_stage -# ** Warning: ../src/writeback_stage_b.vhd(206): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(220): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(233): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(245): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(298): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(314): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(332): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(345): Case choice must be a locally static expression. # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -4599,8 +2254,7 @@ do testcore.do # Loading work.pipeline_tb(behavior) # Loading work.mem_pkg # Loading work.fetch_stage(behav) -# ** Warning: (vsim-3473) Component instance "instruction_ram : rom" is not bound. -# Time: 0 ns Iteration: 0 Region: /pipeline_tb/fetch_st File: ../src/fetch_stage_b.vhd +# Loading work.rom(behaviour) # Loading work.decode_stage(behav) # Loading work.r2_w_ram(behaviour) # Loading work.decoder(behav_d) @@ -4623,10 +2277,14 @@ do testcore.do # Loading work.rs232_rx(beh) # Loading work.extension_7seg(behav) # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/writeback_st +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/gpmp_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 1 Instance: /pipeline_tb/writeback_st +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 1 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 3 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst @@ -4635,7 +2293,7 @@ do testcore.do # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 5 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 30 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram +# Time: 20 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram do testcore.do # ** Warning: (vlib-34) Library already exists at "work". # Modifying modelsim.ini @@ -4656,7 +2314,18 @@ do testcore.do # -- Loading package mem_pkg # -- Compiling architecture behaviour of r_w_ram # -- Loading entity r_w_ram -# ** Warning: ../src/r_w_ram_b.vhd(120): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Compiling entity r_w_ram_be +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package mem_pkg +# -- Compiling architecture behaviour of r_w_ram_be +# -- Loading entity r_w_ram_be # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -4675,6 +2344,18 @@ do testcore.do # -- Loading package standard # -- Loading package std_logic_1164 # -- Loading package numeric_std +# -- Compiling entity rom +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package mem_pkg +# -- Compiling architecture behaviour of rom +# -- Loading entity rom +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std # -- Compiling package common_pkg # -- Compiling package body common_pkg # -- Loading package common_pkg @@ -4683,14 +2364,14 @@ do testcore.do # -- Loading package std_logic_1164 # -- Loading package numeric_std # -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package core_pkg +# -- Compiling package extension_pkg # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 # -- Loading package numeric_std # -- Loading package common_pkg -# -- Compiling package extension_pkg +# -- Loading package extension_pkg +# -- Compiling package core_pkg # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -4785,8 +2466,8 @@ do testcore.do # -- Loading package numeric_std # -- Loading package common_pkg # -- Loading package extension_pkg -# -- Loading package core_pkg # -- Loading package extension_uart_pkg +# -- Loading package core_pkg # -- Compiling architecture beh of rs232_rx # -- Loading package std_logic_arith # -- Loading package std_logic_unsigned @@ -4989,10 +2670,10 @@ do testcore.do # -- Loading package extension_7seg_pkg # -- Compiling architecture behav of writeback_stage # -- Loading entity writeback_stage -# ** Warning: ../src/writeback_stage_b.vhd(206): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(220): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(233): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(245): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(298): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(314): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(332): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(345): Case choice must be a locally static expression. # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -5022,8 +2703,7 @@ do testcore.do # Loading work.pipeline_tb(behavior) # Loading work.mem_pkg # Loading work.fetch_stage(behav) -# ** Warning: (vsim-3473) Component instance "instruction_ram : rom" is not bound. -# Time: 0 ns Iteration: 0 Region: /pipeline_tb/fetch_st File: ../src/fetch_stage_b.vhd +# Loading work.rom(behaviour) # Loading work.decode_stage(behav) # Loading work.r2_w_ram(behaviour) # Loading work.decoder(behav_d) @@ -5038,7 +2718,7 @@ do testcore.do # Loading work.extension_uart_pkg # Loading work.extension_7seg_pkg(body) # Loading work.writeback_stage(behav) -# Loading work.r_w_ram(behaviour) +# Loading work.r_w_ram_be(behaviour) # Loading work.extension_uart(behav) # Loading ieee.std_logic_arith(body) # Loading ieee.std_logic_unsigned(body) @@ -5046,10 +2726,14 @@ do testcore.do # Loading work.rs232_rx(beh) # Loading work.extension_7seg(behav) # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/writeback_st +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/gpmp_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 1 Instance: /pipeline_tb/writeback_st +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 1 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 3 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst @@ -5058,7 +2742,7 @@ do testcore.do # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 5 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 30 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram +# Time: 20 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram do testcore.do # ** Warning: (vlib-34) Library already exists at "work". # Modifying modelsim.ini @@ -5079,7 +2763,18 @@ do testcore.do # -- Loading package mem_pkg # -- Compiling architecture behaviour of r_w_ram # -- Loading entity r_w_ram -# ** Warning: ../src/r_w_ram_b.vhd(120): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Compiling entity r_w_ram_be +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package mem_pkg +# -- Compiling architecture behaviour of r_w_ram_be +# -- Loading entity r_w_ram_be # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -5106,7 +2801,6 @@ do testcore.do # -- Loading package mem_pkg # -- Compiling architecture behaviour of rom # -- Loading entity rom -# ** Warning: ../src/rom_b.vhd(120): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -5119,14 +2813,14 @@ do testcore.do # -- Loading package std_logic_1164 # -- Loading package numeric_std # -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package core_pkg +# -- Compiling package extension_pkg # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 # -- Loading package numeric_std # -- Loading package common_pkg -# -- Compiling package extension_pkg +# -- Loading package extension_pkg +# -- Compiling package core_pkg # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -5221,8 +2915,8 @@ do testcore.do # -- Loading package numeric_std # -- Loading package common_pkg # -- Loading package extension_pkg -# -- Loading package core_pkg # -- Loading package extension_uart_pkg +# -- Loading package core_pkg # -- Compiling architecture beh of rs232_rx # -- Loading package std_logic_arith # -- Loading package std_logic_unsigned @@ -5425,10 +3119,10 @@ do testcore.do # -- Loading package extension_7seg_pkg # -- Compiling architecture behav of writeback_stage # -- Loading entity writeback_stage -# ** Warning: ../src/writeback_stage_b.vhd(206): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(220): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(233): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(245): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(307): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(323): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(341): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(354): Case choice must be a locally static expression. # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -5473,7 +3167,7 @@ do testcore.do # Loading work.extension_uart_pkg # Loading work.extension_7seg_pkg(body) # Loading work.writeback_stage(behav) -# Loading work.r_w_ram(behaviour) +# Loading work.r_w_ram_be(behaviour) # Loading work.extension_uart(behav) # Loading ieee.std_logic_arith(body) # Loading ieee.std_logic_unsigned(body) @@ -5481,10 +3175,14 @@ do testcore.do # Loading work.rs232_rx(beh) # Loading work.extension_7seg(behav) # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/writeback_st +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/gpmp_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 1 Instance: /pipeline_tb/writeback_st +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 1 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 3 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst @@ -5493,7 +3191,7 @@ do testcore.do # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 5 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 30 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram +# Time: 20 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram do testcore.do # ** Warning: (vlib-34) Library already exists at "work". # Modifying modelsim.ini @@ -5514,7 +3212,18 @@ do testcore.do # -- Loading package mem_pkg # -- Compiling architecture behaviour of r_w_ram # -- Loading entity r_w_ram -# ** Warning: ../src/r_w_ram_b.vhd(120): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Compiling entity r_w_ram_be +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package mem_pkg +# -- Compiling architecture behaviour of r_w_ram_be +# -- Loading entity r_w_ram_be # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -5541,7 +3250,6 @@ do testcore.do # -- Loading package mem_pkg # -- Compiling architecture behaviour of rom # -- Loading entity rom -# ** Warning: ../src/rom_b.vhd(120): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -5554,14 +3262,14 @@ do testcore.do # -- Loading package std_logic_1164 # -- Loading package numeric_std # -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package core_pkg +# -- Compiling package extension_pkg # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 # -- Loading package numeric_std # -- Loading package common_pkg -# -- Compiling package extension_pkg +# -- Loading package extension_pkg +# -- Compiling package core_pkg # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -5656,8 +3364,8 @@ do testcore.do # -- Loading package numeric_std # -- Loading package common_pkg # -- Loading package extension_pkg -# -- Loading package core_pkg # -- Loading package extension_uart_pkg +# -- Loading package core_pkg # -- Compiling architecture beh of rs232_rx # -- Loading package std_logic_arith # -- Loading package std_logic_unsigned @@ -5860,10 +3568,10 @@ do testcore.do # -- Loading package extension_7seg_pkg # -- Compiling architecture behav of writeback_stage # -- Loading entity writeback_stage -# ** Warning: ../src/writeback_stage_b.vhd(206): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(220): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(233): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(245): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(307): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(323): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(341): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(354): Case choice must be a locally static expression. # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -5908,7 +3616,7 @@ do testcore.do # Loading work.extension_uart_pkg # Loading work.extension_7seg_pkg(body) # Loading work.writeback_stage(behav) -# Loading work.r_w_ram(behaviour) +# Loading work.r_w_ram_be(behaviour) # Loading work.extension_uart(behav) # Loading ieee.std_logic_arith(body) # Loading ieee.std_logic_unsigned(body) @@ -5916,10 +3624,14 @@ do testcore.do # Loading work.rs232_rx(beh) # Loading work.extension_7seg(behav) # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/writeback_st +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/gpmp_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 1 Instance: /pipeline_tb/writeback_st +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 1 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 3 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst @@ -5928,7 +3640,7 @@ do testcore.do # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 5 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 30 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram +# Time: 20 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram do testcore.do # ** Warning: (vlib-34) Library already exists at "work". # Modifying modelsim.ini @@ -5949,7 +3661,18 @@ do testcore.do # -- Loading package mem_pkg # -- Compiling architecture behaviour of r_w_ram # -- Loading entity r_w_ram -# ** Warning: ../src/r_w_ram_b.vhd(120): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Compiling entity r_w_ram_be +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package mem_pkg +# -- Compiling architecture behaviour of r_w_ram_be +# -- Loading entity r_w_ram_be # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -5976,7 +3699,6 @@ do testcore.do # -- Loading package mem_pkg # -- Compiling architecture behaviour of rom # -- Loading entity rom -# ** Warning: ../src/rom_b.vhd(120): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -5989,14 +3711,14 @@ do testcore.do # -- Loading package std_logic_1164 # -- Loading package numeric_std # -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package core_pkg +# -- Compiling package extension_pkg # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 # -- Loading package numeric_std # -- Loading package common_pkg -# -- Compiling package extension_pkg +# -- Loading package extension_pkg +# -- Compiling package core_pkg # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -6091,8 +3813,8 @@ do testcore.do # -- Loading package numeric_std # -- Loading package common_pkg # -- Loading package extension_pkg -# -- Loading package core_pkg # -- Loading package extension_uart_pkg +# -- Loading package core_pkg # -- Compiling architecture beh of rs232_rx # -- Loading package std_logic_arith # -- Loading package std_logic_unsigned @@ -6295,10 +4017,10 @@ do testcore.do # -- Loading package extension_7seg_pkg # -- Compiling architecture behav of writeback_stage # -- Loading entity writeback_stage -# ** Warning: ../src/writeback_stage_b.vhd(206): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(220): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(233): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(245): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(307): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(323): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(341): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(354): Case choice must be a locally static expression. # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -6343,7 +4065,7 @@ do testcore.do # Loading work.extension_uart_pkg # Loading work.extension_7seg_pkg(body) # Loading work.writeback_stage(behav) -# Loading work.r_w_ram(behaviour) +# Loading work.r_w_ram_be(behaviour) # Loading work.extension_uart(behav) # Loading ieee.std_logic_arith(body) # Loading ieee.std_logic_unsigned(body) @@ -6351,10 +4073,14 @@ do testcore.do # Loading work.rs232_rx(beh) # Loading work.extension_7seg(behav) # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/writeback_st +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/gpmp_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 1 Instance: /pipeline_tb/writeback_st +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 1 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 3 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst @@ -6363,7 +4089,55 @@ do testcore.do # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 5 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 30 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram +# Time: 20 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram +do testcore.do +# ** Warning: (vlib-34) Library already exists at "work". +# Modifying modelsim.ini +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Compiling package mem_pkg +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Compiling entity r_w_ram +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package mem_pkg +# -- Compiling architecture behaviour of r_w_ram +# -- Loading entity r_w_ram +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Compiling entity r_w_ram_be +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package mem_pkg +# -- Compiling architecture behaviour of r_w_ram_be +# -- Loading entity r_w_ram_be +# ** Error: ../src/r_w_ram_be_b.vhd(12): near ";": expecting ')' +# ** Error: ../src/r_w_ram_be_b.vhd(25): Illegal target for signal assignment. +# ** Error: ../src/r_w_ram_be_b.vhd(25): (vcom-1136) Unknown identifier "ram". +# ** Error: ../src/r_w_ram_be_b.vhd(28): Illegal target for signal assignment. +# ** Error: ../src/r_w_ram_be_b.vhd(28): (vcom-1136) Unknown identifier "ram". +# ** Error: ../src/r_w_ram_be_b.vhd(31): Illegal target for signal assignment. +# ** Error: ../src/r_w_ram_be_b.vhd(31): (vcom-1136) Unknown identifier "ram". +# ** Error: ../src/r_w_ram_be_b.vhd(34): Illegal target for signal assignment. +# ** Error: ../src/r_w_ram_be_b.vhd(34): (vcom-1136) Unknown identifier "ram". +# ** Error: ../src/r_w_ram_be_b.vhd(37): (vcom-1136) Unknown identifier "ram". +# ** Error: ../src/r_w_ram_be_b.vhd(41): VHDL Compiler exiting +# ** Error: /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed. +# Error in macro ./testcore.do line 8 +# /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed. +# while executing +# "vcom -work work ../src/r_w_ram_be_b.vhd" do testcore.do # ** Warning: (vlib-34) Library already exists at "work". # Modifying modelsim.ini @@ -6384,7 +4158,18 @@ do testcore.do # -- Loading package mem_pkg # -- Compiling architecture behaviour of r_w_ram # -- Loading entity r_w_ram -# ** Warning: ../src/r_w_ram_b.vhd(120): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Compiling entity r_w_ram_be +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package mem_pkg +# -- Compiling architecture behaviour of r_w_ram_be +# -- Loading entity r_w_ram_be # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -6411,7 +4196,6 @@ do testcore.do # -- Loading package mem_pkg # -- Compiling architecture behaviour of rom # -- Loading entity rom -# ** Warning: ../src/rom_b.vhd(120): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -6424,14 +4208,14 @@ do testcore.do # -- Loading package std_logic_1164 # -- Loading package numeric_std # -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package core_pkg +# -- Compiling package extension_pkg # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 # -- Loading package numeric_std # -- Loading package common_pkg -# -- Compiling package extension_pkg +# -- Loading package extension_pkg +# -- Compiling package core_pkg # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -6526,8 +4310,8 @@ do testcore.do # -- Loading package numeric_std # -- Loading package common_pkg # -- Loading package extension_pkg -# -- Loading package core_pkg # -- Loading package extension_uart_pkg +# -- Loading package core_pkg # -- Compiling architecture beh of rs232_rx # -- Loading package std_logic_arith # -- Loading package std_logic_unsigned @@ -6730,10 +4514,10 @@ do testcore.do # -- Loading package extension_7seg_pkg # -- Compiling architecture behav of writeback_stage # -- Loading entity writeback_stage -# ** Warning: ../src/writeback_stage_b.vhd(206): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(220): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(233): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(245): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(307): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(323): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(341): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(354): Case choice must be a locally static expression. # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -6778,7 +4562,7 @@ do testcore.do # Loading work.extension_uart_pkg # Loading work.extension_7seg_pkg(body) # Loading work.writeback_stage(behav) -# Loading work.r_w_ram(behaviour) +# Loading work.r_w_ram_be(behaviour) # Loading work.extension_uart(behav) # Loading ieee.std_logic_arith(body) # Loading ieee.std_logic_unsigned(body) @@ -6786,10 +4570,14 @@ do testcore.do # Loading work.rs232_rx(beh) # Loading work.extension_7seg(behav) # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/writeback_st +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/gpmp_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 1 Instance: /pipeline_tb/writeback_st +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 1 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 3 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst @@ -6798,4 +4586,4 @@ do testcore.do # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 5 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 30 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram +# Time: 20 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram diff --git a/cpu/de1_cyclone_fmax.tcl b/cpu/de1_cyclone_fmax.tcl index 2ffbe71..91160d2 100644 --- a/cpu/de1_cyclone_fmax.tcl +++ b/cpu/de1_cyclone_fmax.tcl @@ -57,6 +57,8 @@ if {$make_assignments} { set_global_assignment -name VHDL_FILE ../src/mem_pkg.vhd set_global_assignment -name VHDL_FILE ../src/r_w_ram.vhd set_global_assignment -name VHDL_FILE ../src/r_w_ram_b.vhd + set_global_assignment -name VHDL_FILE ../src/r_w_ram_be.vhd + set_global_assignment -name VHDL_FILE ../src/r_w_ram_be_b.vhd set_global_assignment -name VHDL_FILE ../src/rom.vhd set_global_assignment -name VHDL_FILE ../src/rom_b.vhd set_global_assignment -name VHDL_FILE ../src/r2_w_ram.vhd diff --git a/cpu/sim/testcore.do b/cpu/sim/testcore.do index 4ba2fbb..1951c5f 100644 --- a/cpu/sim/testcore.do +++ b/cpu/sim/testcore.do @@ -4,6 +4,8 @@ vmap work work vcom -work work ../src/mem_pkg.vhd vcom -work work ../src/r_w_ram.vhd vcom -work work ../src/r_w_ram_b.vhd +vcom -work work ../src/r_w_ram_be.vhd +vcom -work work ../src/r_w_ram_be_b.vhd vcom -work work ../src/r2_w_ram.vhd vcom -work work ../src/r2_w_ram_b.vhd vcom -work work ../src/rom.vhd diff --git a/cpu/src/core_top.vhd b/cpu/src/core_top.vhd index 14c04c3..eafb605 100644 --- a/cpu/src/core_top.vhd +++ b/cpu/src/core_top.vhd @@ -10,7 +10,7 @@ entity core_top is port( --System input pins - sys_res_unsync : in std_logic; + sys_res : in std_logic; sys_clk : in std_logic; -- result : out gp_register_t; -- reg_wr_data : out gp_register_t @@ -63,11 +63,10 @@ architecture behav of core_top is signal gpm_out_pin : gp_register_t; signal nop_pin : std_logic; - signal sys_res : std_logic; - - signal vers, vers_nxt : exec2wb_rec; - signal sync : std_logic_vector(1 to SYNC_STAGES); + signal sys_res_n : std_logic; + + signal vers, vers_nxt : exec2wb_rec; begin fetch_st : fetch_stage @@ -80,7 +79,7 @@ begin port map ( --System inputs clk => sys_clk, --: in std_logic; - reset => sys_res, --: in std_logic; + reset => sys_res_n, --: in std_logic; --Data inputs jump_result => jump_result_pin, --: in instruction_addr_t; @@ -104,7 +103,7 @@ begin port map ( --System inputs clk => sys_clk, --: in std_logic; - reset => sys_res, -- : in std_logic; + reset => sys_res_n, -- : in std_logic; --Data inputs instruction => instruction_pin, --: in instruction_word_t; @@ -122,7 +121,7 @@ begin exec_st : execute_stage generic map('0') - port map(sys_clk, sys_res,to_next_stage, reg_wr_data_pin, reg_we_pin, reg_w_addr_pin, gpm_in_pin, result_pin, result_addr_pin,addr_pin, + port map(sys_clk, sys_res_n,to_next_stage, reg_wr_data_pin, reg_we_pin, reg_w_addr_pin, gpm_in_pin, result_pin, result_addr_pin,addr_pin, data_pin, alu_jump_pin,brpr_pin, wr_en_pin, dmem_pin,dmem_wr_en_pin,hword_pin,byte_s_pin, gpm_out_pin); @@ -147,7 +146,7 @@ begin writeback_st : writeback_stage generic map('0', '1') - port map(sys_clk, sys_res, vers_nxt.result, vers_nxt.result_addr, vers_nxt.address, vers_nxt.ram_data, vers_nxt.alu_jmp, vers_nxt.br_pred, + port map(sys_clk, sys_res_n, vers_nxt.result, vers_nxt.result_addr, vers_nxt.address, vers_nxt.ram_data, vers_nxt.alu_jmp, vers_nxt.br_pred, vers_nxt.write_en, vers_nxt.dmem_en, vers_nxt.dmem_write_en, vers_nxt.hword, vers_nxt.byte_s, reg_wr_data_pin, reg_we_pin, reg_w_addr_pin, jump_result_pin, alu_jump_bit_pin,bus_tx, bus_rx, sseg0, sseg1, sseg2, sseg3); @@ -157,32 +156,33 @@ syn: process(sys_clk, sys_res) begin if sys_res = '0' then - vers.result <= (others => '0'); - vers.result_addr <= (others => '0'); - vers.address <= (others => '0'); - vers.ram_data <= (others => '0'); - vers.alu_jmp <= '0'; - vers.br_pred <= '0'; - vers.write_en <= '0'; - vers.dmem_en <= '0'; - vers.dmem_write_en <= '0'; - vers.hword <= '0'; - vers.byte_s <= '0'; - sync <= (others => '0'); +-- vers.result <= (others => '0'); +-- vers.result_addr <= (others => '0'); +-- vers.address <= (others => '0'); +-- vers.ram_data <= (others => '0'); +-- vers.alu_jmp <= '0'; +-- vers.br_pred <= '0'; +-- vers.write_en <= '0'; +-- vers.dmem_en <= '0'; +-- vers.dmem_write_en <= '0'; +-- vers.hword <= '0'; +-- vers.byte_s <= '0'; + + sync <= (others => '0'); + elsif rising_edge(sys_clk) then - vers <= vers_nxt; - - sync(1) <= sys_res_unsync xor RESET_VALUE; - for i in 2 to SYNC_STAGES loop - sync(i) <= sync(i - 1); - end loop; - +-- vers <= vers_nxt; + sync(1) <= sys_res; + for i in 2 to SYNC_STAGES loop + sync(i) <= sync(i - 1); + end loop; + end if; end process; -sys_res <= sync(SYNC_STAGES); - +sys_res_n <= sync(SYNC_STAGES); + --init : process(all) --begin diff --git a/cpu/src/fetch_stage_b.vhd b/cpu/src/fetch_stage_b.vhd index 5a3f755..e1faf1f 100644 --- a/cpu/src/fetch_stage_b.vhd +++ b/cpu/src/fetch_stage_b.vhd @@ -17,7 +17,7 @@ signal instr_rd_data : instruction_word_t; begin - instruction_ram : rom --r_w_ram --rom + instruction_ram : r_w_ram --rom generic map ( PHYS_INSTR_ADDR_WIDTH, WORD_WIDTH diff --git a/cpu/src/mem_pkg.vhd b/cpu/src/mem_pkg.vhd index c8ab2b8..2c66fb3 100644 --- a/cpu/src/mem_pkg.vhd +++ b/cpu/src/mem_pkg.vhd @@ -24,6 +24,25 @@ package mem_pkg is ); end component r_w_ram; + component r_w_ram_be is + generic ( + ADDR_WIDTH : integer range 1 to integer'high + ); + port( + clk : in std_logic; + + waddr, raddr : in std_logic_vector(ADDR_WIDTH-1 downto 0); + + be : in std_logic_vector (3 downto 0); + + we : in std_logic; + + wdata : in std_logic_vector(31 downto 0); + + q : out std_logic_vector(31 downto 0) + ); + end component r_w_ram_be; + component rom is generic ( ADDR_WIDTH : integer range 1 to integer'high; diff --git a/cpu/src/r_w_ram_be.vhd b/cpu/src/r_w_ram_be.vhd new file mode 100644 index 0000000..f5d9913 --- /dev/null +++ b/cpu/src/r_w_ram_be.vhd @@ -0,0 +1,23 @@ +library IEEE; +use IEEE.std_logic_1164.all; +use IEEE.numeric_std.all; + +entity r_w_ram_be is + generic ( + ADDR_WIDTH : integer range 1 to integer'high + ); + port( + clk : in std_logic; + + waddr, raddr : in std_logic_vector(ADDR_WIDTH-1 downto 0); + + be : in std_logic_vector (3 downto 0); + + we : in std_logic; + + wdata : in std_logic_vector(31 downto 0); + + q : out std_logic_vector(31 downto 0) + ); + +end entity r_w_ram_be; diff --git a/cpu/src/r_w_ram_be_b.vhd b/cpu/src/r_w_ram_be_b.vhd new file mode 100644 index 0000000..652497e --- /dev/null +++ b/cpu/src/r_w_ram_be_b.vhd @@ -0,0 +1,41 @@ +library ieee; + +use IEEE.std_logic_1164.all; +use IEEE.numeric_std.all; + +use work.mem_pkg.all; + +architecture behaviour of r_w_ram_be is + + type word_t is array (0 to 3) of std_logic_vector(7 downto 0); + type ram_t is array (0 to (2**ADDR_WIDTH)-1) of word_t; + signal ram : ram_t := (others => ((x"00"), (x"00"), (x"00"), (x"00"))); + signal q_local : word_t; + +begin -- Re-organize the read data from the RAM to match the output + unpack: for i in 0 to 3 generate + q(8*(i+1) - 1 downto 8*i) <= q_local(i); + end generate unpack; + + process(clk) + begin + if(rising_edge(clk)) then + if(we = '1') then + if(be(0) = '1') then + ram(to_integer(UNSIGNED(waddr)))(0) <= wdata(7 downto 0); + end if; + if be(1) = '1' then + ram(to_integer(UNSIGNED(waddr)))(1) <= wdata(15 downto 8); + end if; + if be(2) = '1' then + ram(to_integer(UNSIGNED(waddr)))(2) <= wdata(23 downto 16); + end if; + if be(3) = '1' then + ram(to_integer(UNSIGNED(waddr)))(3) <= wdata(31 downto 24); + end if; + end if; + q_local <= ram(to_integer(UNSIGNED(raddr))); + end if; + end process; + +end architecture behaviour; diff --git a/cpu/src/rom_b.vhd b/cpu/src/rom_b.vhd index 3e054f5..140b76c 100644 --- a/cpu/src/rom_b.vhd +++ b/cpu/src/rom_b.vhd @@ -90,14 +90,18 @@ begin when "00000001000" => data_out <= x"e1218000"; when "00000001001" => data_out <= x"eb7ffb81"; --- when "00000000000" => data_out <= x"ed010058"; --- when "00000000001" => data_out <= x"ed090060"; --- when "00000000010" => data_out <= x"e7188000"; --x"e7188000"; --- when "00000000011" => data_out <= x"ec1a0000"; --x"ec1a0000"; --- when "00000000100" => data_out <= x"1b7ffe01"; --- when "00000000101" => data_out <= x"e7980000"; --- when "00000000110" => data_out <= x"e1218000"; --- when "00000000111" => data_out <= x"eb7ffc81"; + + +-- when "00000000000" => data_out <= x"ed000000"; +-- when "00000000001" => data_out <= x"ed080008"; +-- when "00000000010" => data_out <= x"e9880000"; --x"e7188000"; f +-- when "00000000011" => data_out <= x"e5088400"; --x"ec1a0000"; +-- when "00000000100" => data_out <= x"e9880001"; +-- when "00000000101" => data_out <= x"e7180000"; +-- when "00000000110" => data_out <= x"e9200001"; -- f +-- when "00000000111" => data_out <= x"e7a00004"; +-- when "00000001000" => data_out <= x"e7280004"; +-- -- when "00000001001" => data_out <= x"eb7ffb81"; when others => data_out <= "11101011000000000000000000000010"; diff --git a/cpu/src/writeback_stage_b.vhd b/cpu/src/writeback_stage_b.vhd index 490eb74..a64906b 100755 --- a/cpu/src/writeback_stage_b.vhd +++ b/cpu/src/writeback_stage_b.vhd @@ -29,18 +29,18 @@ begin ext_timer_out <= (others => '0'); --TODO: delete when timer is connected ext_gpmp_out <= (others => '0'); --TODO: delete when gpm is connected - data_ram : r_w_ram + data_ram : r_w_ram_be generic map ( - DATA_ADDR_WIDTH, - WORD_WIDTH + DATA_ADDR_WIDTH ) port map ( clk, data_addr(DATA_ADDR_WIDTH+1 downto 2), data_addr(DATA_ADDR_WIDTH+1 downto 2), + wb_reg_nxt.byte_en, dmem_we, - ram_data, + wb_reg_nxt.data, --ram_data, data_ram_read ); @@ -118,17 +118,26 @@ begin if hword = '1' then -- case address(BYTEADDR-1 downto 0) is case address_val is - when "00" => byte_en(1 downto 0) := "11"; - when "10" => byte_en(3 downto 2) := "11"; + when "00" => + byte_en(1 downto 0) := "11"; + when "10" => + byte_en(3 downto 2) := "11"; + wb_reg_nxt.data(31 downto 16) <= ram_data(15 downto 0); when others => null; end case; elsif byte_s = '1' then -- case address(BYTEADDR-1 downto 0) is case address_val is when "00" => byte_en(0) := '1'; - when "01" => byte_en(1) := '1'; - when "10" => byte_en(2) := '1'; - when "11" => byte_en(3) := '1'; + when "01" => + byte_en(1) := '1'; + wb_reg_nxt.data(15 downto 8) <= ram_data(7 downto 0); + when "10" => + byte_en(2) := '1'; + wb_reg_nxt.data(23 downto 16) <= ram_data(7 downto 0); + when "11" => + byte_en(3) := '1'; + wb_reg_nxt.data(31 downto 24) <= ram_data(7 downto 0); when others => null; end case; else diff --git a/dt/dt.qsf b/dt/dt.qsf index 1a461c3..a9102b0 100644 --- a/dt/dt.qsf +++ b/dt/dt.qsf @@ -59,6 +59,27 @@ set_location_assignment PIN_178 -to bus_tx set_location_assignment PIN_152 -to sys_clk set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED" + +set_global_assignment -name SMART_RECOMPILE ON +set_global_assignment -name ENABLE_DRC_SETTINGS ON +set_global_assignment -name ENABLE_CLOCK_LATENCY ON +set_global_assignment -name ENABLE_RECOVERY_REMOVAL_ANALYSIS ON +set_global_assignment -name CYCLONE_OPTIMIZATION_TECHNIQUE SPEED +set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON +set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON +set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON +set_global_assignment -name ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION ON +set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL MAXIMUM +set_global_assignment -name AUTO_PACKED_REGISTERS_CYCLONE NORMAL +set_global_assignment -name FITTER_EFFORT "STANDARD FIT" +set_global_assignment -name ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP ON +set_global_assignment -name MUX_RESTRUCTURE OFF +set_global_assignment -name OPTIMIZE_HOLD_TIMING "ALL PATHS" +set_location_assignment PIN_153 -to bus_rx +set_location_assignment PIN_42 -to sys_res_unsync +set_global_assignment -name FMAX_REQUIREMENT "50 MHz" +set_global_assignment -name VHDL_FILE ../cpu/src/r_w_ram_be_b.vhd +set_global_assignment -name VHDL_FILE ../cpu/src/r_w_ram_be.vhd set_global_assignment -name VHDL_FILE ../cpu/src/rom.vhd set_global_assignment -name VHDL_FILE ../cpu/src/rom_b.vhd set_global_assignment -name VHDL_FILE ../cpu/src/extension_7seg_pkg.vhd @@ -104,22 +125,4 @@ set_global_assignment -name VHDL_FILE ../cpu/src/exec_op/shift_op_b.vhd set_global_assignment -name VHDL_FILE ../cpu/src/exec_op/or_op_b.vhd set_global_assignment -name VHDL_FILE ../cpu/src/exec_op/and_op_b.vhd set_global_assignment -name VHDL_FILE ../cpu/src/exec_op/add_op_b.vhd - -set_global_assignment -name SMART_RECOMPILE ON -set_global_assignment -name ENABLE_DRC_SETTINGS ON -set_global_assignment -name ENABLE_CLOCK_LATENCY ON -set_global_assignment -name ENABLE_RECOVERY_REMOVAL_ANALYSIS ON -set_global_assignment -name CYCLONE_OPTIMIZATION_TECHNIQUE SPEED -set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON -set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON -set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON -set_global_assignment -name ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION ON -set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL MAXIMUM -set_global_assignment -name AUTO_PACKED_REGISTERS_CYCLONE NORMAL -set_global_assignment -name FITTER_EFFORT "STANDARD FIT" -set_global_assignment -name ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP ON -set_global_assignment -name MUX_RESTRUCTURE OFF -set_global_assignment -name OPTIMIZE_HOLD_TIMING "ALL PATHS" -set_location_assignment PIN_153 -to bus_rx -set_location_assignment PIN_42 -to sys_res_unsync set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file -- 2.25.1