From e224e4f5cb68dc287f6bd55e21d6c8d4fec6c696 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Markus=20Hofst=C3=A4tter?= Date: Sat, 11 Dec 2010 12:22:47 +0100 Subject: [PATCH] return added --- cpu/src/alu.vhd | 1 + cpu/src/alu_b.vhd | 11 +++++++---- cpu/src/alu_pkg.vhd | 1 + cpu/src/execute_stage_b.vhd | 7 ++++--- cpu/src/extension.vhd | 3 ++- cpu/src/extension_b.vhd | 9 ++++++--- cpu/src/extension_pkg.vhd | 3 ++- 7 files changed, 23 insertions(+), 12 deletions(-) diff --git a/cpu/src/alu.vhd b/cpu/src/alu.vhd index 4d2e747..df26eb1 100755 --- a/cpu/src/alu.vhd +++ b/cpu/src/alu.vhd @@ -27,6 +27,7 @@ entity alu is alu_state : in alu_result_rec; pval : in gp_register_t; + pval_nxt : in gp_register_t; alu_result : out alu_result_rec; addr : out word_t; --memaddr diff --git a/cpu/src/alu_b.vhd b/cpu/src/alu_b.vhd index de8980d..60d3353 100755 --- a/cpu/src/alu_b.vhd +++ b/cpu/src/alu_b.vhd @@ -41,7 +41,7 @@ begin shift_inst : entity work.exec_op(shift_op) port map(clk,reset,left_o, right_o, op_detail, alu_state, shift_result); -calc: process(left_operand, right_operand,displacement, cond, op_group, op_detail ,alu_state,and_result,add_result,or_result,xor_result,shift_result, prog_cnt,brpr, pval) +calc: process(left_operand, right_operand,displacement, cond, op_group, op_detail ,alu_state,and_result,add_result,or_result,xor_result,shift_result, prog_cnt,brpr, pval, pval_nxt) variable result_v : alu_result_rec; variable res_prod : std_logic; variable cond_met : std_logic; @@ -152,9 +152,12 @@ begin addr <= pval; data <= prog_cnt_nxt; - -- if(op_detail(RET_OPT) = '1' then - -- null; - -- end if; + if op_detail(RET_OPT) = '1' then + addr <= pval_nxt; + mem_en := '0'; + pinc_v := '0'; + res_prod := '0'; + end if; end case; diff --git a/cpu/src/alu_pkg.vhd b/cpu/src/alu_pkg.vhd index 57e2dc4..2019e83 100755 --- a/cpu/src/alu_pkg.vhd +++ b/cpu/src/alu_pkg.vhd @@ -84,6 +84,7 @@ package alu_pkg is alu_state : in alu_result_rec; pval : in gp_register_t; + pval_nxt : in gp_register_t; alu_result : out alu_result_rec; addr : out word_t; --memaddr diff --git a/cpu/src/execute_stage_b.vhd b/cpu/src/execute_stage_b.vhd index f2c2dc2..7221e60 100644 --- a/cpu/src/execute_stage_b.vhd +++ b/cpu/src/execute_stage_b.vhd @@ -19,7 +19,7 @@ signal psw : status_rec; signal ext_gpmp : extmod_rec; signal data_out : gp_register_t; -signal pval : gp_register_t; +signal pval, pval_nxt : gp_register_t; signal paddr : paddr_t; signal pinc, pwr_en : std_logic; @@ -39,7 +39,7 @@ begin alu_inst : alu port map(clk, reset, condition, op_group, - left_operand, right_operand, dec_instr.displacement, dec_instr.prog_cnt, dec_instr.brpr, op_detail, alu_state, pval, alu_nxt,addr,data, pinc, pwr_en, paddr); + left_operand, right_operand, dec_instr.displacement, dec_instr.prog_cnt, dec_instr.brpr, op_detail, alu_state, pval, pval_nxt, alu_nxt,addr,data, pinc, pwr_en, paddr); @@ -55,7 +55,8 @@ port map(clk, reset, condition, op_group, pinc, pwr_en, psw, - pval + pval, + pval_nxt ); diff --git a/cpu/src/extension.vhd b/cpu/src/extension.vhd index 2751359..f37f3ca 100644 --- a/cpu/src/extension.vhd +++ b/cpu/src/extension.vhd @@ -27,7 +27,8 @@ entity extension_gpm is pwr_en : in std_logic; -- Ouput psw : out status_rec; - pval : out gp_register_t + pval : out gp_register_t; + pval_nxt : out gp_register_t ); end extension_gpm; diff --git a/cpu/src/extension_b.vhd b/cpu/src/extension_b.vhd index 46decaf..8ccd6ea 100644 --- a/cpu/src/extension_b.vhd +++ b/cpu/src/extension_b.vhd @@ -34,11 +34,12 @@ end process syn; asyn : process (clk, reset, reg, psw_nxt, ext_reg, pwr_en, pinc, paddr) variable reg_nxt_v : gpm_internal; variable incb : ext_addr_t; - variable sel_pval : ext_addr_t; + variable sel_pval, sel_pval_nxt : ext_addr_t; variable data_out_v : gp_register_t; variable data_v : gp_register_t; variable tmp_data : gp_register_t; + begin reg_nxt_v := reg; data_v := ext_reg.data; @@ -99,9 +100,9 @@ begin end if; sel_pval:= reg_nxt_v.preg(to_integer(unsigned(paddr))); - + sel_pval_nxt := std_logic_vector(unsigned(sel_pval)+unsigned(incb)); if pwr_en = '1' then - reg_nxt_v.preg(to_integer(unsigned(paddr))) := std_logic_vector(unsigned(sel_pval)+unsigned(incb)); + reg_nxt_v.preg(to_integer(unsigned(paddr))) := sel_pval_nxt; end if; reg_nxt_v.status := psw_nxt; @@ -111,6 +112,8 @@ begin pval <= (others =>'0'); pval(pval'high downto BYTEADDR) <= sel_pval; + pval_nxt <= (others =>'0'); + pval_nxt(pval'high downto BYTEADDR) <= sel_pval_nxt; end process asyn; end behav; diff --git a/cpu/src/extension_pkg.vhd b/cpu/src/extension_pkg.vhd index 5d3eb12..ba4aec5 100644 --- a/cpu/src/extension_pkg.vhd +++ b/cpu/src/extension_pkg.vhd @@ -61,7 +61,8 @@ constant EXT_GPMP_ADDR: ext_addrid_t := x"FFFFFFF"; pwr_en : in std_logic; -- Ouput psw : out status_rec; - pval : out gp_register_t + pval : out gp_register_t; + pval_nxt : out gp_register_t ); end component extension_gpm; -- 2.25.1