From 6a73a6a61afb7b2fc8de809554567109dc60ec07 Mon Sep 17 00:00:00 2001 From: Stefan Rebernig Date: Sat, 11 Dec 2010 17:11:12 +0100 Subject: [PATCH] fibonacci die 2. --- cpu/src/core_top.vhd | 4 ++-- cpu/src/writeback_stage_b.vhd | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/cpu/src/core_top.vhd b/cpu/src/core_top.vhd index 47eb124..7a85f27 100644 --- a/cpu/src/core_top.vhd +++ b/cpu/src/core_top.vhd @@ -49,8 +49,8 @@ architecture behav of core_top is signal hword_pin : std_logic; signal byte_s_pin : std_logic; - signal gpm_in_pin : extmod_rec; - signal gpm_out_pin : gp_register_t; + signal gpm_in_pin : extmod_rec; + signal gpm_out_pin : gp_register_t; signal nop_pin : std_logic; diff --git a/cpu/src/writeback_stage_b.vhd b/cpu/src/writeback_stage_b.vhd index 5123f76..c771c91 100644 --- a/cpu/src/writeback_stage_b.vhd +++ b/cpu/src/writeback_stage_b.vhd @@ -62,7 +62,7 @@ end process; -shift_input: process(data_ram_read, address, dmem_en, dmem_write_en, hword, wb_reg, result, byte_s, alu_jmp, br_pred) +shift_input: process(data_ram_read, address, dmem_en, dmem_write_en, hword, wb_reg, result, byte_s, alu_jmp, br_pred, write_en) begin wb_reg_nxt.address <= address; -- 2.25.1