From f79b90fff6c5992d835bcdac3252fa023adf4538 Mon Sep 17 00:00:00 2001 From: Manfred Date: Sat, 18 Dec 2010 12:40:46 +0100 Subject: [PATCH] uart: sollte jetzt eigentlich alles gehen --- cpu/sim/testcore1.do | 4 ++++ cpu/src/extension_uart_b.vhd | 15 ++++++++++++--- cpu/src/extension_uart_pkg.vhd | 9 +++++---- cpu/src/rs232_rx.vhd | 3 ++- cpu/src/rs232_rx_arc.vhd | 24 ++++++++++++------------ cpu/src/rs232_tx_arc.vhd | 2 +- 6 files changed, 36 insertions(+), 21 deletions(-) diff --git a/cpu/sim/testcore1.do b/cpu/sim/testcore1.do index 5ef159a..f6b51b9 100644 --- a/cpu/sim/testcore1.do +++ b/cpu/sim/testcore1.do @@ -2,6 +2,8 @@ vlib work vmap work work vcom -work work ../src/mem_pkg.vhd +vcom -work work ../src/rom.vhd +vcom -work work ../src/rom_b.vhd vcom -work work ../src/r_w_ram.vhd vcom -work work ../src/r_w_ram_b.vhd vcom -work work ../src/r2_w_ram.vhd @@ -37,6 +39,8 @@ vcom -work work ../src/extension.vhd vcom -work work ../src/extension_b.vhd + + vcom -work work ../src/extension_uart_pkg.vhd vcom -work work ../src/rs232_tx.vhd vcom -work work ../src/rs232_tx_arc.vhd diff --git a/cpu/src/extension_uart_b.vhd b/cpu/src/extension_uart_b.vhd index 5dd8774..9f64cf5 100644 --- a/cpu/src/extension_uart_b.vhd +++ b/cpu/src/extension_uart_b.vhd @@ -52,7 +52,8 @@ port map( --From/to sendlogic new_bus_rx, - rx_data + rx_data, + bd_rate ); @@ -62,7 +63,9 @@ syn : process (clk, reset) begin if (reset = RESET_VALUE) then w1_st_co <= (others=>'0'); - w2_uart_config <= (others=>'0'); + w2_uart_config(31 downto 16) <= (others=>'0'); + -- todo mit einer konstante versehen + w2_uart_config(15 downto 0) <= x"01B2"; w3_uart_send <= (others=>'0'); w4_uart_receive <= (others=>'0'); tx_rdy_int <= '0'; @@ -115,7 +118,7 @@ begin w1_st_co_nxt(16) <= '1'; -- busy flag set w3_uart_send_nxt <= tmp_data; when "11" => - w4_uart_receive_nxt <= tmp_data; + --w4_uart_receive_nxt <= tmp_data; sollte nur gelesen werden when others => null; end case; end if; @@ -124,6 +127,12 @@ begin w1_st_co_nxt(16) <= '0'; -- busy flag reset end if; + if new_bus_rx = '1' then + w4_uart_receive_nxt(7 downto 0) <= rx_data; + w1_st_co_nxt(17) <= '1'; + end if; + + end process gwriten; gread : process (clk,ext_reg,w1_st_co,w2_uart_config,w3_uart_send,w4_uart_receive) diff --git a/cpu/src/extension_uart_pkg.vhd b/cpu/src/extension_uart_pkg.vhd index 80df4b2..60f2ffa 100644 --- a/cpu/src/extension_uart_pkg.vhd +++ b/cpu/src/extension_uart_pkg.vhd @@ -19,10 +19,10 @@ subtype uart_data is std_logic_vector(UART_WIDTH-1 downto 0); constant BAUD_RATE_WITH : integer := 16; subtype baud_rate_l is std_logic_vector(BAUD_RATE_WITH-1 downto 0); --CLKs -constant CLK_FREQ_MHZ : real := 33.33; -constant BAUD_RATE : integer := 115200; +--constant CLK_FREQ_MHZ : real := 33.33; +--constant BAUD_RATE : integer := 115200; --constant CLK_PER_BAUD : integer := integer((CLK_FREQ_MHZ * 1000000.0) / real(BAUD_RATE) - 0.5); -constant CLK_PER_BAUD : integer := 16330000; +constant CLK_PER_BAUD : integer := 434; component extension_uart is --some modules won't need all inputs/outputs @@ -83,7 +83,8 @@ component rs232_rx is --To sendlogic new_rx_data : out std_logic; - rx_data : out uart_data + rx_data : out uart_data; + bd_rate : in baud_rate_l ); end component rs232_rx; diff --git a/cpu/src/rs232_rx.vhd b/cpu/src/rs232_rx.vhd index d363ac2..9254fb9 100755 --- a/cpu/src/rs232_rx.vhd +++ b/cpu/src/rs232_rx.vhd @@ -34,7 +34,8 @@ entity rs232_rx is --To sendlogic new_rx_data : out std_logic; - rx_data : out uart_data + rx_data : out uart_data; + bd_rate : in baud_rate_l ); end rs232_rx; diff --git a/cpu/src/rs232_rx_arc.vhd b/cpu/src/rs232_rx_arc.vhd index 6cc9430..62ff9c6 100755 --- a/cpu/src/rs232_rx_arc.vhd +++ b/cpu/src/rs232_rx_arc.vhd @@ -53,7 +53,7 @@ begin rx_data <= rx_data_res_int; -- Zustandsmaschienen Prozess - rs232_states : process(sys_clk,state,cnt, bus_rx, bus_rx_last, baud_cnt,bus_rx_int) + rs232_states : process(sys_clk,state,cnt, bus_rx, bus_rx_last, baud_cnt,bus_rx_int,bd_rate) begin state_next <= state; -- mal schauen ob des so geht bus_rx_last <= bus_rx; -- mal schauen ob des so geht @@ -69,16 +69,16 @@ begin -- immer noch die 0 an so wird mit deim Lesebvorgang mit einem Zustandswechsel von -- READ_START nach READ_BIT vorgefahren, wenn eine 1 anliegt wird abgebrochen und -- wieder nach IDLE gewechselt - if (bus_rx = '0' and baud_cnt = CLK_PER_BAUD/2) then + if (bus_rx = '0' and baud_cnt = bd_rate/2) then state_next <= READ_BIT; - elsif (bus_rx = '1' and baud_cnt = CLK_PER_BAUD/2) then + elsif (bus_rx = '1' and baud_cnt = bd_rate/2) then state_next <= IDLE; end if; when READ_BIT => -- hier werden mit Hilfe eines Countersignals 8 Datenbits im Abstand der eingestellten -- Bitzeit eingelesen und gespeichert. -- Nach beendigung wird in den Zustand READ_STOP gewechselt. - if (cnt = 7 and baud_cnt = CLK_PER_BAUD) then + if (cnt = 7 and baud_cnt = bd_rate) then state_next <= READ_STOP; else state_next <= READ_BIT; @@ -86,21 +86,21 @@ begin when READ_STOP => -- hier wird nur noch auf das Stopbit abgewartet und gelesen um den -- Lesevorgang koerrekt zu beenden - if baud_cnt = CLK_PER_BAUD and bus_rx = '1' then + if baud_cnt = bd_rate and bus_rx = '1' then state_next <= POST_STOP; - elsif baud_cnt = CLK_PER_BAUD and bus_rx = '0' then + elsif baud_cnt = bd_rate and bus_rx = '0' then state_next <= IDLE; end if; when POST_STOP => -- hier wird nur noch eine halbe Bitzeit gewartet - if baud_cnt = CLK_PER_BAUD/2 then + if baud_cnt = bd_rate/2 then state_next <= IDLE; end if; end case; end process; -- Ausgabe Logik - rs232_tx_baud : process(state, cnt, bus_rx, baud_cnt, rx_data_int, rx_data_res_int) + rs232_tx_baud : process(state, cnt, bus_rx, baud_cnt, rx_data_int, rx_data_res_int,bad_rate) begin -- Signale halten um Latches zu vermeiden cnt_next <= cnt; @@ -116,7 +116,7 @@ begin -- baut_cnt zyklenweise erhoehen bis es einer halben Bitzeit entspricht -- anschliessend zuruecksetzten baud_cnt_next <= baud_cnt + 1; - if baud_cnt = CLK_PER_BAUD/2 then + if baud_cnt = bd_rate/2 then baud_cnt_next <= 0; rx_data_nxt <= x"00"; end if; @@ -125,7 +125,7 @@ begin -- anschliessend zuruecksetzen -- Zustand der rxt-Leitung im rx_data_nxt abspeichern baud_cnt_next <= baud_cnt + 1; - if baud_cnt = CLK_PER_BAUD then + if baud_cnt = bd_rate then baud_cnt_next <= 0; cnt_next <= cnt+1; rx_data_nxt(cnt) <= bus_rx; @@ -137,13 +137,13 @@ begin -- Signal fuer neue rx-Daten setzen um die send_logic zu aktivieren cnt_next <= 0; baud_cnt_next <= baud_cnt + 1; - if baud_cnt = CLK_PER_BAUD then + if baud_cnt = bd_rate then baud_cnt_next <= 0; end if; when POST_STOP => --halbe bitzeit wartenr auf counter warten baud_cnt_next <= baud_cnt + 1; - if baud_cnt = CLK_PER_BAUD/2 then + if baud_cnt = bd_rate/2 then new_rx_data_nxt <= '1'; rx_data_res_nxt <= rx_data_int; baud_cnt_next <= 0; diff --git a/cpu/src/rs232_tx_arc.vhd b/cpu/src/rs232_tx_arc.vhd index c7dc886..43d862b 100755 --- a/cpu/src/rs232_tx_arc.vhd +++ b/cpu/src/rs232_tx_arc.vhd @@ -87,7 +87,7 @@ begin tx_rdy <= '0'; -- Counter erhoehen um die Zeit einer Bitdauer abzuwarten baud_cnt_next <= baud_cnt + 1; - if baud_cnt = CLK_PER_BAUD then + if baud_cnt = bd_rate then -- wenn die Bitdauer erreicht ist, Counter reseten baud_cnt_next <= 0; -- Counter um die einzelen Bits zu versenden -- 2.25.1