From: Stefan Rebernig Date: Sat, 25 Dec 2010 09:59:25 +0000 (+0100) Subject: interrupt version 2 X-Git-Tag: bootrom_v1~44^2~5 X-Git-Url: http://wien.tomnetworks.com/gitweb/?p=calu.git;a=commitdiff_plain;h=c825fc85f09d82a5b6336df4a0846c2487b44dfb interrupt version 2 --- diff --git a/3a_asm/transcript b/3a_asm/transcript index 5eff8f9..d23d6e2 100644 --- a/3a_asm/transcript +++ b/3a_asm/transcript @@ -1,37 +1,8 @@ -ls -# Control -# doc -# dtas -# DTFormat.hi -# DTFormat.hs -# DTFormat.o -# DT.hi -# DT.hs -# DT.o -# Expr_eval.hi -# Expr_eval.hs -# Expr_eval.o -# Main.hi -# Main.hs -# Main.o -# Makefile -# notes -# Text -# transcript -# tst pwd # /home/stefan/processor/calu/3a_asm cd .. cd cpu/sim # reading modelsim.ini -ls -# modelsim.ini -# testcore1.do -# testcore.do -# transcript -# vsim.wlf -# wave.do -# work do testcore.do # ** Warning: (vlib-34) Library already exists at "work". # Modifying modelsim.ini @@ -56,1390 +27,14 @@ do testcore.do # -- Loading package standard # -- Loading package std_logic_1164 # -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling entity r2_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of r2_w_ram -# -- Loading entity r2_w_ram -# ** Warning: ../src/r2_w_ram_b.vhd(18): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling entity rom -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of rom -# -- Loading entity rom -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling package common_pkg -# -- Compiling package body common_pkg -# -- Loading package common_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling package extension_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package core_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package extension_uart_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package extension_uart_pkg -# -- Compiling entity extension_uart -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Loading package extension_uart_pkg -# -- Compiling architecture behav of extension_uart -# -- Loading entity extension_uart -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package extension_7seg_pkg -# -- Compiling package body extension_7seg_pkg -# -- Loading package extension_7seg_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package extension_7seg_pkg -# -- Compiling entity extension_7seg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Loading package extension_7seg_pkg -# -- Compiling architecture behav of extension_7seg -# -- Loading entity extension_7seg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling entity rs232_tx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling architecture beh of rs232_tx -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading entity rs232_tx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling entity rs232_rx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package extension_uart_pkg -# -- Loading package core_pkg -# -- Compiling architecture beh of rs232_rx -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading entity rs232_rx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity decoder -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling architecture behav_d of decoder -# -- Loading entity decoder -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity fetch_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Compiling architecture behav of fetch_stage -# -- Loading entity fetch_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity decode_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling architecture behav of decode_stage -# -- Loading entity decode_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package alu_pkg -# -- Compiling package body alu_pkg -# -- Loading package alu_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling package extension_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture add_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture and_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture or_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture xor_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture shift_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling entity alu -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture behaviour of alu -# -- Loading entity alu -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling package extension_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling entity extension_gpm -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Compiling architecture behav of extension_gpm -# -- Loading entity extension_gpm -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling entity execute_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture behav of execute_stage -# -- Loading entity execute_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling entity writeback_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Loading package extension_uart_pkg -# -- Loading package extension_7seg_pkg -# -- Compiling architecture behav of writeback_stage -# -- Loading entity writeback_stage -# ** Warning: ../src/writeback_stage_b.vhd(298): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(314): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(332): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(345): Case choice must be a locally static expression. -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity pipeline_tb -# -- Compiling architecture behavior of pipeline_tb -# -- Compiling configuration pipeline_conf_beh -# -- Loading entity pipeline_tb -# -- Loading architecture behavior of pipeline_tb -# -- Loading entity fetch_stage -# -- Loading entity decode_stage -# -- Loading package alu_pkg -# -- Loading entity execute_stage -# -- Loading entity writeback_stage -# vsim -t ns work.pipeline_conf_beh -# Loading std.standard -# Loading ieee.std_logic_1164(body) -# Loading ieee.numeric_std(body) -# Loading work.common_pkg(body) -# Loading work.extension_pkg -# Loading work.core_pkg -# Loading work.alu_pkg(body) -# Loading work.pipeline_conf_beh -# Loading work.pipeline_tb(behavior) -# Loading work.mem_pkg -# Loading work.fetch_stage(behav) -# Loading work.rom(behaviour) -# Loading work.decode_stage(behav) -# Loading work.r2_w_ram(behaviour) -# Loading work.decoder(behav_d) -# Loading work.execute_stage(behav) -# Loading work.alu(behaviour) -# Loading work.exec_op(add_op) -# Loading work.exec_op(and_op) -# Loading work.exec_op(or_op) -# Loading work.exec_op(xor_op) -# Loading work.exec_op(shift_op) -# Loading work.extension_gpm(behav) -# Loading work.extension_uart_pkg -# Loading work.extension_7seg_pkg(body) -# Loading work.writeback_stage(behav) -# Loading work.r_w_ram(behaviour) -# Loading work.extension_uart(behav) -# Loading ieee.std_logic_arith(body) -# Loading ieee.std_logic_unsigned(body) -# Loading work.rs232_tx(beh) -# Loading work.rs232_rx(beh) -# Loading work.extension_7seg(behav) -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/writeback_st -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/gpmp_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 1 Instance: /pipeline_tb/writeback_st -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 1 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 3 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 4 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 5 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 20 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram -run -run -run -run -do testcore.do -# ** Warning: (vlib-34) Library already exists at "work". -# Modifying modelsim.ini -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling package mem_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling entity r_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of r_w_ram -# -- Loading entity r_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling entity r2_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of r2_w_ram -# -- Loading entity r2_w_ram -# ** Warning: ../src/r2_w_ram_b.vhd(18): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling entity rom -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of rom -# -- Loading entity rom -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling package common_pkg -# -- Compiling package body common_pkg -# -- Loading package common_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling package extension_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package core_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package extension_uart_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package extension_uart_pkg -# -- Compiling entity extension_uart -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Loading package extension_uart_pkg -# -- Compiling architecture behav of extension_uart -# -- Loading entity extension_uart -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package extension_7seg_pkg -# -- Compiling package body extension_7seg_pkg -# -- Loading package extension_7seg_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package extension_7seg_pkg -# -- Compiling entity extension_7seg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Loading package extension_7seg_pkg -# -- Compiling architecture behav of extension_7seg -# -- Loading entity extension_7seg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling entity rs232_tx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling architecture beh of rs232_tx -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading entity rs232_tx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling entity rs232_rx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package extension_uart_pkg -# -- Loading package core_pkg -# -- Compiling architecture beh of rs232_rx -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading entity rs232_rx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity decoder -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling architecture behav_d of decoder -# -- Loading entity decoder -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity fetch_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Compiling architecture behav of fetch_stage -# -- Loading entity fetch_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity decode_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling architecture behav of decode_stage -# -- Loading entity decode_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package alu_pkg -# -- Compiling package body alu_pkg -# -- Loading package alu_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling package extension_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture add_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture and_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture or_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture xor_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture shift_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling entity alu -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture behaviour of alu -# -- Loading entity alu -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling package extension_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling entity extension_gpm -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Compiling architecture behav of extension_gpm -# -- Loading entity extension_gpm -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling entity execute_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture behav of execute_stage -# -- Loading entity execute_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling entity writeback_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Loading package extension_uart_pkg -# -- Loading package extension_7seg_pkg -# -- Compiling architecture behav of writeback_stage -# -- Loading entity writeback_stage -# ** Warning: ../src/writeback_stage_b.vhd(298): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(314): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(332): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(345): Case choice must be a locally static expression. -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity pipeline_tb -# -- Compiling architecture behavior of pipeline_tb -# -- Compiling configuration pipeline_conf_beh -# -- Loading entity pipeline_tb -# -- Loading architecture behavior of pipeline_tb -# -- Loading entity fetch_stage -# -- Loading entity decode_stage -# -- Loading package alu_pkg -# -- Loading entity execute_stage -# -- Loading entity writeback_stage -# vsim -t ns work.pipeline_conf_beh -# Loading std.standard -# Loading ieee.std_logic_1164(body) -# Loading ieee.numeric_std(body) -# Loading work.common_pkg(body) -# Loading work.extension_pkg -# Loading work.core_pkg -# Loading work.alu_pkg(body) -# Loading work.pipeline_conf_beh -# Loading work.pipeline_tb(behavior) -# Loading work.mem_pkg -# Loading work.fetch_stage(behav) -# Loading work.rom(behaviour) -# Loading work.decode_stage(behav) -# Loading work.r2_w_ram(behaviour) -# Loading work.decoder(behav_d) -# Loading work.execute_stage(behav) -# Loading work.alu(behaviour) -# Loading work.exec_op(add_op) -# Loading work.exec_op(and_op) -# Loading work.exec_op(or_op) -# Loading work.exec_op(xor_op) -# Loading work.exec_op(shift_op) -# Loading work.extension_gpm(behav) -# Loading work.extension_uart_pkg -# Loading work.extension_7seg_pkg(body) -# Loading work.writeback_stage(behav) -# Loading work.r_w_ram(behaviour) -# Loading work.extension_uart(behav) -# Loading ieee.std_logic_arith(body) -# Loading ieee.std_logic_unsigned(body) -# Loading work.rs232_tx(beh) -# Loading work.rs232_rx(beh) -# Loading work.extension_7seg(behav) -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/writeback_st -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/gpmp_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 1 Instance: /pipeline_tb/writeback_st -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 1 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 3 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 4 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 5 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 20 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram -do testcore.do -# ** Warning: (vlib-34) Library already exists at "work". -# Modifying modelsim.ini -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling package mem_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling entity r_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of r_w_ram -# -- Loading entity r_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling entity r2_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of r2_w_ram -# -- Loading entity r2_w_ram -# ** Warning: ../src/r2_w_ram_b.vhd(18): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling entity rom -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of rom -# -- Loading entity rom -# ** Error: ../src/rom_b.vhd(94): near "1": expecting "WHEN" -# ** Error: ../src/rom_b.vhd(94): (vcom-1136) Unknown identifier "ed000000". -# ** Error: ../src/rom_b.vhd(94): near "r0": expecting "<=" or ":=" -# ** Warning: [4] ../src/rom_b.vhd(94): (vcom-1207) An abstract literal and an identifier must have a separator between them. -# ** Error: ../src/rom_b.vhd(95): (vcom-1136) Unknown identifier "ed0d5e68". -# ** Error: ../src/rom_b.vhd(95): near "r1": expecting "<=" or ":=" -# ** Warning: [4] ../src/rom_b.vhd(95): (vcom-1207) An abstract literal and an identifier must have a separator between them. -# ** Error: ../src/rom_b.vhd(96): (vcom-1136) Unknown identifier "e9880000". -# ** Error: ../src/rom_b.vhd(96): near "r1": expecting "<=" or ":=" -# ** Warning: [4] ../src/rom_b.vhd(97): (vcom-1207) An abstract literal and an identifier must have a separator between them. -# ** Error: ../src/rom_b.vhd(97): (vcom-1136) Unknown identifier "e9100000". -# ** Error: ../src/rom_b.vhd(97): near "r2": expecting "<=" or ":=" -# ** Error: ../src/rom_b.vhd(98): (vcom-1136) Unknown identifier "e9180001". -# ** Error: ../src/rom_b.vhd(98): near "r3": expecting "<=" or ":=" -# ** Error: ../src/rom_b.vhd(99): (vcom-1136) Unknown identifier "ed190080". -# ** Error: ../src/rom_b.vhd(99): near "r3": expecting "<=" or ":=" -# ** Warning: [4] ../src/rom_b.vhd(99): (vcom-1207) An abstract literal and an identifier must have a separator between them. -# ** Error: ../src/rom_b.vhd(100): (vcom-1136) Unknown identifier "e7200000". -# ** Error: ../src/rom_b.vhd(100): near "r4": expecting "<=" or ":=" -# ** Warning: [4] ../src/rom_b.vhd(101): (vcom-1207) An abstract literal and an identifier must have a separator between them. -# ** Error: ../src/rom_b.vhd(101): (vcom-1136) Unknown identifier "e7a18000". -# ** Error: ../src/rom_b.vhd(101): near "r4": expecting "<=" or ":=" -# ** Error: /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed. -# Error in macro ./testcore.do line 10 -# /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed. -# while executing -# "vcom -work work ../src/rom_b.vhd" -do testcore.do -# ** Warning: (vlib-34) Library already exists at "work". -# Modifying modelsim.ini -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling package mem_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling entity r_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of r_w_ram -# -- Loading entity r_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling entity r2_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of r2_w_ram -# -- Loading entity r2_w_ram -# ** Warning: ../src/r2_w_ram_b.vhd(18): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association. -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling entity rom -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of rom -# -- Loading entity rom -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling package common_pkg -# -- Compiling package body common_pkg -# -- Loading package common_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling package extension_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package core_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package extension_uart_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package extension_uart_pkg -# -- Compiling entity extension_uart -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Loading package extension_uart_pkg -# -- Compiling architecture behav of extension_uart -# -- Loading entity extension_uart -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package extension_7seg_pkg -# -- Compiling package body extension_7seg_pkg -# -- Loading package extension_7seg_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package extension_7seg_pkg -# -- Compiling entity extension_7seg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Loading package extension_7seg_pkg -# -- Compiling architecture behav of extension_7seg -# -- Loading entity extension_7seg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling entity rs232_tx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling architecture beh of rs232_tx -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading entity rs232_tx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package extension_uart_pkg -# -- Compiling entity rs232_rx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package extension_uart_pkg -# -- Loading package core_pkg -# -- Compiling architecture beh of rs232_rx -# -- Loading package std_logic_arith -# -- Loading package std_logic_unsigned -# -- Loading entity rs232_rx -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity decoder -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling architecture behav_d of decoder -# -- Loading entity decoder -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity fetch_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Compiling architecture behav of fetch_stage -# -- Loading entity fetch_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity decode_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling architecture behav of decode_stage -# -- Loading entity decode_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling package alu_pkg -# -- Compiling package body alu_pkg -# -- Loading package alu_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling package extension_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture add_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture and_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture or_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture xor_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture shift_op of exec_op -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling entity alu -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture behaviour of alu -# -- Loading entity alu -# -- Loading entity exec_op -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling package extension_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Compiling entity extension_gpm -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Compiling architecture behav of extension_gpm -# -- Loading entity extension_gpm -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling entity execute_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package alu_pkg -# -- Compiling architecture behav of execute_stage -# -- Loading entity execute_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Compiling entity writeback_stage -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Loading package mem_pkg -# -- Loading package extension_uart_pkg -# -- Loading package extension_7seg_pkg -# -- Compiling architecture behav of writeback_stage -# -- Loading entity writeback_stage -# ** Warning: ../src/writeback_stage_b.vhd(298): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(314): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(332): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(345): Case choice must be a locally static expression. -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package common_pkg -# -- Loading package extension_pkg -# -- Loading package core_pkg -# -- Compiling entity pipeline_tb -# -- Compiling architecture behavior of pipeline_tb -# -- Compiling configuration pipeline_conf_beh -# -- Loading entity pipeline_tb -# -- Loading architecture behavior of pipeline_tb -# -- Loading entity fetch_stage -# -- Loading entity decode_stage -# -- Loading package alu_pkg -# -- Loading entity execute_stage -# -- Loading entity writeback_stage -# vsim -t ns work.pipeline_conf_beh -# Loading std.standard -# Loading ieee.std_logic_1164(body) -# Loading ieee.numeric_std(body) -# Loading work.common_pkg(body) -# Loading work.extension_pkg -# Loading work.core_pkg -# Loading work.alu_pkg(body) -# Loading work.pipeline_conf_beh -# Loading work.pipeline_tb(behavior) -# Loading work.mem_pkg -# Loading work.fetch_stage(behav) -# Loading work.rom(behaviour) -# Loading work.decode_stage(behav) -# Loading work.r2_w_ram(behaviour) -# Loading work.decoder(behav_d) -# Loading work.execute_stage(behav) -# Loading work.alu(behaviour) -# Loading work.exec_op(add_op) -# Loading work.exec_op(and_op) -# Loading work.exec_op(or_op) -# Loading work.exec_op(xor_op) -# Loading work.exec_op(shift_op) -# Loading work.extension_gpm(behav) -# Loading work.extension_uart_pkg -# Loading work.extension_7seg_pkg(body) -# Loading work.writeback_stage(behav) -# Loading work.r_w_ram(behaviour) -# Loading work.extension_uart(behav) -# Loading ieee.std_logic_arith(body) -# Loading ieee.std_logic_unsigned(body) -# Loading work.rs232_tx(beh) -# Loading work.rs232_rx(beh) -# Loading work.extension_7seg(behav) -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/writeback_st -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/gpmp_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 1 Instance: /pipeline_tb/writeback_st -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 1 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 3 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 4 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 0 ns Iteration: 5 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 20 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram -do testcore.do -# ** Warning: (vlib-34) Library already exists at "work". -# Modifying modelsim.ini -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling package mem_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling entity r_w_ram +# -- Compiling entity r_w_ram_be # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 # -- Loading package numeric_std # -- Loading package mem_pkg -# -- Compiling architecture behaviour of r_w_ram -# -- Loading entity r_w_ram +# -- Compiling architecture behaviour of r_w_ram_be +# -- Loading entity r_w_ram_be # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -1518,6 +113,21 @@ do testcore.do # -- Loading package numeric_std # -- Loading package common_pkg # -- Loading package extension_pkg +# -- Compiling entity extension_interrupt +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package common_pkg +# -- Loading package extension_pkg +# -- Compiling architecture behav of extension_interrupt +# -- Loading entity extension_interrupt +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package common_pkg +# -- Loading package extension_pkg # -- Compiling package extension_7seg_pkg # -- Compiling package body extension_7seg_pkg # -- Loading package extension_7seg_pkg @@ -1784,10 +394,11 @@ do testcore.do # -- Loading package extension_7seg_pkg # -- Compiling architecture behav of writeback_stage # -- Loading entity writeback_stage -# ** Warning: ../src/writeback_stage_b.vhd(298): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(314): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(332): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(345): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(334): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(350): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(366): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(384): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(397): Case choice must be a locally static expression. # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -1817,6 +428,7 @@ do testcore.do # Loading work.pipeline_tb(behavior) # Loading work.mem_pkg # Loading work.fetch_stage(behav) +# Loading work.r_w_ram(behaviour) # Loading work.rom(behaviour) # Loading work.decode_stage(behav) # Loading work.r2_w_ram(behaviour) @@ -1832,13 +444,14 @@ do testcore.do # Loading work.extension_uart_pkg # Loading work.extension_7seg_pkg(body) # Loading work.writeback_stage(behav) -# Loading work.r_w_ram(behaviour) +# Loading work.r_w_ram_be(behaviour) # Loading work.extension_uart(behav) # Loading ieee.std_logic_arith(body) # Loading ieee.std_logic_unsigned(body) # Loading work.rs232_tx(beh) # Loading work.rs232_rx(beh) # Loading work.extension_7seg(behav) +# Loading work.extension_interrupt(behav) # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 0 Instance: /pipeline_tb/writeback_st # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 @@ -1855,8 +468,13 @@ do testcore.do # Time: 0 ns Iteration: 4 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 5 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst -# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -# Time: 20 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram +# ** Fatal: (vsim-3420) Array lengths do not match. Left is 32 (31 downto 0). Right is 31 (31 downto 1). +# Time: 20 ns Iteration: 1 Process: /pipeline_tb/fetch_st/instruction_rom/line__13 File: ../src/rom_b.vhd +# Fatal error in Process line__13 at ../src/rom_b.vhd line 127 +# +# HDL call sequence: +# Stopped at ../src/rom_b.vhd 127 Process line__13 +# do testcore.do # ** Warning: (vlib-34) Library already exists at "work". # Modifying modelsim.ini @@ -1881,6 +499,18 @@ do testcore.do # -- Loading package standard # -- Loading package std_logic_1164 # -- Loading package numeric_std +# -- Compiling entity r_w_ram_be +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package mem_pkg +# -- Compiling architecture behaviour of r_w_ram_be +# -- Loading entity r_w_ram_be +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std # -- Loading package mem_pkg # -- Compiling entity r2_w_ram # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 @@ -1955,6 +585,21 @@ do testcore.do # -- Loading package numeric_std # -- Loading package common_pkg # -- Loading package extension_pkg +# -- Compiling entity extension_interrupt +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package common_pkg +# -- Loading package extension_pkg +# -- Compiling architecture behav of extension_interrupt +# -- Loading entity extension_interrupt +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package common_pkg +# -- Loading package extension_pkg # -- Compiling package extension_7seg_pkg # -- Compiling package body extension_7seg_pkg # -- Loading package extension_7seg_pkg @@ -2221,10 +866,11 @@ do testcore.do # -- Loading package extension_7seg_pkg # -- Compiling architecture behav of writeback_stage # -- Loading entity writeback_stage -# ** Warning: ../src/writeback_stage_b.vhd(298): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(314): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(332): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(345): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(334): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(350): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(366): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(384): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(397): Case choice must be a locally static expression. # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -2254,6 +900,7 @@ do testcore.do # Loading work.pipeline_tb(behavior) # Loading work.mem_pkg # Loading work.fetch_stage(behav) +# Loading work.r_w_ram(behaviour) # Loading work.rom(behaviour) # Loading work.decode_stage(behav) # Loading work.r2_w_ram(behaviour) @@ -2269,13 +916,14 @@ do testcore.do # Loading work.extension_uart_pkg # Loading work.extension_7seg_pkg(body) # Loading work.writeback_stage(behav) -# Loading work.r_w_ram(behaviour) +# Loading work.r_w_ram_be(behaviour) # Loading work.extension_uart(behav) # Loading ieee.std_logic_arith(body) # Loading ieee.std_logic_unsigned(body) # Loading work.rs232_tx(beh) # Loading work.rs232_rx(beh) # Loading work.extension_7seg(behav) +# Loading work.extension_interrupt(behav) # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 0 Instance: /pipeline_tb/writeback_st # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 @@ -2294,6 +942,8 @@ do testcore.do # Time: 0 ns Iteration: 5 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 20 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram +# WARNING: No extended dataflow License exists +run do testcore.do # ** Warning: (vlib-34) Library already exists at "work". # Modifying modelsim.ini @@ -2404,6 +1054,21 @@ do testcore.do # -- Loading package numeric_std # -- Loading package common_pkg # -- Loading package extension_pkg +# -- Compiling entity extension_interrupt +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package common_pkg +# -- Loading package extension_pkg +# -- Compiling architecture behav of extension_interrupt +# -- Loading entity extension_interrupt +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package common_pkg +# -- Loading package extension_pkg # -- Compiling package extension_7seg_pkg # -- Compiling package body extension_7seg_pkg # -- Loading package extension_7seg_pkg @@ -2670,10 +1335,11 @@ do testcore.do # -- Loading package extension_7seg_pkg # -- Compiling architecture behav of writeback_stage # -- Loading entity writeback_stage -# ** Warning: ../src/writeback_stage_b.vhd(298): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(314): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(332): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(345): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(334): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(350): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(366): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(384): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(397): Case choice must be a locally static expression. # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -2703,6 +1369,7 @@ do testcore.do # Loading work.pipeline_tb(behavior) # Loading work.mem_pkg # Loading work.fetch_stage(behav) +# Loading work.r_w_ram(behaviour) # Loading work.rom(behaviour) # Loading work.decode_stage(behav) # Loading work.r2_w_ram(behaviour) @@ -2725,6 +1392,119 @@ do testcore.do # Loading work.rs232_tx(beh) # Loading work.rs232_rx(beh) # Loading work.extension_7seg(behav) +# Loading work.extension_interrupt(behav) +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/writeback_st +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/gpmp_inst +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 1 Instance: /pipeline_tb/writeback_st +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 1 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 3 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 4 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 5 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 20 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram +run +restart +run +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/writeback_st +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/gpmp_inst +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 1 Instance: /pipeline_tb/writeback_st +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 1 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 3 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 4 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 5 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 20 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram +run +vcom -reportprogress 300 -work work /home/stefan/processor/calu/cpu/src/fetch_stage_b.vhd +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package common_pkg +# -- Loading package extension_pkg +# -- Loading package core_pkg +# -- Loading package mem_pkg +# -- Compiling architecture behav of fetch_stage +# -- Loading entity fetch_stage +# ** Error: /home/stefan/processor/calu/cpu/src/fetch_stage_b.vhd(106): Illegal target for signal assignment. +# ** Error: /home/stefan/processor/calu/cpu/src/fetch_stage_b.vhd(106): (vcom-1136) Unknown identifier "instr_rd_addr_nxt". +# ** Error: /home/stefan/processor/calu/cpu/src/fetch_stage_b.vhd(121): VHDL Compiler exiting +vcom -reportprogress 300 -work work /home/stefan/processor/calu/cpu/src/fetch_stage_b.vhd +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package common_pkg +# -- Loading package extension_pkg +# -- Loading package core_pkg +# -- Loading package mem_pkg +# -- Compiling architecture behav of fetch_stage +# -- Loading entity fetch_stage +vcom -reportprogress 300 -work work /home/stefan/processor/calu/cpu/src/fetch_stage_b.vhd +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package common_pkg +# -- Loading package extension_pkg +# -- Loading package core_pkg +# -- Loading package mem_pkg +# -- Compiling architecture behav of fetch_stage +# -- Loading entity fetch_stage +restart +# Loading work.fetch_stage(behav) +run +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/writeback_st +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/gpmp_inst +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 0 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 1 Instance: /pipeline_tb/writeback_st +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 1 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 3 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 4 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 0 ns Iteration: 5 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst +# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# Time: 20 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram +run +vcom -reportprogress 300 -work work /home/stefan/processor/calu/cpu/src/fetch_stage_b.vhd +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package common_pkg +# -- Loading package extension_pkg +# -- Loading package core_pkg +# -- Loading package mem_pkg +# -- Compiling architecture behav of fetch_stage +# -- Loading entity fetch_stage +restart +# Loading work.fetch_stage(behav) +run # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 0 Instance: /pipeline_tb/writeback_st # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 @@ -2743,6 +1523,7 @@ do testcore.do # Time: 0 ns Iteration: 5 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 20 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram +run do testcore.do # ** Warning: (vlib-34) Library already exists at "work". # Modifying modelsim.ini @@ -2853,6 +1634,21 @@ do testcore.do # -- Loading package numeric_std # -- Loading package common_pkg # -- Loading package extension_pkg +# -- Compiling entity extension_interrupt +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package common_pkg +# -- Loading package extension_pkg +# -- Compiling architecture behav of extension_interrupt +# -- Loading entity extension_interrupt +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package common_pkg +# -- Loading package extension_pkg # -- Compiling package extension_7seg_pkg # -- Compiling package body extension_7seg_pkg # -- Loading package extension_7seg_pkg @@ -3119,10 +1915,11 @@ do testcore.do # -- Loading package extension_7seg_pkg # -- Compiling architecture behav of writeback_stage # -- Loading entity writeback_stage -# ** Warning: ../src/writeback_stage_b.vhd(307): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(323): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(341): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(354): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(334): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(350): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(366): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(384): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(397): Case choice must be a locally static expression. # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -3152,6 +1949,7 @@ do testcore.do # Loading work.pipeline_tb(behavior) # Loading work.mem_pkg # Loading work.fetch_stage(behav) +# Loading work.r_w_ram(behaviour) # Loading work.rom(behaviour) # Loading work.decode_stage(behav) # Loading work.r2_w_ram(behaviour) @@ -3174,6 +1972,7 @@ do testcore.do # Loading work.rs232_tx(beh) # Loading work.rs232_rx(beh) # Loading work.extension_7seg(behav) +# Loading work.extension_interrupt(behav) # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 0 Instance: /pipeline_tb/writeback_st # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 @@ -3192,6 +1991,7 @@ do testcore.do # Time: 0 ns Iteration: 5 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 20 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram +run do testcore.do # ** Warning: (vlib-34) Library already exists at "work". # Modifying modelsim.ini @@ -3302,6 +2102,21 @@ do testcore.do # -- Loading package numeric_std # -- Loading package common_pkg # -- Loading package extension_pkg +# -- Compiling entity extension_interrupt +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package common_pkg +# -- Loading package extension_pkg +# -- Compiling architecture behav of extension_interrupt +# -- Loading entity extension_interrupt +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package common_pkg +# -- Loading package extension_pkg # -- Compiling package extension_7seg_pkg # -- Compiling package body extension_7seg_pkg # -- Loading package extension_7seg_pkg @@ -3568,10 +2383,11 @@ do testcore.do # -- Loading package extension_7seg_pkg # -- Compiling architecture behav of writeback_stage # -- Loading entity writeback_stage -# ** Warning: ../src/writeback_stage_b.vhd(307): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(323): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(341): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(354): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(334): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(350): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(366): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(384): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(397): Case choice must be a locally static expression. # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -3601,6 +2417,7 @@ do testcore.do # Loading work.pipeline_tb(behavior) # Loading work.mem_pkg # Loading work.fetch_stage(behav) +# Loading work.r_w_ram(behaviour) # Loading work.rom(behaviour) # Loading work.decode_stage(behav) # Loading work.r2_w_ram(behaviour) @@ -3623,6 +2440,7 @@ do testcore.do # Loading work.rs232_tx(beh) # Loading work.rs232_rx(beh) # Loading work.extension_7seg(behav) +# Loading work.extension_interrupt(behav) # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 0 Instance: /pipeline_tb/writeback_st # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 @@ -3641,6 +2459,8 @@ do testcore.do # Time: 0 ns Iteration: 5 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 20 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram +run +run do testcore.do # ** Warning: (vlib-34) Library already exists at "work". # Modifying modelsim.ini @@ -3751,6 +2571,21 @@ do testcore.do # -- Loading package numeric_std # -- Loading package common_pkg # -- Loading package extension_pkg +# -- Compiling entity extension_interrupt +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package common_pkg +# -- Loading package extension_pkg +# -- Compiling architecture behav of extension_interrupt +# -- Loading entity extension_interrupt +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package common_pkg +# -- Loading package extension_pkg # -- Compiling package extension_7seg_pkg # -- Compiling package body extension_7seg_pkg # -- Loading package extension_7seg_pkg @@ -4017,10 +2852,11 @@ do testcore.do # -- Loading package extension_7seg_pkg # -- Compiling architecture behav of writeback_stage # -- Loading entity writeback_stage -# ** Warning: ../src/writeback_stage_b.vhd(307): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(323): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(341): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(354): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(334): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(350): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(366): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(384): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(397): Case choice must be a locally static expression. # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -4050,6 +2886,7 @@ do testcore.do # Loading work.pipeline_tb(behavior) # Loading work.mem_pkg # Loading work.fetch_stage(behav) +# Loading work.r_w_ram(behaviour) # Loading work.rom(behaviour) # Loading work.decode_stage(behav) # Loading work.r2_w_ram(behaviour) @@ -4072,6 +2909,7 @@ do testcore.do # Loading work.rs232_tx(beh) # Loading work.rs232_rx(beh) # Loading work.extension_7seg(behav) +# Loading work.extension_interrupt(behav) # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 0 Instance: /pipeline_tb/writeback_st # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 @@ -4090,54 +2928,8 @@ do testcore.do # Time: 0 ns Iteration: 5 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 20 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram -do testcore.do -# ** Warning: (vlib-34) Library already exists at "work". -# Modifying modelsim.ini -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling package mem_pkg -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling entity r_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of r_w_ram -# -- Loading entity r_w_ram -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Compiling entity r_w_ram_be -# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 -# -- Loading package standard -# -- Loading package std_logic_1164 -# -- Loading package numeric_std -# -- Loading package mem_pkg -# -- Compiling architecture behaviour of r_w_ram_be -# -- Loading entity r_w_ram_be -# ** Error: ../src/r_w_ram_be_b.vhd(12): near ";": expecting ')' -# ** Error: ../src/r_w_ram_be_b.vhd(25): Illegal target for signal assignment. -# ** Error: ../src/r_w_ram_be_b.vhd(25): (vcom-1136) Unknown identifier "ram". -# ** Error: ../src/r_w_ram_be_b.vhd(28): Illegal target for signal assignment. -# ** Error: ../src/r_w_ram_be_b.vhd(28): (vcom-1136) Unknown identifier "ram". -# ** Error: ../src/r_w_ram_be_b.vhd(31): Illegal target for signal assignment. -# ** Error: ../src/r_w_ram_be_b.vhd(31): (vcom-1136) Unknown identifier "ram". -# ** Error: ../src/r_w_ram_be_b.vhd(34): Illegal target for signal assignment. -# ** Error: ../src/r_w_ram_be_b.vhd(34): (vcom-1136) Unknown identifier "ram". -# ** Error: ../src/r_w_ram_be_b.vhd(37): (vcom-1136) Unknown identifier "ram". -# ** Error: ../src/r_w_ram_be_b.vhd(41): VHDL Compiler exiting -# ** Error: /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed. -# Error in macro ./testcore.do line 8 -# /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed. -# while executing -# "vcom -work work ../src/r_w_ram_be_b.vhd" +run +run do testcore.do # ** Warning: (vlib-34) Library already exists at "work". # Modifying modelsim.ini @@ -4248,6 +3040,21 @@ do testcore.do # -- Loading package numeric_std # -- Loading package common_pkg # -- Loading package extension_pkg +# -- Compiling entity extension_interrupt +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package common_pkg +# -- Loading package extension_pkg +# -- Compiling architecture behav of extension_interrupt +# -- Loading entity extension_interrupt +# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 +# -- Loading package standard +# -- Loading package std_logic_1164 +# -- Loading package numeric_std +# -- Loading package common_pkg +# -- Loading package extension_pkg # -- Compiling package extension_7seg_pkg # -- Compiling package body extension_7seg_pkg # -- Loading package extension_7seg_pkg @@ -4514,10 +3321,11 @@ do testcore.do # -- Loading package extension_7seg_pkg # -- Compiling architecture behav of writeback_stage # -- Loading entity writeback_stage -# ** Warning: ../src/writeback_stage_b.vhd(307): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(323): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(341): Case choice must be a locally static expression. -# ** Warning: ../src/writeback_stage_b.vhd(354): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(334): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(350): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(366): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(384): Case choice must be a locally static expression. +# ** Warning: ../src/writeback_stage_b.vhd(397): Case choice must be a locally static expression. # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 @@ -4547,6 +3355,7 @@ do testcore.do # Loading work.pipeline_tb(behavior) # Loading work.mem_pkg # Loading work.fetch_stage(behav) +# Loading work.r_w_ram(behaviour) # Loading work.rom(behaviour) # Loading work.decode_stage(behav) # Loading work.r2_w_ram(behaviour) @@ -4569,6 +3378,7 @@ do testcore.do # Loading work.rs232_tx(beh) # Loading work.rs232_rx(beh) # Loading work.extension_7seg(behav) +# Loading work.extension_interrupt(behav) # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 0 ns Iteration: 0 Instance: /pipeline_tb/writeback_st # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 @@ -4587,3 +3397,4 @@ do testcore.do # Time: 0 ns Iteration: 5 Instance: /pipeline_tb/exec_st/alu_inst/shift_inst # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 # Time: 20 ns Iteration: 1 Instance: /pipeline_tb/writeback_st/data_ram +run diff --git a/cpu/src/alu_b.vhd b/cpu/src/alu_b.vhd index c79541b..5702377 100755 --- a/cpu/src/alu_b.vhd +++ b/cpu/src/alu_b.vhd @@ -75,7 +75,11 @@ begin paddr <= (others =>'0'); result_v.result := add_result.result; - prog_cnt_nxt := std_logic_vector(unsigned(prog_cnt)+1); + if (op_detail(DIRECT_JUMP_OPT) = '0') then + prog_cnt_nxt := std_logic_vector(unsigned(prog_cnt)+1); + else + prog_cnt_nxt := prog_cnt; + end if; case cond is when COND_NZERO => cond_met := not(alu_state.status.zero); diff --git a/cpu/src/fetch_stage_b.vhd b/cpu/src/fetch_stage_b.vhd index 3f4650d..3e30cda 100644 --- a/cpu/src/fetch_stage_b.vhd +++ b/cpu/src/fetch_stage_b.vhd @@ -52,7 +52,7 @@ begin if (reset = RESET_VALUE) then instr_r_addr <= (others => '0'); - rom_ram <= ROM_USE; + rom_ram <= ROM_USE; elsif rising_edge(clk) then instr_r_addr <= instr_r_addr_nxt; rom_ram <= rom_ram_nxt; @@ -64,7 +64,6 @@ end process; asyn: process(reset, instr_r_addr, jump_result, prediction_result, branch_prediction_bit, alu_jump_bit, instr_rd_data, rom_ram, instr_rd_data_rom, int_req) begin - rom_ram_nxt <= rom_ram; case rom_ram is @@ -86,7 +85,7 @@ begin instr_r_addr_nxt <= (others => '0'); end if; - if (alu_jump_bit = LOGIC_ACT) then + if (alu_jump_bit = LOGIC_ACT and int_req = IDLE) then instr_r_addr_nxt <= jump_result; instruction(31 downto 28) <= "1111"; elsif (branch_prediction_bit = LOGIC_ACT) then @@ -102,14 +101,24 @@ begin instruction(6 downto 4) <= "001"; instruction(3 downto 2) <= "01"; instruction(1 downto 0) <= "10"; - + +-- instr_r_addr_nxt <= instr_r_addr; when others => null; end case; end process; -prog_cnt(10 downto 0) <= std_logic_vector(unsigned(instr_r_addr(PHYS_INSTR_ADDR_WIDTH-1 downto 0))); -prog_cnt(31 downto 11) <= (others => '0'); +out_logic : process (instr_r_addr, alu_jump_bit, int_req, jump_result) + +begin + prog_cnt(10 downto 0) <= std_logic_vector(unsigned(instr_r_addr(PHYS_INSTR_ADDR_WIDTH-1 downto 0))); + prog_cnt(31 downto 11) <= (others => '0'); + + if (int_req /= IDLE and alu_jump_bit = LOGIC_ACT ) then + prog_cnt(10 downto 0) <= jump_result(10 downto 0); + end if; + +end process; end behav; diff --git a/cpu/src/rom_b.vhd b/cpu/src/rom_b.vhd index 2bce93d..e02c1c4 100644 --- a/cpu/src/rom_b.vhd +++ b/cpu/src/rom_b.vhd @@ -99,17 +99,17 @@ begin --uart test: - when "0000000" => data_out <= x"ed010058"; - when "0000001" => data_out <= x"ed090060"; - when "0000010" => data_out <= x"ed110080"; --x"e7188000"; f - when "0000011" => data_out <= x"ed390000"; --x"ec1a0000"; - when "0000100" => data_out <= x"ed480012"; - when "0000101" => data_out <= x"e7438000"; - when "0000110" => data_out <= x"e254c000"; -- f - when "0000111" => data_out <= x"07188000"; - when "0001000" => data_out <= x"07980000"; - when "0001001" => data_out <= x"07990000"; - when "0001010" => data_out <= x"eb7ffb81"; +-- when "0000000" => data_out <= x"ed010058"; +-- when "0000001" => data_out <= x"ed090060"; +-- when "0000010" => data_out <= x"ed110080"; --x"e7188000"; f +-- when "0000011" => data_out <= x"ed390000"; --x"ec1a0000"; +-- when "0000100" => data_out <= x"ed480012"; +-- when "0000101" => data_out <= x"e7438000"; +-- when "0000110" => data_out <= x"e254c000"; -- f +-- when "0000111" => data_out <= x"07188000"; +-- when "0001000" => data_out <= x"07980000"; +-- when "0001001" => data_out <= x"07990000"; +-- when "0001010" => data_out <= x"eb7ffb81"; ------------------------------------------- @@ -124,10 +124,24 @@ begin -- when "00000001000" => data_out <= x"e7280004"; -- -- when "00000001001" => data_out <= x"eb7ffb81"; --- when "0000000" => data_out <= x"eb000181"; --- when "0000001" => data_out <= x"F0000000"; --- when "0000010" => data_out <= x"eb000008"; --- when others => data_out <= "11101011000000000000000000000010"; + when "0000000" => data_out <= "11101011000000000000010000000010"; + when "0000001" => data_out <= "11101011000000000001000000000110"; + when "0000010" => data_out <= x"eb000008"; + + when "0001000" => data_out <= x"ed090058"; + when "0001001" => data_out <= x"ed110060"; + when "0001010" => data_out <= x"ed190080"; + when "0001011" => data_out <= x"ed210120"; + when "0001100" => data_out <= x"ed280018"; + when "0001101" => data_out <= x"e7aa0000"; + + -- when "0100000" => data_out <= x"f7aa0000"; + when "0100001" => data_out <= x"e7390000"; + when "0100010" => data_out <= x"e7b98000"; + when "0100011" => data_out <= x"e7b88000"; + when "0100100" => data_out <= x"eb000008"; + + when others => data_out <= "11101011000000000000000000000010"; end case; end if;