architecture beh of rs232_rx is
-- definierern der intern verwendeten Signale
- type STATE_TYPE is (IDLE, READ_START, READ_BIT, READ_STOP, POST_STOP);
+ type STATE_TYPE is (IDLE, READ_START, READ_BIT, READ_STOP);
signal state, state_next : STATE_TYPE;
signal bus_rx_last, bus_rx_int, new_rx_data_nxt : std_logic := '0';
signal cnt, cnt_next : integer := 0;
when READ_STOP =>
-- hier wird nur noch auf das Stopbit abgewartet und gelesen um den
-- Lesevorgang koerrekt zu beenden
- if baud_cnt = bd_rate and bus_rx = '1' then
- state_next <= IDLE;
- elsif baud_cnt = bd_rate and bus_rx = '0' then
- state_next <= IDLE;
- end if;
- when POST_STOP =>
- -- hier wird nur noch eine halbe Bitzeit gewartet
- if baud_cnt(BAUD_RATE_WIDTH-2 downto 0) = bd_rate(BAUD_RATE_WIDTH-1 downto 1) then
+ if baud_cnt = bd_rate then
state_next <= IDLE;
end if;
end case;
baud_cnt_next <= std_logic_vector(unsigned(baud_cnt) + 1);
if baud_cnt = bd_rate then
baud_cnt_next <= (others => '0');
- new_rx_data_nxt <= '1';
+ new_rx_data_nxt <= bus_rx;
rx_data_res_nxt <= rx_data_int;
end if;
- when POST_STOP =>
- --halbe bitzeit wartenr auf counter warten
- baud_cnt_next <= baud_cnt + 1;
- if baud_cnt(BAUD_RATE_WIDTH-2 downto 0) = bd_rate(BAUD_RATE_WIDTH-1 downto 1) then
- new_rx_data_nxt <= '1';
- rx_data_res_nxt <= rx_data_int;
- baud_cnt_next <= (others => '0');
- end if;
end case;
end process;