X-Git-Url: http://wien.tomnetworks.com/gitweb/?p=calu.git;a=blobdiff_plain;f=cpu%2Fsrc%2Fcore_top.vhd;fp=cpu%2Fsrc%2Fcore_top.vhd;h=a8d3bde57bfbc280729be3cd777bf3733779c9bf;hp=f5354e33f4d5f9f0cf4a0dc130a07793830c24e6;hb=a37bfd1075f405931099ba5cc347b3954855675e;hpb=f93d3c8cdbed65c78214fde28f12c55d0e8232a5

diff --git a/cpu/src/core_top.vhd b/cpu/src/core_top.vhd
index f5354e3..a8d3bde 100644
--- a/cpu/src/core_top.vhd
+++ b/cpu/src/core_top.vhd
@@ -18,12 +18,12 @@ entity core_top is
 		  -- uart
 			bus_tx : out std_logic;
 			bus_rx : in std_logic;
-			led2 : out std_logic;
+			led2 : out std_logic
 			
-			sseg0 : out std_logic_vector(0 to 6);
-			sseg1 : out std_logic_vector(0 to 6);
-			sseg2 : out std_logic_vector(0 to 6);
-			sseg3 : out std_logic_vector(0 to 6)
+			--sseg0 : out std_logic_vector(0 to 6);
+			--sseg1 : out std_logic_vector(0 to 6);
+			--sseg2 : out std_logic_vector(0 to 6);
+			--sseg3 : out std_logic_vector(0 to 6)
 		);
 
 end core_top;
@@ -180,7 +180,8 @@ begin
                 reg_wr_data_pin, reg_we_pin, reg_w_addr_pin, jump_result_pin, alu_jump_bit_pin,bus_tx, bus_rx,
 				-- instruction memory program port :D
 				new_im_data, im_addr, im_data,
-				sseg0, sseg1, sseg2, sseg3, int_req);
+				--sseg0, sseg1, sseg2, sseg3,
+				 int_req);
 
 
 syn: process(sys_clk, sys_res, soft_res)