progs: bench tools bei deepjit.s geadded

[calu.git] / progs / deepjit.s

diff --git a/progs/deepjit.s b/progs/deepjit.s
index 97008f9da9ec1ebf37fc37e2345ad2e00c83551a..45a5856515eac5727ef4903b9dc0da8427a9096a 100644 (file)
--- a/progs/deepjit.s
+++ b/progs/deepjit.s
@@ -1,4 +1,5 @@
 #define PROGINSTR stw r0, PDATA(r13)
+#include "dt_inc.s"
 .data
 .org 0x10
 inputdata:
@@ -89,7 +90,7 @@ prog_imm:
 .ifill push r6
 
 prog_pop:
-.ifill disc r6
+.ifill disc
 
 prog_xch:
 .ifill pop r6
@@ -103,45 +104,33 @@ prog_not:
 .ifill push r6
 
 .text
-       .define UART_BASE, 0x2000
-       .define UART_STATUS, 0x0
-       .define UART_RECV, 0xc
-       .define UART_TRANS, 0x8
-
-       .define UART_TRANS_EMPTY, 0x1
-       .define UART_RECV_NEW, 0x2
-
-       .define PBASE, 0x2030
-       .define PADDR, 0x4
-       .define PDATA, 0x8
+.org 0
+start:
+       call+ main
+       call+ main
+       ret
 
 
 main:
 
-       ldi  r10, UART_BASE@lo
-       ldih r10, UART_BASE@hi
-;recv byte
-u_recv_byte:
-       ldw r3, UART_STATUS(r10)
-       andx r3, UART_RECV_NEW
-       brzs+ u_recv_byte; branch if zero
-
-       ldw r0, UART_RECV(r10)
-;recv byte
-       ldis r0, 0x48
-u_test:
-       ldw r9, UART_STATUS(r10)
-       andx r9, UART_TRANS_EMPTY
-       brnz+ u_test ; branch if not zero
-       stb r0, UART_TRANS(r10)
+       call+ u_init
+       call+ u_recv_byte
+
+       ; benchprolog
+       call t_init
+       call t_stop
+       ldis r1, 0
+       call t_valset
+       call t_start
+       ; /benchprolog
 
        ;set address of input
        ldis r1, inputdata@lo
        ldih r1, inputdata@hi
 
        ;set address of program start
-       ldis r2, prog_start@lo
-       ldih r2, prog_start@hi
+       ldis r2, (prog_start/4)@lo
+       ldih r2, (prog_start/4)@hi
 
        ;set address to instruction table
        ldis r3, instrtable@lo
@@ -172,26 +161,25 @@ u_test:
        ;call jit'ed prog
        call+ prog_start
 
-;send result
+       ; benchepilog
        push r0
-       ldi  r10, UART_BASE@lo
-       ldih r10, UART_BASE@hi
-
-u_send_by1:
-       ldw r9, UART_STATUS(r10)
-       andx r9, UART_TRANS_EMPTY
-       brnz+ u_send_by1 ; branch if not zero
-       ldis r0, 0x50
-       stb r0, UART_TRANS(r10)
-
-u_send_byte:
-       ldw r9, UART_STATUS(r10)
-       andx r9, UART_TRANS_EMPTY
-       brnz+ u_send_byte ; branch if not zero
-       pop r0
-       stb r0, UART_TRANS(r10)
-
-;send result
+       call+ t_init
+       call+ t_stop
+       call+ t_valget
+       subi r0, r0, 0xd ; offset abziehen
+       pop r3
+       push r0
+       push r3
+       ; /benchepilog
+
+       ;send result
+       call+ u_init
+       pop r1
+       call u_send_byte
+       call u_send_newline
+       pop r1
+       call u_send_uint
+       call u_send_newline
 
        br+ main
 
@@ -271,7 +259,7 @@ vm_defer:
 
        ;generate branch
        sub r11, r6, r8
-       lrs r11, r11, 2
+       ;lrs r11, r11, 2
        ;set the upper 16 bit 0
        andx r11, 0xFFFF
        ;shift to the position of imm in br
@@ -318,7 +306,7 @@ vm_mul:
        PROGINSTR
 
        ;increment address
-       addi r2, r2, 52
+       addi r2, r2, 13
 
        br+ vm_loop
 
@@ -340,7 +328,7 @@ vm_add:
        PROGINSTR
 
        ;increment address
-       addi r2, r2, 16
+       addi r2, r2, 4
 
        br+ vm_loop
 
@@ -362,7 +350,7 @@ vm_sub:
        PROGINSTR
 
        ;increment address
-       addi r2, r2, 16
+       addi r2, r2, 4
 
        br+ vm_loop
 
@@ -388,7 +376,7 @@ vm_consts:
        PROGINSTR
 
        ;increment address
-       addi r2, r2, 8
+       addi r2, r2, 2
 
        br+ vm_loop
 
@@ -412,7 +400,7 @@ vm_lessthan:
        PROGINSTR
 
        ;increment address
-       addi r2, r2, 20
+       addi r2, r2, 5
 
        br+ vm_loop
 
@@ -429,7 +417,7 @@ vm_dup:
        PROGINSTR
 
        ;increment address
-       addi r2, r2, 8
+       addi r2, r2, 2
 
        br+ vm_loop
 
@@ -489,7 +477,7 @@ vm_imm:
        PROGINSTR
 
        ;increment address
-       addi r2, r2, 12
+       addi r2, r2, 3
 
        ;pc+4
        addi r1, r1, 4
@@ -523,7 +511,7 @@ vm_jmp:
        PROGINSTR
 
        ;we add the offset to this instruction
-       addi r8, r2, 12
+       addi r8, r2, 3
 
 
        ;we know calculate the jump destination
@@ -554,7 +542,7 @@ vm_jmp:
        sub r8, r0, r8
        ;we shift 2 bits out, because rel. br takes instr.
        ;count and not address amount ...
-       lrs r8, r8, 2
+       ;lrs r8, r8, 2
        ;set the upper 16 bit 0
        andx r8, 0xFFFF
        ;shift to the position of imm in br
@@ -565,7 +553,7 @@ vm_jmp:
        PROGINSTR
 
        ;increment address
-       addi r2, r2, 16
+       addi r2, r2, 4
 
        br+ vm_loop
 
@@ -591,7 +579,7 @@ vm_possign:
        ;increment defer table address
        addi r9, r9, 8
        ;increment address
-       addi r2, r2, 16
+       addi r2, r2, 4
        br+ vm_loop
 
 ;case P
@@ -606,7 +594,7 @@ vm_pop:
        PROGINSTR
 
        ;increment address
-       addi r2, r2, 4
+       addi r2, r2, 1
 
        br+ vm_loop
 
@@ -628,7 +616,7 @@ vm_xch:
        PROGINSTR
 
        ;increment address
-       addi r2, r2, 16
+       addi r2, r2, 4
 
        br+ vm_loop
 
@@ -648,11 +636,10 @@ vm_not:
        PROGINSTR
 
        ;increment address
-       addi r2, r2, 12
+       addi r2, r2, 3
 
        br+ vm_loop
 
-prog_start:
 
 .data
 jumptable: