uart : es sendet !!!!

[calu.git] / cpu / src / writeback_stage_b.vhd

diff --git a/cpu/src/writeback_stage_b.vhd b/cpu/src/writeback_stage_b.vhd
index c771c910909e8bc9da193d3c3c0f169f16ee9a95..0ad3689769b12c982964534e8b88b276f39ab68b 100644 (file)
--- a/cpu/src/writeback_stage_b.vhd
+++ b/cpu/src/writeback_stage_b.vhd
@@ -7,15 +7,18 @@ use work.core_pkg.all;
 
 use work.mem_pkg.all;
 use work.extension_pkg.all;
+use work.extension_uart_pkg.all;
 
 architecture behav of writeback_stage is
 
-signal data_ram_read : word_t;
+signal data_ram_read, data_ram_read_ext : word_t;
 
 signal wb_reg, wb_reg_nxt : writeback_rec;
 
 signal ext_uart,ext_timer,ext_gpmp :  extmod_rec;
 
+signal bus_tx,sel_nxt :std_logic;
+
 
 
 begin
@@ -36,6 +39,18 @@ begin
                        data_ram_read
                );
 
+uart : extension_uart 
+       generic map(
+               RESET_VALUE
+               )
+       port map(
+                       clk ,
+                       reset,
+                       ext_uart,
+                       data_ram_read_ext,
+                       bus_tx
+               );
+
        
 syn: process(clk, reset)
 
@@ -134,39 +149,39 @@ begin
 end process;
 
 
-addr_de_mult: process(wb_reg_nxt.address, ram_data, wb_reg)
+addr_de_mult: process(wb_reg_nxt.address, ram_data, wb_reg,sel_nxt,wb_reg_nxt.dmem_write_en)
 
 begin
-
-  ext_uart.sel <='0';
-  ext_uart.wr_en <= '0';
+               ext_uart.sel <='0';
+  ext_uart.wr_en <= wb_reg_nxt.dmem_write_en;
   ext_uart.byte_en <= (others => '0');
   ext_uart.data <= (others => '0');
   ext_uart.addr <= (others => '0');
 
   ext_timer.sel <='0';
-  ext_timer.wr_en <= '0';
+  ext_timer.wr_en <= wb_reg_nxt.dmem_write_en;
   ext_timer.byte_en <= (others => '0');
   ext_timer.data <= (others => '0');
   ext_timer.addr <= (others => '0');
 
   ext_gpmp.sel <='0';
-  ext_gpmp.wr_en <= '0';
+  ext_gpmp.wr_en <= wb_reg_nxt.dmem_write_en;
   ext_gpmp.byte_en <= (others => '0');
   ext_gpmp.data <= (others => '0');
   ext_gpmp.addr <= (others => '0');
                                                  -- wenn ich hier statt dem 4rer die konstante nehme dann gibts an fehler wegen nicht lokaler variable -.-
  case wb_reg_nxt.address(wb_reg_nxt.address'high downto 4) is
        when EXT_UART_ADDR => 
-               ext_uart.sel <='1';
-               ext_uart.wr_en <= wb_reg_nxt.dmem_write_en;
+               ext_uart.sel <='1';
+               ext_timer.wr_en <= wb_reg_nxt.dmem_write_en;
                ext_uart.data <= ram_data;
                ext_uart.addr <= wb_reg_nxt.address(wb_reg_nxt.address'high downto BYTEADDR);
                case wb_reg.address(1 downto 0) is
                                when "00" => ext_uart.byte_en <= "0001";
                                when "01" => ext_uart.byte_en <= "0010";
                                when "10" => ext_uart.byte_en <= "0100";
-                               when "11" => ext_uart.byte_en <= "1000";
+                               --when "11" => ext_uart.byte_en <= "1000";
+                               when "11" => ext_uart.byte_en <= "1111";
                                when others => null;
                        end case;
        when EXT_TIMER_ADDR =>