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small bugfix in wb-stage
[calu.git]
/
cpu
/
src
/
fetch_stage_b.vhd
diff --git
a/cpu/src/fetch_stage_b.vhd
b/cpu/src/fetch_stage_b.vhd
index 7409e426989e699a755b92f03fd4ae3774919bae..e1faf1fd819cd8680904b1a097bfd217e61250e0 100644
(file)
--- a/
cpu/src/fetch_stage_b.vhd
+++ b/
cpu/src/fetch_stage_b.vhd
@@
-17,7
+17,7
@@
signal instr_rd_data : instruction_word_t;
begin
- instruction_ram : r_w_ram
+ instruction_ram : r_w_ram
--rom
generic map (
PHYS_INSTR_ADDR_WIDTH,
WORD_WIDTH