instruction memory progammer: is in and works in simulations

[calu.git] / cpu / src / fetch_stage_b.vhd

diff --git a/cpu/src/fetch_stage_b.vhd b/cpu/src/fetch_stage_b.vhd
index 3e30cdad0b572a75022180de1fde346a12e3d1f2..1836f3a34b6c202fe2c6b40b7d9ba14e34be3f08 100644 (file)
--- a/cpu/src/fetch_stage_b.vhd
+++ b/cpu/src/fetch_stage_b.vhd
@@ -26,10 +26,10 @@ begin
                
                port map (
                        clk,
-                       instr_w_addr(PHYS_INSTR_ADDR_WIDTH-1 downto 0),
+                       im_addr(PHYS_INSTR_ADDR_WIDTH-1 downto 0),
                        instr_r_addr_nxt(PHYS_INSTR_ADDR_WIDTH-1 downto 0),
-                       instr_we,
-                       instr_wr_data,
+                       new_im_data_in,
+                       im_data,
                        instr_rd_data
                );