instruction memory progammer: is in and works in simulations

[calu.git] / cpu / src / fetch_stage.vhd

diff --git a/cpu/src/fetch_stage.vhd b/cpu/src/fetch_stage.vhd
index 3165d933ee6303e6d5b2288cccbad403c72a171d..d472d531feabde28a7e40b8b8e6db754ed1db079 100644 (file)
--- a/cpu/src/fetch_stage.vhd
+++ b/cpu/src/fetch_stage.vhd
@@ -25,6 +25,10 @@ entity fetch_stage is
                        branch_prediction_bit : in std_logic;
                        alu_jump_bit : in std_logic;
                        int_req : in interrupt_t;
+               -- instruction memory program port :D
+                       new_im_data_in : in std_logic;
+                       im_addr : in gp_register_t;
+                       im_data : in gp_register_t;
 
                --Data outputs
                        instruction : out instruction_word_t;