stack op

[calu.git] / cpu / src / decoder_b.vhd

diff --git a/cpu/src/decoder_b.vhd b/cpu/src/decoder_b.vhd
index 606c1952d6c7d75ddeb70e58a9e9d30b20f7c226..41d02938f0b0529569ab0d2dbd63deeea6256ba8 100644 (file)
--- a/cpu/src/decoder_b.vhd
+++ b/cpu/src/decoder_b.vhd
@@ -184,7 +184,7 @@ begin
 --             instr_s.sreg_update := instruction(0);
 --
 --=================================================================
-       if (instr_s.opcode = "01010" or instr_s.opcode = "01011") then
+       if (instr_s.opcode = "01010") then
 
 --     when "01010" =>         --shift
                instr_s.reg_dest_addr := instruction(22 downto 19);
@@ -244,6 +244,14 @@ begin
 
                        instr_s.op_detail(IMM_OPT) := '1';
                end if;
+               
+               if (instr_s.opcode = "10000") then
+                       instr_s.op_detail(HWORD_OPT) := '1';
+               end if;
+               
+               if (instr_s.opcode = "10010") then
+                       instr_s.op_detail(BYTE_OPT) := '1';
+               end if;
        end if;
 
 --     when "10000" =>         --ldh
@@ -284,8 +292,41 @@ begin
                if (instr_s.displacement(14) = '1') then
                        instr_s.displacement(31 downto 15) := (others => '1');
                end if;
+
+               if (instr_s.opcode = "10001") then
+                       instr_s.op_detail(HWORD_OPT) := '1';
+               end if;
+               
+               if (instr_s.opcode = "10011") then
+                       instr_s.op_detail(BYTE_OPT) := '1';
+               end if;
+
        end if;
 
+       -- ===============================================================
+       
+       if (instr_s.opcode = "01011") then      -- stack op
+               instr_s.reg_src1_addr := instruction(22 downto 19);
+               instr_s.reg_dest_addr := instruction(22 downto 19);
+               instr_s.op_group := STACK_OP;
+               instr_s.op_detail(NO_PSW_OPT) := '1';
+       
+               case instruction(18 downto 17) is
+                       when "00" => 
+                               instr_s.op_detail(PUSH_OPT) := '0';
+                       
+                       when "01" => null;
+                       
+                       when "10" => null;
+                       
+                       when "11" =>
+                               instr_s.op_detail(PUSH_OPT) := '1';
+                               
+                       when others => null;
+               end case;
+       
+       end if;
+       
 --     when "10001" =>         --sth
 --             instr_s.reg_src1_addr := instruction(22 downto 19);
 --             instr_s.reg_src2_addr := instruction(18 downto 15);