fib 1

[calu.git] / cpu / src / decode_stage_b.vhd

diff --git a/cpu/src/decode_stage_b.vhd b/cpu/src/decode_stage_b.vhd
index 60cc287c509d231900a6aaad0ccaa16a4e3f9d6a..9bd9d8139f8a12c86d6acf56477030170d2328b4 100644 (file)
--- a/cpu/src/decode_stage_b.vhd
+++ b/cpu/src/decode_stage_b.vhd
@@ -163,7 +163,7 @@ begin
        rtw_rec_nxt.reg1_addr <= instr_spl.reg_src1_addr;
        rtw_rec_nxt.reg2_addr <= instr_spl.reg_src2_addr;
 
-       if (instr_spl.op_detail(IMM_OPT) = '1') then
+       if (instr_spl.op_detail(IMM_OPT) = '1') then -- or instr_spl.op_group = LDST_OP
                rtw_rec_nxt.immediate <= instr_spl.immediate;
                rtw_rec_nxt.imm_set <= '1';
        end if;