--System inputs
clk : in std_logic;
reset : in std_logic;
+ s_reset : in std_logic;
--Data inputs
jump_result : in instruction_addr_t;
--Data outputs
-- reg1_rd_data : out gp_register_t;
-- reg2_rd_data : out gp_register_t;
- branch_prediction_res : out instruction_word_t;
+ branch_prediction_res : out instruction_addr_t;
branch_prediction_bit : out std_logic;
to_next_stage : out dec_op
RESET_VALUE : std_logic;
-- active logic value
LOGIC_ACT : std_logic;
- FPGATYPE : string
+ FPGATYPE : string;
+ CLK_BAUD : integer
);
port(
--System inputs