de1 toplevel entity and mem-address/regfile fix for add, and, ...

[calu.git] / cpu / src / alu_b.vhd

diff --git a/cpu/src/alu_b.vhd b/cpu/src/alu_b.vhd
index 5702377306821cf9ce00847ee070b965e5b248ae..c170ce6351bee19ccb8ed4b7e2b8a2c344188b6e 100755 (executable)
--- a/cpu/src/alu_b.vhd
+++ b/cpu/src/alu_b.vhd
@@ -122,14 +122,19 @@ begin
        case op_group is
        when ADDSUB_OP =>
                result_v := add_result;
+               addr(DATA_ADDR_WIDTH + 2) <= '0';
        when AND_OP =>
                result_v := and_result;
+               addr(DATA_ADDR_WIDTH + 2) <= '0';
        when OR_OP =>
                result_v := or_result;
+               addr(DATA_ADDR_WIDTH + 2) <= '0';
        when XOR_OP =>
                result_v := xor_result;
+               addr(DATA_ADDR_WIDTH + 2) <= '0';
        when SHIFT_OP =>
                result_v := shift_result;
+               addr(DATA_ADDR_WIDTH + 2) <= '0';
    when LDST_OP =>
                 res_prod := '0';
                 mem_op := '1';