ram: reducing instr- and dataram

[calu.git] / cpu / src / alu_b.vhd

diff --git a/cpu/src/alu_b.vhd b/cpu/src/alu_b.vhd
index c170ce6351bee19ccb8ed4b7e2b8a2c344188b6e..746fbc3489e85f38a74e287224d97e8e7f481b9d 100755 (executable)
--- a/cpu/src/alu_b.vhd
+++ b/cpu/src/alu_b.vhd
@@ -122,19 +122,19 @@ begin
        case op_group is
        when ADDSUB_OP =>
                result_v := add_result;
-               addr(DATA_ADDR_WIDTH + 2) <= '0';
+               addr(DATA_ADDR_WIDTH + 3) <= '0';
        when AND_OP =>
                result_v := and_result;
-               addr(DATA_ADDR_WIDTH + 2) <= '0';
+               addr(DATA_ADDR_WIDTH + 3) <= '0';
        when OR_OP =>
                result_v := or_result;
-               addr(DATA_ADDR_WIDTH + 2) <= '0';
+               addr(DATA_ADDR_WIDTH + 3) <= '0';
        when XOR_OP =>
                result_v := xor_result;
-               addr(DATA_ADDR_WIDTH + 2) <= '0';
+               addr(DATA_ADDR_WIDTH + 3) <= '0';
        when SHIFT_OP =>
                result_v := shift_result;
-               addr(DATA_ADDR_WIDTH + 2) <= '0';
+               addr(DATA_ADDR_WIDTH + 3) <= '0';
    when LDST_OP =>
                 res_prod := '0';
                 mem_op := '1';
@@ -155,7 +155,7 @@ begin
 
                         res_prod := '1';
                         mem_op := '0';
-                                                               addr(DATA_ADDR_WIDTH + 2) <= '0';
+                                                               addr(DATA_ADDR_WIDTH + 3) <= '0';
                 end if;
                 if op_detail(ST_OPT) = '1' then
                         mem_en := '1';
@@ -188,15 +188,15 @@ begin
                end if;
        when STACK_OP =>
                mem_op := '1';
-               pwr_en_v := '1';
+               pwr_en_v := op_detail(PWREN_OPT);
                if op_detail(PUSH_OPT) = '1' then
                        mem_en := '1';
                        pinc_v := '1';
                        res_prod := '0';
-                       addr <= pval_nxt;
+                       addr <= pval;
                        data <= left_operand;
                else
-                       addr <= std_logic_vector(unsigned(pval_nxt)-4);
+                       addr <= pval_nxt;
                end if;
                
        end case;