bootromfun: wir kriegen ein 'O' \o/ (wenn man ein 'H' aufn UART schreibt)

[calu.git] / cpu / sim / testcore1.do

diff --git a/cpu/sim/testcore1.do b/cpu/sim/testcore1.do
index d16e5c31b0f59604dbf15f662a0807a2f41e3de4..885a80f38a8ab1f38299e29f8cf5fc92824427fa 100644 (file)
--- a/cpu/sim/testcore1.do
+++ b/cpu/sim/testcore1.do
@@ -131,12 +131,13 @@ add wave  -group writebackstageregister -radix hexadecimal /pipeline_tb/writebac
 add wave  -group writebackstageregister -radix hexadecimal /pipeline_tb/writeback_st/reg_addr
 add wave  -group writebackstageregister -radix hexadecimal /pipeline_tb/writeback_st/regfile_val
 
-add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/im_addr
-add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/im_data
-add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/new_im_data_out
-add wave  -group test -radix hexadecimal /pipeline_tb/fetch_st/im_addr
-add wave  -group test -radix hexadecimal /pipeline_tb/fetch_st/im_data
-add wave  -group test -radix hexadecimal /pipeline_tb/fetch_st/new_im_data_in
+add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/reg_we
+add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/write_en
+add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/wb_reg.dmem_en
+add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/wb_reg.dmem_write_en
+add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/ext_anysel
+add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/alu_jmp
+add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/wb_reg.address
 
 
 run 5000 ns