bootromfun: wir kriegen ein 'O' \o/ (wenn man ein 'H' aufn UART schreibt)

[calu.git] / cpu / sim / testcore1.do

diff --git a/cpu/sim/testcore1.do b/cpu/sim/testcore1.do
index c9d6b2b90671cbf7db52c38303eaaa61e903195b..885a80f38a8ab1f38299e29f8cf5fc92824427fa 100644 (file)
--- a/cpu/sim/testcore1.do
+++ b/cpu/sim/testcore1.do
@@ -2,11 +2,14 @@ vlib work
 vmap work work
 
 vcom -work work ../src/mem_pkg.vhd
+vcom -work work ../src/rom.vhd
+vcom -work work ../src/rom_b.vhd
 vcom -work work ../src/r_w_ram.vhd
 vcom -work work ../src/r_w_ram_b.vhd
 vcom -work work ../src/r2_w_ram.vhd
 vcom -work work ../src/r2_w_ram_b.vhd
 vcom -work work ../src/common_pkg.vhd
+vcom -work work ../src/extension_pkg.vhd
 vcom -work work ../src/core_pkg.vhd
 vcom -work work ../src/decoder.vhd
 vcom -work work ../src/decoder_b.vhd
@@ -16,8 +19,7 @@ vcom -work work ../src/decode_stage.vhd
 vcom -work work ../src/decode_stage_b.vhd
 
 vcom -work work ../src/alu_pkg.vhd
-vcom -work work ../src/extension_pkg.vhd
-vcom -work work ../src/gpm_pkg.vhd
+
 
 vcom -work work ../src/exec_op.vhd
 vcom -work work ../src/exec_op/add_op_b.vhd
@@ -36,6 +38,23 @@ vcom -work work ../src/extension_pkg.vhd
 vcom -work work ../src/extension.vhd
 vcom -work work ../src/extension_b.vhd
 
+
+vcom -work work ../src/extension_imp_pkg.vhd
+vcom -work work ../src/extension_imp.vhd
+vcom -work work ../src/extension_imp_b.vhd
+
+vcom -work work ../src/extension_7seg_pkg.vhd
+vcom -work work ../src/extension_7seg.vhd
+vcom -work work ../src/extension_7seg_b.vhd
+
+vcom -work work ../src/extension_uart_pkg.vhd
+vcom -work work ../src/rs232_tx.vhd
+vcom -work work ../src/rs232_tx_arc.vhd
+vcom -work work ../src/rs232_rx.vhd
+vcom -work work ../src/rs232_rx_arc.vhd
+vcom -work work ../src/extension_uart.vhd
+vcom -work work ../src/extension_uart_b.vhd
+
 vcom -work work ../src/execute_stage.vhd
 vcom -work work ../src/execute_stage_b.vhd
 
@@ -55,6 +74,7 @@ add wave  -group fetchstage -radix hexadecimal /pipeline_tb/fetch_st/instr_r_add
 add wave  -group fetchstage -radix hexadecimal /pipeline_tb/fetch_st/instr_rd_data
 add wave  -group fetchstageregister -radix hexadecimal /pipeline_tb/fetch_st/instruction
 add wave  -group fetchstage -format logic /pipeline_tb/fetch_st/branch_prediction_bit
+add wave  -group fetchstage -format logic /pipeline_tb/fetch_st/rom_ram
 add wave  -group fetchstage -radix hexadecimal /pipeline_tb/fetch_st/prediction_result
 
 add wave  -group decodestage -radix hexadecimal /pipeline_tb/decode_st/instruction
@@ -98,7 +118,7 @@ add wave  -group execstage -radix hexadecimal /pipeline_tb/exec_st/alu_inst/righ
 add wave  -group execstage -radix hexadecimal /pipeline_tb/exec_st/reg_nxt
 
 
-add wave  -group execstageregister -radix hexadecimal /pipeline_tb/exec_st/gpm_inst/psw
+add wave  -group execstageregister -radix hexadecimal /pipeline_tb/exec_st/gpmp_inst/psw
 add wave  -group execstageregister -radix hexadecimal /pipeline_tb/exec_st/reg
 add wave  -group writebackstage -radix hexadecimal /pipeline_tb/writeback_st/result
 add wave  -group writebackstage -radix hexadecimal /pipeline_tb/writeback_st/result_addr
@@ -111,6 +131,13 @@ add wave  -group writebackstageregister -radix hexadecimal /pipeline_tb/writebac
 add wave  -group writebackstageregister -radix hexadecimal /pipeline_tb/writeback_st/reg_addr
 add wave  -group writebackstageregister -radix hexadecimal /pipeline_tb/writeback_st/regfile_val
 
+add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/reg_we
+add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/write_en
+add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/wb_reg.dmem_en
+add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/wb_reg.dmem_write_en
+add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/ext_anysel
+add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/alu_jmp
+add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/wb_reg.address
 
 
 run 5000 ns