fib 1

[calu.git] / cpu / sim / testcore.do

diff --git a/cpu/sim/testcore.do b/cpu/sim/testcore.do
index c77feb02ae23ce5ba6890fdcfc37aec093d2a390..321364ee213fdf6f071ff19530c573929369edc0 100644 (file)
--- a/cpu/sim/testcore.do
+++ b/cpu/sim/testcore.do
@@ -70,6 +70,7 @@ add wave  -radix hexadecimal /pipeline_tb/exec_st/gpmp_inst/psw
 
 add wave  -radix hexadecimal /pipeline_tb/addr_pin
 add wave  -radix hexadecimal /pipeline_tb/data_pin
+add wave  -radix hexadecimal /pipeline_tb/writeback_st/data_ram_read
 add wave  -radix hexadecimal /pipeline_tb/dmem_wr_en_pin
 
 run 5000 ns