pipeline erste version mit 31bit shifter (kostet 7MHz und viele LEs)

[calu.git] / cpu / create_project.tcl

diff --git a/cpu/create_project.tcl b/cpu/create_project.tcl
index 6419c5aaf07cb6e4dc181f757ff8fb42de4f9e00..0b13c22d8fcf19cf3a00c3f3942085be229ae6cf 100755 (executable)
--- a/cpu/create_project.tcl
+++ b/cpu/create_project.tcl
@@ -46,6 +46,32 @@ if {$make_assignments} {
        set_global_assignment -name VHDL_FILE ../src/decoder_b.vhd
        set_global_assignment -name VHDL_FILE ../src/decode_stage.vhd
        set_global_assignment -name VHDL_FILE ../src/decode_stage_b.vhd
+
+       set_global_assignment -name VHDL_FILE ../src/alu_pkg.vhd
+
+       set_global_assignment -name VHDL_FILE ../src/extension_pkg.vhd
+       set_global_assignment -name VHDL_FILE ../src/gpm_pkg.vhd
+
+       set_global_assignment -name VHDL_FILE ../src/exec_op.vhd
+       set_global_assignment -name VHDL_FILE ../src/exec_op/add_op_b.vhd
+       set_global_assignment -name VHDL_FILE ../src/exec_op/and_op_b.vhd
+       set_global_assignment -name VHDL_FILE ../src/exec_op/or_op_b.vhd
+       set_global_assignment -name VHDL_FILE ../src/exec_op/xor_op_b.vhd
+       set_global_assignment -name VHDL_FILE ../src/exec_op/shift_op_b.vhd
+
+       set_global_assignment -name VHDL_FILE ../src/alu.vhd
+       set_global_assignment -name VHDL_FILE ../src/alu_b.vhd
+
+       set_global_assignment -name VHDL_FILE ../src/gpm.vhd
+       set_global_assignment -name VHDL_FILE ../src/gpm_b.vhd
+
+       set_global_assignment -name VHDL_FILE ../src/execute_stage.vhd
+       set_global_assignment -name VHDL_FILE ../src/execute_stage_b.vhd
+
+
+       set_global_assignment -name VHDL_FILE ../src/writeback_stage.vhd
+       set_global_assignment -name VHDL_FILE ../src/writeback_stage_b.vhd
+
        
        set_location_assignment PIN_L1 -to sys_clk
        set_location_assignment PIN_R22 -to sys_res