copyleft: gplv3 added and set repo to public

[calu.git] / 3c_disasm / Iinstr.hpp

diff --git a/3c_disasm/Iinstr.hpp b/3c_disasm/Iinstr.hpp
index 416db47a869cb6041163165d5e96d968b6477e78..17f80b005647c90fbfad9fc6bc08c133e5af7903 100644 (file)
--- a/3c_disasm/Iinstr.hpp
+++ b/3c_disasm/Iinstr.hpp
@@ -1,3 +1,24 @@
+/*   `Deep Thought', a softcore CPU implemented on a FPGA
+
+    Copyright (C) 2010 Markus Hofstaetter <markus.manrow@gmx.at>
+    Copyright (C) 2010 Martin Perner <e0725782@student.tuwien.ac.at>
+    Copyright (C) 2010 Stefan Rebernig <stefan.rebernig@gmail.com>
+    Copyright (C) 2010 Manfred Schwarz <e0725898@student.tuwien.ac.at>
+    Copyright (C) 2010 Bernhard Urban <lewurm@gmail.com>
+
+    This program is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program.  If not, see <http://www.gnu.org/licenses/>. */
+
 #ifndef __IINSTR_I_
 #define __IINSTR_I_
 
@@ -10,6 +31,10 @@ class CCpu;
 
 #include "ccpu.hpp"
 
+class disasm;
+
+#include "disasm.h"
+
 
 /* concept from https://groups.google.com/group/comp.arch.embedded/msg/9d430b6d3da12c8f */
 #define to_HEX__(x) 0x##x##LU
@@ -47,17 +72,18 @@ enum CONDITIONS {
 
 class Iinstr {
        protected:
-               short opcode;
+               short opcode, clockcount;
                std::string name;
                short m_ra, m_rb, m_rd;
                bool m_c, m_d, m_hl, m_f, m_s;
-               int m_imm;
+               CDat m_imm;
                short m_cond;
                boost::dynamic_bitset<> argbits;
-               Iinstr() : opcode(0), name(""), m_ra(0), m_rb(0), m_rd(0), m_c(0), m_d(0), m_hl(0), m_f(0), m_s(0), m_imm(0), m_cond(ALWAYS), argbits(32) {}
+               CDat hexdump;
+               Iinstr() : opcode(0), clockcount(1), name(""), m_ra(0), m_rb(0), m_rd(0), m_c(0), m_d(0), m_hl(0), m_f(0), m_s(0), m_imm(0), m_cond(ALWAYS), argbits(32), hexdump(0) {}
 
-               int generate16ImmFill(const int value) const {
-                       int i = value;
+               CDat generate16ImmFill(const CDat value) const {
+                       CDat i = value;
                        if(m_hl == true && m_f == true) {
                                i <<= 16;
                                i |= 0x0000FFFF;
@@ -76,8 +102,8 @@ class Iinstr {
                        return i; 
                }
 
-               int generate16ImmSign(const int value) const {
-                       int i = value;
+               CDat generate16ImmSign(const CDat value) const {
+                       CDat i = value;
                        if(m_hl == true) {
                                i <<= 16;
                        }
@@ -88,8 +114,8 @@ class Iinstr {
                        return i; 
                }
 
-               int generate12ImmSign(const int value) const {
-                       int i = value;
+               CDat generate12ImmSign(const CDat value) const {
+                       CDat i = value;
                        if(m_s == true && (i & 0x0800) != 0) {
                                        i |= 0xFFFFF000;
                        }
@@ -97,8 +123,8 @@ class Iinstr {
                        return i; 
                }
 
-               int generate15ImmSign(const int value) const {
-                       int i = value;
+               CDat generate15ImmSign(const CDat value) const {
+                       CDat i = value;
                        if(m_s == true && (i & 0x4000) != 0) {
                                        i |= 0xFFFF8000;
                        }
@@ -114,24 +140,32 @@ class Iinstr {
                }
 
                static CCpu* m_cpu;
+               static disasm* m_disasm;
 
        public:
 
                static void setCPU(CCpu* cpu) { m_cpu = cpu; }
+               static void setDisasm(disasm* dasm) { m_disasm = dasm; }
 
                virtual ~Iinstr() {}
                virtual short getOpcode() { return this->opcode; }
                virtual std::string getName() { return this->name; }
-               virtual void loadBits(boost::dynamic_bitset<> bits) { argbits = bits; }
+               virtual void loadBits(boost::dynamic_bitset<> bits) { argbits = bits; this->constructHex(); }
                virtual void evalInstr() = 0;
                virtual void execInstr() = 0;
                virtual std::string toString() = 0;
                virtual Iinstr* getNew() = 0;
-                       
+
+               unsigned long toNum() { return this->hexdump; }
+
                short getCondition() {
                        return m_cond;
                }
 
+               short getClockCount() {
+                       return clockcount;
+               }
+
                void decodeCondition(short condition) {
                        if(condition >= 0 && condition <= 15) {
                                m_cond = condition;
@@ -143,6 +177,15 @@ class Iinstr {
 
        protected:
 
+               void constructHex()
+               {
+                       hexdump = this->m_cond;
+                       hexdump <<= 5;
+                       hexdump += this->opcode;
+                       hexdump <<= 23;
+                       hexdump += this->argbits.to_ulong();
+               }
+
                std::string getConditionFlag()
                {
                        stringstream cond;