+;* bootROM, a very small bootloader for $NAME
+;*
+;* protocol details:
+;* abbrv: H = Host, CPU = C
+;*
+;* value/cmd | direction | comment
+;* ------------------------------------------------------------
+;* 'H' | H -> C | enter bootROM ("HI")
+;* 'O' | C -> H | ack bootROM entry ("OH HAI")
+;*
+;* 'W'0xZZZZZZZZ0xYYYYYYYY| H -> C | write instr (0xYY...Y) to
+;* | address (0xZZ...Z)
+;* 'D' | C -> H | instr write done
+;*
+;* 'R'0xZZZZZZZZ | H -> C | read instr from address (0xZZ..Z)
+;* 'F'0xYYYYYYYY | C -> H | instr read done and return instr
+;*
+;* 'Q'0xZZZZZZZZ0xYYYYYYYY| H -> C | write data (0xYY...Y) to
+;* | address (0xZZ...Z)
+;* 'A' | C -> H | data write done
+;*
+;* 'T'0xZZZZZZZZ | H -> C | read data from address (0xZZ..Z)
+;* 'G'0xYYYYYYYY | C -> H | read done and return data
+;*
+;* 'J'0xZZZZZZZZ | H -> C | jump to address (0xZZ...Z)
+;*/
.data
.text
- .define UART_BASE, 0x1000
- .define UART_STATUS, UART_BASE+0x4
- .define UART_RECV, UART_BASE+0x8
- .define UART_TRANS, UART_BASE+0xC
- .define UART_BAUD, UART_BASE+0x10
-
- .define UART_TRANS_EMPTY, 0
- .define UART_RECV_NEW, 1
-
- .define TIMEOUT_START, 0x13371337
- .define DEFAULT_PROG_START, 0x200
- .define STACKSTART, 0x500 ; FIXME
-;-----
-main:
- ; setup stackframe
- ldil r15, STACKSTART@lo
- ldih r15, STACKSTART@hi
- movst r15
+ .define UART_BASE, 0x2000
+ .define UART_STATUS, 0x0
+ .define UART_RECV, 0xc
+ .define UART_TRANS, 0x8
+
+ .define UART_TRANS_EMPTY, 0x1
+ .define UART_RECV_NEW, 0x2
- ldil r3, TIMEOUT_START@lo
- ldih r3, TIMEOUT_START@hi
+ .define PBASE, 0x2030
+ .define PADDR, 0x4
+ .define PDATA, 0x8
-timeout_loop:
- ldil r3, UART_STATUS@lo
- ldih r3, UART_STATUS@hi
- ldw r3, 0(r3)
- andx r3, 1 << UART_RECV_NEW
- brzs+ next; branch if zero
+;-----
+start:
+ br+ main
+ br+ main
+ ret
+main:
+ ldi r10, UART_BASE@lo
+ ldih r10, UART_BASE@hi
+ ldi r11, PBASE@lo
+ ldih r11, PBASE@hi
+poll:
call recv_byte
; we received the enter bootrom sign
+ xor r1, r1, r1
cmpi r0, 0x48 ; 'H'
- breq- bt_H
-
-next:
- subi r3, r3, 1
- brnz+ timeout_loop
-
- ; call to default entry point
- ldil r0, DEFAULT_PROG_START@lo
- ldih r0, DEFAULT_PROG_START@hi
- brr r0
+ breq+ bt_H
+ br poll ; else
;-----
send_byte:
- ldil r3, UART_STATUS@lo
- ldih r3, UART_STATUS@hi
- ldw r3, 0(r3)
- andx r3, 1 << UART_TRANS_EMPTY
- brzs+ send_byte ; branch if zero
- ldil r3, UART_TRANS@lo
- ldih r3, UART_TRANS@hi
- stb r1, 0(r3)
+ ldw r3, UART_STATUS(r10)
+ andx r3, UART_TRANS_EMPTY
+ brnz+ send_byte ; branch if not zero
+ stw r1, UART_TRANS(r10)
ret
;-----
;-----
recv_byte:
- ldil r3, UART_STATUS@lo
- ldih r3, UART_STATUS@hi
- ldw r3, 0(r3)
- andx r3, 1 << UART_RECV_NEW
- brzs+ send_byte ; branch if zero
- ldil r3, UART_RECV@lo
- ldih r3, UART_RECV@hi
- ldb r0, 0(r3)
+ ldw r3, UART_STATUS(r10)
+ andx r3, UART_RECV_NEW
+ brzs+ recv_byte; branch if zero
+ xor r0, r0, r0
+ ldw r0, UART_RECV(r10)
ret
;-----
recv_word:
- ldisl r0, 0x0
+ xor r1, r1, r1
call recv_byte
- or r0, r0, r1
+ or r1, r0, r1
call recv_byte
lls r1, r1, 8
- or r0, r0, r1
+ or r1, r0, r1
call recv_byte
- lls r1, r1, 16
- or r0, r0, r1
+ lls r1, r1, 8
+ or r1, r0, r1
call recv_byte
- lls r1, r1, 24
+ lls r1, r1, 8
or r0, r0, r1
+ xor r1, r1, r1
ret
;-----
bootrom:
call recv_byte
+ xor r1, r1, r1
cmpi r0, 0x57 ; 'W'
breq- bt_W
- cmpi r0, 0x52 ; 'R'
- breq- bt_R
+ ;cmpi r0, 0x52 ; 'R'
+ ;breq- bt_R
cmpi r0, 0x51 ; 'Q'
breq- bt_Q
; FALL THROUGH ;)
bt_H:
- ldisl r1, 0x4f ; 'O'
+ ldi r1, 0x4f ; 'O'
call send_byte
br bootrom
bt_W:
+ ldi r1, 0x57 ; 'W'
+ call send_byte
call recv_word ; receive addr
- mov r6, r0
+ stw r0, PADDR(r11)
call recv_word ; receive instr
- stx r0, 0(r6)
- ldisl r1, 0x44 ; 'D'
+ stw r0, PDATA(r11)
+ ldi r1, 0x44 ; 'D'
call send_byte
br bootrom
-bt_R:
- call recv_word ; receive addr
- mov r2, r0
- ldisl r1, 0x46 ; 'F'
- call send_byte
- ldx r1, 0(r2)
- call send_word
- br bootrom
+;bt_R: ;lesen von IRAM wird nicht unterstuetzt
+ ;call recv_word ; receive addr
+ ;mov r2, r0
+ ;ldi r1, 0x46 ; 'F'
+ ;call send_byte
+ ;ldx r1, 0(r2)
+ ;call send_word
+ ;br bootrom
bt_Q:
+ ldi r1, 0x51 ; 'Q'
+ call send_byte
call recv_word ; receive addr
- mov r6, r0
+ addi r6, r0, 0
call recv_word ; receive data
stw r0, 0(r6)
- ldisl r1, 0x41 ; 'A'
+ ldi r1, 0x41 ; 'A'
call send_byte
br bootrom
bt_T:
call recv_word ; receive addr
mov r2, r0
- ldisl r1, 0x47 ; 'G'
+ ldi r1, 0x47 ; 'G'
call send_byte
ldw r1, 0(r2)
call send_word
br bootrom
bt_J:
- call recv_word
- brr r0
-
-; 102 instr. please update after modification
+tehend:
+ xor r1, r1, r1
+ ldi r1, 0x41 ; 'A'
+ call send_byte
+ xor r1, r1, r1
+ ldi r1, 0x42 ; 'B'
+ call send_byte
+ xor r1, r1, r1
+ ldi r1, 0x43 ; 'C'
+ call send_byte
projects / calu.git / blobdiff