SHELL := bash

VHDL_DIR := ../cpu/src
PROJ_VHDL = \
	core_top_s3e.vhd \
	alu_b.vhd \
	alu_pkg.vhd \
	alu.vhd \
	common_pkg.vhd \
	core_pkg.vhd \
	decoder_b.vhd \
	decoder.vhd \
	decode_stage_b.vhd \
	decode_stage.vhd \
	exec_op/add_op_b.vhd \
	exec_op/and_op_b.vhd \
	exec_op/or_op_b.vhd \
	exec_op/shift_op_b.vhd \
	exec_op/xor_op_b.vhd \
	exec_op.vhd \
	execute_stage_b.vhd \
	execute_stage.vhd \
	extension_b.vhd \
	extension_interrupt_b.vhd \
	extension_interrupt.vhd \
	extension_timer_b.vhd \
	extension_timer_pkg.vhd \
	extension_timer.vhd \
	extension_pkg.vhd \
	extension_uart_b.vhd \
	extension_uart_pkg.vhd \
	extension_uart.vhd \
	extension_7seg_b.vhd \
	extension_7seg_pkg.vhd \
	extension_7seg.vhd \
	extension_imp_b.vhd \
	extension_imp_pkg.vhd \
	extension_imp.vhd \
	extension.vhd \
	fetch_stage_b.vhd \
	fetch_stage.vhd \
	mem_pkg.vhd \
	r2_w_ram_b.vhd \
	r2_w_ram.vhd \
	rom_b.vhd \
	rom.vhd \
	rs232_rx_arc.vhd \
	rs232_rx.vhd \
	rs232_tx_arc.vhd \
	rs232_tx.vhd \
	ram_xilinx.vhd \
	ram_xilinx_b.vhd \
	r_w_ram_b.vhd \
	r_w_ram.vhd \
	rw_r_ram_b.vhd \
	rw_r_ram.vhd \
	writeback_stage_b.vhd \
	writeback_stage.vhd

PROJ_VHDL := $(foreach n,$(PROJ_VHDL),$(VHDL_DIR)/$(n))

NAME := core_top


all: generated/$(NAME).mcs

generated: 
	rm -rf generated
	mkdir generated

clean:
	rm -rf *.o *.cf tb *.vcd $(NAME) $(SIM_TOP) *.ghw
	rm -f *.bit *.bgn *_pad.txt *_pad.csv *.xpi *.srp *.ngc *.par
	rm -f *.lst *.ngd *.ngm *.pcf *.mrp *.unroutes *.pad
	rm -f *.bld *.ncd *.twr *.drc
	rm -f *.map *.xrpt *.log *.twx *.xml *.ptwx
	rm -rf xst $(NAME).prj
	rm -rf generated/
	rm -rf xlnx_auto_0_xdb _xmsgs

#Xilinx ISE actions. Uses a wrapper script named "xilinx" to run the ISE batch commands

# create an ISE project file from the list of VHDL files
$(NAME).prj: $(PROJ_VHDL)
	echo $(PROJ_VHDL) |tr " " "\n">$(NAME).prj

bitfile: generated step0 step1 step2 step3 step4 step5

step0: $(NAME).prj 
	xst -ifn ISE_scripts/$(NAME).scrs -ofn $(NAME).srp
step1:
	ngdbuild -nt on -uc spartan3e.ucf $(NAME).ngc $(NAME).ngd
step2:
	map -pr b $(NAME).ngd -o $(NAME).ncd $(NAME).pcf
step3:
	par -w -ol high $(NAME).ncd $(NAME).ncd $(NAME).pcf
step4:
	trce -v 10 -o $(NAME).twr $(NAME).ncd $(NAME).pcf
step5:
	bitgen $(NAME).ncd generated/$(NAME).bit -w #-f $(NAME).ut

generated/$(NAME).bit: bitfile

jtag: generated/$(NAME).bit
	impact -batch ISE_scripts/loadjtag.cmds

jtag_brv1: s3e_bootrom_v1.bit
	impact -batch ISE_scripts/loadjtag_brv1.cmds

mcs: generated/$(NAME).bit
	impact -batch ISE_scripts/makeprom.cmds

generated/$(NAME).mcs: mcs

load: generated/$(NAME).mcs
	impact -batch ISE_scripts/loadprom.cmds

impact:
	impact

ise: $(NAME).prj
	ise