# Copyright (C) 1991-2010 Altera Corporation # Your use of Altera Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any output files from any of the foregoing # (including device programming or simulation files), and any # associated documentation or information are expressly subject # to the terms and conditions of the Altera Program License # Subscription Agreement, Altera MegaCore Function License # Agreement, or other applicable license agreement, including, # without limitation, that your use is for the sole purpose of # programming logic devices manufactured by Altera and sold by # Altera or its authorized distributors. Please refer to the # applicable agreement for further details. # Quartus II: Generate Tcl File for Project # File: dt.tcl # Generated on: Mon Dec 20 12:10:32 2010 # Load Quartus II Tcl Project package package require ::quartus::project set need_to_close_project 0 set make_assignments 1 # Check that the right project is open if {[is_project_open]} { if {[string compare $quartus(project) "dt"]} { puts "Project dt is not open" set make_assignments 0 } } else { # Only open if not already open if {[project_exists dt]} { project_open -revision dt dt } else { project_new -revision dt dt } set need_to_close_project 1 } # Make assignments if {$make_assignments} { set_global_assignment -name FAMILY Cyclone set_global_assignment -name DEVICE EP1C12Q240C8 set_global_assignment -name ORIGINAL_QUARTUS_VERSION "10.0 SP1" set_global_assignment -name PROJECT_CREATION_TIME_DATE "15:08:54 DECEMBER 16, 2010" set_global_assignment -name LAST_QUARTUS_VERSION "10.0 SP1" set_global_assignment -name DEVICE_FILTER_PIN_COUNT 240 set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8 set_global_assignment -name GENERATE_RBF_FILE ON set_global_assignment -name ON_CHIP_BITSTREAM_DECOMPRESSION OFF set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED" set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVCMOS" set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS INPUT TRI-STATED" set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region" set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region" set_global_assignment -name MISC_FILE /homes/burban/dt/dt.dpf set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED" set_global_assignment -name MISC_FILE /homes/c0726283/calu/dt/dt.dpf set_global_assignment -name VHDL_FILE ../cpu/src/rom.vhd set_global_assignment -name VHDL_FILE ../cpu/src/rom_b.vhd set_global_assignment -name VHDL_FILE ../cpu/src/extension_7seg_pkg.vhd set_global_assignment -name VHDL_FILE ../cpu/src/extension_7seg_b.vhd set_global_assignment -name VHDL_FILE ../cpu/src/extension_7seg.vhd set_global_assignment -name VHDL_FILE ../cpu/src/rs232_rx_arc.vhd set_global_assignment -name VHDL_FILE ../cpu/src/rs232_rx.vhd set_global_assignment -name VHDL_FILE ../cpu/src/writeback_stage_b.vhd set_global_assignment -name VHDL_FILE ../cpu/src/writeback_stage.vhd set_global_assignment -name VHDL_FILE ../cpu/src/rw_r_ram_b.vhd set_global_assignment -name VHDL_FILE ../cpu/src/rw_r_ram.vhd set_global_assignment -name VHDL_FILE ../cpu/src/rs232_tx_arc.vhd set_global_assignment -name VHDL_FILE ../cpu/src/rs232_tx.vhd set_global_assignment -name VHDL_FILE ../cpu/src/r_w_ram_b.vhd set_global_assignment -name VHDL_FILE ../cpu/src/r_w_ram.vhd set_global_assignment -name VHDL_FILE ../cpu/src/r2_w_ram_b.vhd set_global_assignment -name VHDL_FILE ../cpu/src/r2_w_ram.vhd set_global_assignment -name VHDL_FILE ../cpu/src/pipeline_tb.vhd set_global_assignment -name VHDL_FILE ../cpu/src/mem_pkg.vhd set_global_assignment -name VHDL_FILE ../cpu/src/fetch_stage_b.vhd set_global_assignment -name VHDL_FILE ../cpu/src/fetch_stage.vhd set_global_assignment -name VHDL_FILE ../cpu/src/extension_uart_pkg.vhd set_global_assignment -name VHDL_FILE ../cpu/src/extension_uart_b.vhd set_global_assignment -name VHDL_FILE ../cpu/src/extension_uart.vhd set_global_assignment -name VHDL_FILE ../cpu/src/extension_pkg.vhd set_global_assignment -name VHDL_FILE ../cpu/src/extension_b.vhd set_global_assignment -name VHDL_FILE ../cpu/src/extension.vhd set_global_assignment -name VHDL_FILE ../cpu/src/execute_stage_b.vhd set_global_assignment -name VHDL_FILE ../cpu/src/execute_stage.vhd set_global_assignment -name VHDL_FILE ../cpu/src/exec_op.vhd set_global_assignment -name VHDL_FILE ../cpu/src/decoder_b.vhd set_global_assignment -name VHDL_FILE ../cpu/src/decoder.vhd set_global_assignment -name VHDL_FILE ../cpu/src/decode_stage_b.vhd set_global_assignment -name VHDL_FILE ../cpu/src/decode_stage.vhd set_global_assignment -name VHDL_FILE ../cpu/src/core_top.vhd set_global_assignment -name VHDL_FILE ../cpu/src/core_pkg.vhd set_global_assignment -name VHDL_FILE ../cpu/src/common_pkg.vhd set_global_assignment -name VHDL_FILE ../cpu/src/alu_pkg.vhd set_global_assignment -name VHDL_FILE ../cpu/src/alu_b.vhd set_global_assignment -name VHDL_FILE ../cpu/src/alu.vhd set_global_assignment -name VHDL_FILE ../cpu/src/exec_op/xor_op_b.vhd set_global_assignment -name VHDL_FILE ../cpu/src/exec_op/shift_op_b.vhd set_global_assignment -name VHDL_FILE ../cpu/src/exec_op/or_op_b.vhd set_global_assignment -name VHDL_FILE ../cpu/src/exec_op/and_op_b.vhd set_global_assignment -name VHDL_FILE ../cpu/src/exec_op/add_op_b.vhd set_global_assignment -name FITTER_EFFORT "STANDARD FIT" set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL MAXIMUM set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 4.0 set_global_assignment -name ROUTER_EFFORT_MULTIPLIER 4.0 set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT EXTRA set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS OFF set_global_assignment -name OPTIMIZE_HOLD_TIMING "ALL PATHS" set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING ON set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER OFF set_global_assignment -name FITTER_EARLY_TIMING_ESTIMATE_MODE OPTIMISTIC set_location_assignment PIN_152 -to sys_clk set_location_assignment PIN_42 -to sys_res set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top # Commit assignments export_assignments # Close project if {$need_to_close_project} { project_close } }