library ieee; use IEEE.std_logic_1164.all; use IEEE.numeric_std.all; use work.mem_pkg.all; architecture behaviour of rom is subtype RAM_ENTRY_TYPE is std_logic_vector(DATA_WIDTH -1 downto 0); type RAM_TYPE is array (0 to (2**ADDR_WIDTH)-1) of RAM_ENTRY_TYPE; -- r0 = 0, r1 = 1, r2 = 3, r3 = A signal rrrr_addr : std_logic_vector(31 downto 0); signal ram : RAM_TYPE := ( others => x"F0000000"); begin process(clk) begin if rising_edge(clk) then -- data_out <= ram(to_integer(UNSIGNED(rd_addr))); case rrrr_addr(10 downto 0) is when "00000000000" => data_out <= "11101101000000000000000000000000"; -- when "00000000001" => data_out <= "11101101001000000000000000000000"; -- when "00000000010" => data_out <= "11100111101000000000000000000000"; -- when "00000000011" => data_out <= "11100001000000000000000000100001"; -- when "00000000100" => data_out <= "11101100100000000000001100000000"; -- when "00000000101" => data_out <= "00001011011111111111111010000011"; -- when "00000000110" => data_out <= "11101101000000000000000000001000"; -- when "00000000111" => data_out <= "11100111100000000000000000001111"; -- when "00000001000" => data_out <= "11100111100000000000000000010011"; -- -- when "00000001001" => data_out <= x"ed080080"; --x"ed080048"; -- when "00000001010" => data_out <= x"ed500080"; -- when "00000001011" => data_out <= x"fd500002"; -- when "00000001100" => data_out <= x"eb000107"; when "00000001101" => data_out <= "11101011000000000000011010000010"; --"11101011000000000000000000000010"; when "00000001110" => data_out <= x"e5088800"; when "00000001111" => data_out <= x"e0150800"; when "00000010000" => data_out <= x"e7010000"; when "00000010001" => data_out <= x"ec800000"; when "00000010010" => data_out <= x"0b000008"; when "00000010011" => data_out <= x"e1910020"; when "00000010100" => data_out <= x"eb7ffe07"; when "00000010101" => data_out <= x"e7197ffc"; when "00000010110" => data_out <= x"e0018000"; when "00000010111" => data_out <= x"e1110020"; when "00000011000" => data_out <= x"e7810000"; when "00000011001" => data_out <= x"eb00000a"; when "00000011010" => data_out <= x"ed290080"; when "00000011011" => data_out <= x"e1080000"; when "00000011100" => data_out <= x"e78a8000"; when others => data_out <= "11101011000000000000000000000010"; end case; if wr_en = '1' then ram(to_integer(UNSIGNED(wr_addr))) <= data_in; end if; end if; end process; rrrr_addr(10 downto 0) <= rd_addr; rrrr_addr(31 downto 11) <= (others => '0'); end architecture behaviour;