library ieee;

use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;

use work.mem_pkg.all;

architecture behaviour of rom is

	signal vsim_bug : std_logic_vector(31 downto 0);
	
begin
	process(clk)
	begin
		if rising_edge(clk) then
--		 data_out <= ram(to_integer(UNSIGNED(rd_addr)));


	--case rrrr_addr(10 downto 0) is
			case vsim_bug(6 downto 0) is
	-- fibonacci
--				when "00000000000" => data_out <= "11101101000000000000000000000000"; -- 
--				when "00000000001" => data_out <= "11101101001000000000000000000000"; -- 
--				when "00000000010" => data_out <= "11100111101000000000000000000000"; -- 
--				
--				when "00000000011" => data_out <= "11100001000000000000000000100001"; -- 
--				when "00000000100" => data_out <= "11101100100000000000001100000000"; -- 
--				when "00000000101" => data_out <= "00001011011111111111111010000011"; -- 
--				
--				when "00000000110" => data_out <= "11101101000000000000000000001000"; -- 
--				when "00000000111" => data_out <= "11100111100000000000000000001111"; -- 
--				when "00000001000" => data_out <= "11100111100000000000000000010011"; -- --
--
--				
--				when "00000001001" => data_out <= x"ed080048"; --x"ed080048"; -- 
--				when "00000001010" => data_out <= x"ed500080"; -- 
--				when "00000001011" => data_out <= x"fd500002"; -- 
--				when "00000001100" => data_out <= x"eb000107";
--				when "00000001101" => data_out <= "11101011000000000000011010000010"; --"11101011000000000000000000000010";
--				
--				when "00000001110" => data_out <= x"e5088800";
--				when "00000001111" => data_out <= x"e0150800";
--				when "00000010000" => data_out <= x"e7010000";
--				when "00000010001" => data_out <= x"ec800000";
--				when "00000010010" => data_out <= x"0b000008";
--				when "00000010011" => data_out <= x"e1910020";
--				when "00000010100" => data_out <= x"eb7ffe07";
--				when "00000010101" => data_out <= x"e7197ffc";
--				when "00000010110" => data_out <= x"e0018000";
--
--				when "00000010111" => data_out <= x"e1110020";
--				when "00000011000" => data_out <= x"e7810000";
--				when "00000011001" => data_out <= x"eb00000a";
--				
--				
--				when "00000011010" => data_out <= x"ed290080";
--				when "00000011011" => data_out <= x"e1080000";
--
--				when "00000011100" => data_out <= x"e78a8000";
--				
--				when "00000011101" => data_out <= x"ed510058";
--				when "00000011110" => data_out <= x"e7850000";

			-- uart echo

--1;00000000;ed010058;ldi r0, 0x200B;;
--1;00000004;ed090060;ldi r1, 0x200C;;
--1;00000008;ed110080;ldi r2, 0x2010;;
--1;0000000c;e7188000;ldw r3, 0(r1);;
--1;00000010;ec1a0000;cmp r3, r4;;
--1;00000014;1b7ffd81;breq 0;;
--1;00000018;e7980000;stw r3, 0(r0);;
--1;0000001c;e7990000;stw r3, 0(r2);;
--1;00000020;e1218000;addi r4, r3, 0;;
--1;00000024;eb7ffb81;br 0;;
			
--				when "0000000" => data_out <= x"ed010058";
--				when "0000001" => data_out <= x"ed090060";
--				when "0000010" => data_out <= x"ed110080"; --x"e7188000";  f
--				when "0000011" => data_out <= x"e7188000"; --x"ec1a0000";
--				when "0000100" => data_out <= x"ec1a0000";
--				when "0000101" => data_out <= x"1b7ffe01";
--				when "0000110" => data_out <= x"e7990000"; -- f
--				when "0000111" => data_out <= x"e7980000";
--				when "0001000" => data_out <= x"e1218000";
--				when "0001001" => data_out <= x"eb7ffb81";

--1;00000000;ed010058;ldi r0, 0x200B;;;
--1;00000004;ed090060;ldi r1, 0x200C;;;
--1;00000008;ed110080;ldi r2, 0x2010;;;
--1;0000000c;ed390078;ldi r7, 0x200F;;;
--1;00000010;ed480012;ldih r9, 0x0002;;;
--1;00000014;e7438000;ldw r8, 0(r7);;;
--1;00000018;e254c000;and r10, r9, r8;;;
--1;0000001c;07188000;ldwnz r3, 0(r1);;;
--1;00000020;07980000;stwnz r3, 0(r0);;;
--1;00000024;07990000;stwnz r3, 0(r2);;;
--1;00000028;eb7ffb01;br 0;;;

--uart test:

				when "0000000" => data_out <= x"ed010058";
				when "0000001" => data_out <= x"ed090060";
				when "0000010" => data_out <= x"ed110080"; --x"e7188000";  f
				when "0000011" => data_out <= x"ed390000"; --x"ec1a0000";
				when "0000100" => data_out <= x"ed480012";
				when "0000101" => data_out <= x"e7438000";
				when "0000110" => data_out <= x"e254c000"; -- f
				when "0000111" => data_out <= x"07188000";
				when "0001000" => data_out <= x"07980000";
				when "0001001" => data_out <= x"07990000";
				when "0001010" => data_out <= x"eb7ffb81";

-------------------------------------------				
							
--				when "00000000000" => data_out <= x"ed000000";
--				when "00000000001" => data_out <= x"ed080008";
--				when "00000000010" => data_out <= x"e9880000"; --x"e7188000";  f
--				when "00000000011" => data_out <= x"e5088400"; --x"ec1a0000";
--				when "00000000100" => data_out <= x"e9880001";
--				when "00000000101" => data_out <= x"e7180000";
--				when "00000000110" => data_out <= x"e9200001"; -- f
--				when "00000000111" => data_out <= x"e7a00004";
--				when "00000001000" => data_out <= x"e7280004";
--			--	when "00000001001" => data_out <= x"eb7ffb81";

--				when "0000000" => data_out <= x"eb000181";
--				when "0000001" => data_out <= x"F0000000";
--				when "0000010" => data_out <= x"eb000008";
--				when others => data_out <= "11101011000000000000000000000010";

			end case;
		end if;
	end process;
	
	vsim_bug(6 downto 0) <= rd_addr;
	vsim_bug(31 downto 7) <= (others => '0');
end architecture behaviour;