--   `Deep Thought', a softcore CPU implemented on a FPGA
--
--  Copyright (C) 2010 Markus Hofstaetter <markus.manrow@gmx.at>
--  Copyright (C) 2010 Martin Perner <e0725782@student.tuwien.ac.at>
--  Copyright (C) 2010 Stefan Rebernig <stefan.rebernig@gmail.com>
--  Copyright (C) 2010 Manfred Schwarz <e0725898@student.tuwien.ac.at>
--  Copyright (C) 2010 Bernhard Urban <lewurm@gmail.com>
--
--  This program is free software: you can redistribute it and/or modify
--  it under the terms of the GNU General Public License as published by
--  the Free Software Foundation, either version 3 of the License, or
--  (at your option) any later version.
--
--  This program is distributed in the hope that it will be useful,
--  but WITHOUT ANY WARRANTY; without even the implied warranty of
--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
--  GNU General Public License for more details.
--
--  You should have received a copy of the GNU General Public License
--  along with this program.  If not, see <http://www.gnu.org/licenses/>.

library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;

use work.common_pkg.all;
use work.alu_pkg.all;

architecture behaviour of gpm is
type gpm_internal is record
        status : status_rec;
end record gpm_internal;

signal reg, reg_nxt : gpm_internal;

begin
syn : process (clk, reset)
begin
        if (reset = RESET_VALUE) then
                reg.status <= ('0','0','0','0');
        elsif rising_edge(clk) then
                reg <= reg_nxt;
        end if;
end process syn;

asyn : process (clk, reset, alu_nxt)
begin
        reg_nxt.status <= alu_nxt.status;
end process asyn;

psw <= reg.status;
        
end architecture behaviour;