library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;

use work.common_pkg.all;
use work.alu_pkg.all;
use work.gpm_pkg.all;

architecture behav of execute_stage is

signal condition : condition_t;
signal op_group : op_info_t;
signal op_detail : op_opt_t;
signal left_operand, right_operand : gp_register_t;
signal alu_state, alu_nxt : alu_result_rec;
signal psw : status_rec;

type exec_internal is record
        result : gp_register_t;
        res_addr : gp_addr_t;
        alu_jump : std_logic;
        brpr    : std_logic;
        wr_en   : std_logic;
end record;

signal reg, reg_nxt : exec_internal;

begin

alu_inst : alu
port map(clk, reset, condition, op_group, 
         left_operand, right_operand, op_detail, alu_state, alu_nxt,addr,data);

gpm_inst : gpm
        generic map(RESET_VALUE)
        port map(clk,reset,alu_nxt,psw);

syn: process(clk, reset)

begin

	if reset = RESET_VALUE then
	        reg.alu_jump <= '0';
                reg.brpr <= '0';
                reg.wr_en <= '0';
                reg.result <= (others =>'0');
                reg.res_addr <= (others => '0');			
	elsif rising_edge(clk) then
		reg <= reg_nxt;
	end if;
	
end process;

asyn: process(reset,dec_instr, alu_nxt, psw)
begin

        condition <= dec_instr.condition;
        op_group <= dec_instr.op_group;
        op_detail <= dec_instr.op_detail;
        left_operand <= dec_instr.src1;
        right_operand <= dec_instr.src2;


        alu_state <= (reg.result,dec_instr.daddr,psw,'0',dec_instr.brpr,'0','0','0','0','0','0'); 
        

        if reset = RESET_VALUE then
                condition <= COND_NEVER;
        else
                
        end if;
        
        reg_nxt.brpr <= alu_nxt.brpr;
        reg_nxt.alu_jump <= alu_nxt.alu_jump;
        reg_nxt.wr_en <= alu_nxt.reg_op;
        reg_nxt.result <= alu_nxt.result;
        reg_nxt.res_addr <= alu_nxt.result_addr;

end process asyn;

result <= reg.result;
result_addr <= reg.res_addr;
alu_jump <= reg.alu_jump;
brpr <= reg.brpr;
wr_en <= reg.wr_en;
dmem <= alu_nxt.mem_op;
dmem_write_en <= alu_nxt.mem_en;
hword <= alu_nxt.hw_op;
byte_s <= alu_nxt.byte_op;

end behav;