.data
.org 0x10
list:
	.fill 0x1 ;1. element = 1 ;0x10
	.fill 0x1 ;2. element = 1 ;0x14
	.fill 0x10, 0x0 ;nullen..
int2hex:
	;3210
	.fill 0x33323130 
	;7654
	.fill 0x37363534
	;ba98
	.fill 0x62613938
	;fedc
	.fill 0x66656463
.text
	.define UART_BASE, 0x2000
	.define UART_STATUS, 0x0
	.define UART_RECV, 0xc
	.define UART_TRANS, 0x8

	.define UART_TRANS_EMPTY, 0x1
	.define UART_RECV_NEW, 0x2
start:
	br+ main
	br+ main
	ret
main:
	call+ uart_init
	call+ recv_byte

	ldi r1, 9;
	ldi r10, list@lo ; global pointer
	ldih r10, list@hi
	call+ fibcall;

	push r0
	addi r12, r0, 0
	call+ uart_init
	addi r1, r12, 0
	call debug_uint

	; stack tests:
	; newline
	xor r1, r1, r1
	ldi r1, 0x0a
	call send_byte
	ldi r1, 0x0d
	call send_byte

	; wert vom stack zurueckgeben
	xor r1, r1, r1
	pop r1
	call debug_uint

	; newline
	xor r1, r1, r1
	ldi r1, 0x0a
	call send_byte
	ldi r1, 0x0d
	call send_byte

	xor r1, r1, r1
	ldi r1, 0x41
	push r1
	ldi r1, 0x42
	push r1
	ldi r1, 0x43
	push r1
	ldi r1, 0x44
	push r1
	ldi r1, 0x45
	push r1

	pop r1
	call send_byte
	pop r1
	call send_byte
	pop r1
	call send_byte
	pop r1
	call send_byte
	pop r1
	call send_byte

hang:
	br hang

	; fib(n) {
	;   if (list[n] > 0) {
	;   	return list[n]
	;   }
	;   a = fib(n-1)
	;   list[n] = a + list[n-2]
	;   return list[n]
	; }
fibcall:
	;update counter for aligned access
	lls r1, r1, 2 ; *4
	;calculate adress of top element
	add r2, r10, r1
fibmem:
	;load top element
	ldw r0, 0(r2)
	;compare if set
	cmpi r0, 0
	;return if set
	retnz-
	;decrement adress for next lopp
	subi r2, r2, 4
	;iterative call for n-1 element
	call+ fibmem
	;load n-2 element
	ldw r3, 0-4(r2)
	;add n-1 and n-2 element
	add r0, r3, r0
	;increment address for n element
	;is needed because after return
	;we need r2 to be set to the address
	;of element n
	addi r2, r2, 4
	;store fib n
	stw r0, 0(r2)
	ret+

recv_byte:
	ldw r3, UART_STATUS(r10)
	andx r3, UART_RECV_NEW
	brzs+ recv_byte; branch if zero
	xor r0, r0, r0
	ldw r0, UART_RECV(r10)
	ret

send_byte:
	ldw r9, UART_STATUS(r10)
	andx r9, UART_TRANS_EMPTY
	brnz+ send_byte ; branch if not zero
	stb r1, UART_TRANS(r10)
	ret

debug_uint:
	addi r8, r1, 0
	;usb_sendbuffersafe ("0x", 2);
	xor r1, r1, r1
	ldi r1, 0x30
	call send_byte
	xor r1, r1, r1
	ldi r1, 0x78
	call send_byte
	;j = 0
	xor r7, r7, r7
	xor r6, r6, r6
	ldi r6, int2hex@lo
	ldih r6, int2hex@hi
debug_unit_loop:
	;for (j = 0; j < 8; ++j) {
	cmpi r7, 8
	reteq
	;usb_sendbuffersafe (&int2hex[(i >> 28) & 0xf], 1);
	lrs r1, r8, 28
	andx r1, 0xf
	add r9, r6, r1
	ldb r1, 0(r9)
	call send_byte
	;i <<= 4;
	lls r8, r8, 4
	addi r7, r7, 1
	br debug_unit_loop

uart_init:
	xor r10, r10, r10
	ldi r10, UART_BASE@lo
	ldih r10, UART_BASE@hi
	ret