* src/vm/jit/s390/md-atomic.hpp: Repaired.

[cacao.git] / src / vm / jit / s390 / md-atomic.hpp

diff --git a/src/vm/jit/s390/md-atomic.hpp b/src/vm/jit/s390/md-atomic.hpp
index 664e16c6d5a3df5dee00c5c1ca3f38acfa07cde8..8d5ae29fd4a07be7c598be8b449739c96d5a5d70 100644 (file)
--- a/src/vm/jit/s390/md-atomic.hpp
+++ b/src/vm/jit/s390/md-atomic.hpp
@@ -1,6 +1,6 @@
 /* src/vm/jit/s390/md-atomic.hpp - s390 atomic instructions
 
-   Copyright (C) 2008
+   Copyright (C) 2008, 2010
    CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
 
    This file is part of CACAO.
@@ -32,6 +32,7 @@
 
 #include "threads/atomic.hpp"
 
+namespace Atomic_md {
 
 /**
  * An atomic compare and swap for 32-bit integer values.
@@ -42,7 +43,7 @@
  *
  * @return value of the memory location before the store
  */
-inline static uint32_t Atomic_compare_and_swap_32(volatile uint32_t *p, uint32_t oldval, uint32_t newval)
+inline uint32_t compare_and_swap(volatile uint32_t *p, uint32_t oldval, uint32_t newval)
 {
        __asm__ __volatile__ (
                "cs %0,%3,0(%2)\n"
@@ -63,38 +64,38 @@ inline static uint32_t Atomic_compare_and_swap_32(volatile uint32_t *p, uint32_t
  *
  * @return value of the memory location before the store
  */
-inline static uint64_t Atomic_compare_and_swap_64(volatile uint64_t *p, uint64_t oldval, uint64_t newval)
+inline uint64_t compare_and_swap(volatile uint64_t *p, uint64_t oldval, uint64_t newval)
 {
-       return Atomic_generic_compare_and_swap_64(p, oldval, newval);
+       return Atomic::generic_compare_and_swap(p, oldval, newval);
 }
 
 
 /**
- * An atomic compare and swap for pointer values.
- *
- * @param p      Pointer to memory address.
- * @param oldval Old value to be expected.
- * @param newval New value to be stored.
- *
- * @return value of the memory location before the store
+ * A memory barrier.
  */
-inline static void* Atomic_compare_and_swap_ptr(volatile void** p, void* oldval, void* newval)
+inline void memory_barrier(void)
 {
-       return (void*) Atomic_compare_and_swap_32((volatile uint32_t*) p, (uint32_t) oldval, (uint32_t) newval);
+       __asm__ __volatile__ ("bcr 15,0" : : : "memory" );
 }
 
 
 /**
- * A memory barrier.
+ * A write memory barrier.
  */
-inline static void Atomic_memory_barrier(void)
+inline void write_memory_barrier(void)
 {
-       __asm__ __volatile__ ("bcr 15,0" : : : "memory" ) 
+       memory_barrier();
 }
 
+/**
+ * An instruction barrier.
+ */
+inline void instruction_barrier(void)
+{
+       __asm__ __volatile__ ("" : : : "memory" );
+}
 
-#define STORE_ORDER_BARRIER() Atomic_memory_barrier();
-#define MEMORY_BARRIER_AFTER_ATOMIC() Atomic_memory_barrier();
+}
 
 #endif // _MD_ATOMIC_HPP