Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
02110-1301, USA.
- $Id: emit.c 7766 2007-04-19 13:24:48Z michi $
+ $Id: emit.c 7848 2007-05-01 21:40:26Z pm $
*/
#include "vm/jit/emit-common.h"
#include "vm/jit/jit.h"
#include "vm/jit/replace.h"
+#include "vm/jit/abi.h"
#include "vm/global.h"
#include "mm/memory.h"
+#include "vm/exceptions.h"
#define __PORTED__
order of getting the destination register and the load. */
if (IS_INMEMORY(src->flags)) {
- if (IS_FLT_DBL_TYPE(dst->type))
+ if (IS_FLT_DBL_TYPE(dst->type)) {
d = codegen_reg_of_var(iptr->opc, dst, REG_FTMP1);
- else
- d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
+ } else {
+ if (IS_2_WORD_TYPE(dst->type)) {
+ d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
+ } else {
+ d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
+ }
+ }
s1 = emit_load(jd, iptr, src, d);
}
else {
- if (IS_FLT_DBL_TYPE(src->type))
+ if (IS_FLT_DBL_TYPE(src->type)) {
s1 = emit_load(jd, iptr, src, REG_FTMP1);
- else
- s1 = emit_load(jd, iptr, src, REG_ITMP1);
+ } else {
+ if (IS_2_WORD_TYPE(src->type)) {
+ s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
+ } else {
+ s1 = emit_load(jd, iptr, src, REG_ITMP1);
+ }
+ }
d = codegen_reg_of_var(iptr->opc, dst, s1);
}
if (s1 != d) {
- if (IS_FLT_DBL_TYPE(src->type))
+ if (IS_FLT_DBL_TYPE(src->type)) {
M_FMOV(s1, d);
- else
- M_MOV(s1, d);
+ } else {
+ if (IS_2_WORD_TYPE(src->type)) {
+ M_LNGMOVE(s1, d);
+ } else {
+ M_MOV(s1, d);
+ }
+ }
}
emit_store(jd, iptr, dst, d);
}
-void emit_cmovxx(codegendata *cd, instruction *iptr, s4 s, s4 d)
-{
-#if 0
- switch (iptr->flags.fields.condition) {
- case ICMD_IFEQ:
- M_CMOVEQ(s, d);
- break;
- case ICMD_IFNE:
- M_CMOVNE(s, d);
- break;
- case ICMD_IFLT:
- M_CMOVLT(s, d);
- break;
- case ICMD_IFGE:
- M_CMOVGE(s, d);
- break;
- case ICMD_IFGT:
- M_CMOVGT(s, d);
- break;
- case ICMD_IFLE:
- M_CMOVLE(s, d);
- break;
- }
-#endif
-}
-
-
-/* emit_exception_stubs ********************************************************
-
- Generates the code for the exception stubs.
-
-*******************************************************************************/
-
-__PORTED__ void emit_exception_stubs(jitdata *jd)
-{
- codegendata *cd;
- registerdata *rd;
- exceptionref *er;
- s4 branchmpc;
- s4 targetmpc;
- s4 targetdisp;
- s4 disp;
-
- /* get required compiler data */
-
- cd = jd->cd;
- rd = jd->rd;
-
- /* generate exception stubs */
-
- targetdisp = 0;
-
- for (er = cd->exceptionrefs; er != NULL; er = er->next) {
- /* back-patch the branch to this exception code */
-
- branchmpc = er->branchpos;
- targetmpc = cd->mcodeptr - cd->mcodebase;
-
- md_codegen_patch_branch(cd, branchmpc, targetmpc);
-
- MCODECHECK(512);
-
- /* move index register into REG_ITMP1 */
-
- /* Check if the exception is an
- ArrayIndexOutOfBoundsException. If so, move index register
- into a4. */
-
- if (er->reg != -1)
- M_MOV(er->reg, rd->argintregs[4]);
-
- /* calcuate exception address */
-
- if (N_VALID_DISP(er->branchpos - 4)) {
- M_LDA(rd->argintregs[3], REG_PV, er->branchpos - 4);
- } else {
- M_INTMOVE(REG_PV, rd->argintregs[3]);
- M_AADD_IMM(er->branchpos - 4, rd->argintregs[3]);
- }
-
- /* move function to call into REG_ITMP! */
-
- disp = dseg_add_functionptr(cd, er->function);
- M_ALD(REG_ITMP1, REG_PV, disp);
-
- if (targetdisp == 0) {
- targetdisp = (cd->mcodeptr) - (cd->mcodebase);
-
- M_MOV(REG_PV, rd->argintregs[0]);
- M_MOV(REG_SP, rd->argintregs[1]);
-
- M_ALD(rd->argintregs[2],
- REG_SP, cd->stackframesize * 4 - SIZEOF_VOID_P);
-
- M_ASUB_IMM((2 * 4) + 96, REG_SP);
-
- M_AST(rd->argintregs[3], REG_SP, (0 * 4) + 96); /* store XPC */
-
- M_JSR(REG_RA, REG_ITMP1);
-
- M_MOV(REG_RESULT, REG_ITMP1_XPTR);
-
- M_ALD(REG_ITMP2_XPC, REG_SP, (0 * 4) + 96);
- M_AADD_IMM((2 * 4) + 96, REG_SP);
-
- disp = dseg_add_functionptr(cd, asm_handle_exception);
- M_ALD(REG_ITMP3, REG_PV, disp);
- M_JMP(RN, REG_ITMP3);
- }
- else {
- disp = ((cd->mcodebase) + targetdisp) -
- (( cd->mcodeptr) );
-
- M_BR(disp);
- }
-
- }
-}
-
-
/* emit_patcher_stubs **********************************************************
Generates the code for the patcher stubs.
methodinfo *m;
codegendata *cd;
- registerdata *rd;
methoddesc *md;
s4 i, j, k;
s4 stackframesize, off, foff, aoff, doff, t, iargctr, fargctr, disp;
m = jd->m;
cd = jd->cd;
- rd = jd->rd;
md = m->parseddesc;
off = (6 * 8) + (1 * 4);
for (i = 0; i < INT_ARG_CNT; i++, off += 8)
- M_IST(rd->argintregs[i], REG_SP, off);
+ M_IST(abi_registers_integer_argument[i], REG_SP, off);
for (i = 0; i < FLT_ARG_CNT; i++, off += 8)
- M_DST(rd->argfltregs[i], REG_SP, off);
+ M_DST(abi_registers_float_argument[i], REG_SP, off);
/* save temporary registers for leaf methods */
if (jd->isleafmethod) {
for (i = 0; i < INT_TMP_CNT; i++, off += 8)
- M_LST(rd->tmpintregs[i], REG_SP, off);
+ M_LST(abi_registers_integer_temporary[i], REG_SP, off);
for (i = 0; i < FLT_TMP_CNT; i++, off += 8)
- M_DST(rd->tmpfltregs[i], REG_SP, off);
+ M_DST(abi_registers_float_temporary[i], REG_SP, off);
}
/* Load arguments to new locations */
off = (6 * 8) + (1 * 4);
for (i = 0; i < INT_ARG_CNT; i++, off += 8)
- M_ILD(rd->argintregs[i], REG_SP, off);
+ M_ILD(abi_registers_integer_argument[i], REG_SP, off);
for (i = 0; i < FLT_ARG_CNT; i++, off += 8)
- M_DLD(rd->argfltregs[i], REG_SP, off);
+ M_DLD(abi_registers_float_argument[i], REG_SP, off);
/* restore temporary registers for leaf methods */
if (jd->isleafmethod) {
for (i = 0; i < INT_TMP_CNT; i++, off += 8)
- M_ILD(rd->tmpintregs[i], REG_SP, off);
+ M_ILD(abi_registers_integer_temporary[i], REG_SP, off);
for (i = 0; i < FLT_TMP_CNT; i++, off += 8)
- M_DLD(rd->tmpfltregs[i], REG_SP, off);
+ M_DLD(abi_registers_float_temporary[i], REG_SP, off);
}
/* remove stackframe */
#endif /* !defined(NDEBUG) */
-/* code generation functions **************************************************/
+/* emit_load_high **************************************************************
-static void emit_membase(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
-{
- if ((basereg == REG_SP) || (basereg == R12)) {
- if (disp == 0) {
- emit_address_byte(0, dreg, REG_SP);
- emit_address_byte(0, REG_SP, REG_SP);
+ Emits a possible load of the high 32-bits of an operand.
- } else if (IS_IMM8(disp)) {
- emit_address_byte(1, dreg, REG_SP);
- emit_address_byte(0, REG_SP, REG_SP);
- emit_imm8(disp);
+*******************************************************************************/
- } else {
- emit_address_byte(2, dreg, REG_SP);
- emit_address_byte(0, REG_SP, REG_SP);
- emit_imm32(disp);
- }
+__PORTED__ s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
+{
+ codegendata *cd;
+ s4 disp;
+ s4 reg;
- } else if ((disp) == 0 && (basereg) != RBP && (basereg) != R13) {
- emit_address_byte(0,(dreg),(basereg));
+ assert(src->type == TYPE_LNG);
- } else if ((basereg) == RIP) {
- emit_address_byte(0, dreg, RBP);
- emit_imm32(disp);
+ /* get required compiler data */
- } else {
- if (IS_IMM8(disp)) {
- emit_address_byte(1, dreg, basereg);
- emit_imm8(disp);
+ cd = jd->cd;
- } else {
- emit_address_byte(2, dreg, basereg);
- emit_imm32(disp);
- }
- }
-}
+ if (IS_INMEMORY(src->flags)) {
+ COUNT_SPILLS;
+ disp = src->vv.regoff * 4;
-static void emit_membase32(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
-{
- if ((basereg == REG_SP) || (basereg == R12)) {
- emit_address_byte(2, dreg, REG_SP);
- emit_address_byte(0, REG_SP, REG_SP);
- emit_imm32(disp);
- }
- else {
- emit_address_byte(2, dreg, basereg);
- emit_imm32(disp);
+ M_ILD(tempreg, REG_SP, disp);
+
+ reg = tempreg;
}
+ else
+ reg = GET_HIGH_REG(src->vv.regoff);
+
+ return reg;
}
+/* emit_load_low ***************************************************************
-static void emit_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
-{
- if (basereg == -1) {
- emit_address_byte(0, reg, 4);
- emit_address_byte(scale, indexreg, 5);
- emit_imm32(disp);
- }
- else if ((disp == 0) && (basereg != RBP) && (basereg != R13)) {
- emit_address_byte(0, reg, 4);
- emit_address_byte(scale, indexreg, basereg);
- }
- else if (IS_IMM8(disp)) {
- emit_address_byte(1, reg, 4);
- emit_address_byte(scale, indexreg, basereg);
- emit_imm8(disp);
- }
- else {
- emit_address_byte(2, reg, 4);
- emit_address_byte(scale, indexreg, basereg);
- emit_imm32(disp);
- }
-}
+ Emits a possible load of the low 32-bits of an operand.
+*******************************************************************************/
-void emit_ishift(jitdata *jd, s4 shift_op, instruction *iptr)
+__PORTED__ s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
{
- s4 s1, s2, d, d_old;
- varinfo *v_s1,*v_s2,*v_dst;
- codegendata *cd;
+ codegendata *cd;
+ s4 disp;
+ s4 reg;
+
+ assert(src->type == TYPE_LNG);
/* get required compiler data */
cd = jd->cd;
- v_s1 = VAROP(iptr->s1);
- v_s2 = VAROP(iptr->sx.s23.s2);
- v_dst = VAROP(iptr->dst);
-
- s1 = v_s1->vv.regoff;
- s2 = v_s2->vv.regoff;
- d = v_dst->vv.regoff;
+ if (IS_INMEMORY(src->flags)) {
+ COUNT_SPILLS;
- M_INTMOVE(RCX, REG_ITMP1); /* save RCX */
+ disp = src->vv.regoff * 4;
- if (IS_INMEMORY(v_dst->flags)) {
- if (IS_INMEMORY(v_s2->flags) && IS_INMEMORY(v_s1->flags)) {
- if (s1 == d) {
- M_ILD(RCX, REG_SP, s2 * 8);
- emit_shiftl_membase(cd, shift_op, REG_SP, d * 8);
+ M_ILD(tempreg, REG_SP, disp + 4);
- } else {
- M_ILD(RCX, REG_SP, s2 * 8);
- M_ILD(REG_ITMP2, REG_SP, s1 * 8);
- emit_shiftl_reg(cd, shift_op, REG_ITMP2);
- M_IST(REG_ITMP2, REG_SP, d * 8);
- }
+ reg = tempreg;
+ }
+ else
+ reg = GET_LOW_REG(src->vv.regoff);
- } else if (IS_INMEMORY(v_s2->flags) && !IS_INMEMORY(v_s1->flags)) {
- /* s1 may be equal to RCX */
- if (s1 == RCX) {
- if (s2 == d) {
- M_ILD(REG_ITMP1, REG_SP, s2 * 8);
- M_IST(s1, REG_SP, d * 8);
- M_INTMOVE(REG_ITMP1, RCX);
+ return reg;
+}
- } else {
- M_IST(s1, REG_SP, d * 8);
- M_ILD(RCX, REG_SP, s2 * 8);
- }
+s4 emit_load_s1_notzero(jitdata *jd, instruction *iptr, s4 tempreg) {
+ codegendata *cd = jd->cd;
+ s4 reg = emit_load_s1(jd, iptr, tempreg);
+ if (reg == 0) {
+ M_MOV(reg, tempreg);
+ return tempreg;
+ } else {
+ return reg;
+ }
+}
- } else {
- M_ILD(RCX, REG_SP, s2 * 8);
- M_IST(s1, REG_SP, d * 8);
- }
+s4 emit_load_s2_notzero(jitdata *jd, instruction *iptr, s4 tempreg) {
+ codegendata *cd = jd->cd;
+ s4 reg = emit_load_s2(jd, iptr, tempreg);
+ if (reg == 0) {
+ M_MOV(reg, tempreg);
+ return tempreg;
+ } else {
+ return reg;
+ }
+}
- emit_shiftl_membase(cd, shift_op, REG_SP, d * 8);
+s4 emit_load_s1_but(jitdata *jd, instruction *iptr, s4 tempreg, s4 notreg) {
+ codegendata *cd = jd->cd;
+ s4 reg = emit_load_s1(jd, iptr, tempreg);
+ if (reg == notreg) {
+ M_MOV(reg, tempreg);
+ return tempreg;
+ } else {
+ return reg;
+ }
+}
- } else if (!IS_INMEMORY(v_s2->flags) && IS_INMEMORY(v_s1->flags)) {
- if (s1 == d) {
- M_INTMOVE(s2, RCX);
- emit_shiftl_membase(cd, shift_op, REG_SP, d * 8);
+s4 emit_load_s2_but(jitdata *jd, instruction *iptr, s4 tempreg, s4 notreg) {
+ codegendata *cd = jd->cd;
+ s4 reg = emit_load_s2(jd, iptr, tempreg);
+ if (reg == notreg) {
+ M_MOV(reg, tempreg);
+ return tempreg;
+ } else {
+ return reg;
+ }
+}
- } else {
- M_INTMOVE(s2, RCX);
- M_ILD(REG_ITMP2, REG_SP, s1 * 8);
- emit_shiftl_reg(cd, shift_op, REG_ITMP2);
- M_IST(REG_ITMP2, REG_SP, d * 8);
- }
+s4 emit_alloc_dst_even_odd(jitdata *jd, instruction *iptr, s4 htmpreg, s4 ltmpreg, s4 breg) {
+ codegendata *cd;
+ s4 hr, lr;
+ varinfo *dst;
- } else {
- /* s1 may be equal to RCX */
- M_IST(s1, REG_SP, d * 8);
- M_INTMOVE(s2, RCX);
- emit_shiftl_membase(cd, shift_op, REG_SP, d * 8);
- }
+ /* (r0, r1)
+ * (r2, r3)
+ * (r4, r5)
+ * (r6, r7)
+ * (r8, r9)
+ * (r10, r11)
+ * (r12, r13) Illegal, because r13 is PV
+ * (r14, r15) Illegal, because r15 is SP
+ */
- M_INTMOVE(REG_ITMP1, RCX); /* restore RCX */
+ cd = jd->cd;
+ dst = VAROP(iptr->dst);
- } else {
- d_old = d;
- if (d == RCX) {
- d = REG_ITMP3;
+ if (IS_INMEMORY(dst->flags)) {
+ if (! IS_REG_ITMP(ltmpreg)) {
+ M_INTMOVE(ltmpreg, breg);
}
-
- if (IS_INMEMORY(v_s2->flags) && IS_INMEMORY(v_s1->flags)) {
- M_ILD(RCX, REG_SP, s2 * 8);
- M_ILD(d, REG_SP, s1 * 8);
- emit_shiftl_reg(cd, shift_op, d);
-
- } else if (IS_INMEMORY(v_s2->flags) && !IS_INMEMORY(v_s1->flags)) {
- /* s1 may be equal to RCX */
- M_INTMOVE(s1, d);
- M_ILD(RCX, REG_SP, s2 * 8);
- emit_shiftl_reg(cd, shift_op, d);
-
- } else if (!IS_INMEMORY(v_s2->flags) && IS_INMEMORY(v_s1->flags)) {
- M_INTMOVE(s2, RCX);
- M_ILD(d, REG_SP, s1 * 8);
- emit_shiftl_reg(cd, shift_op, d);
-
+ if (! IS_REG_ITMP(htmpreg)) {
+ M_INTMOVE(htmpreg, breg);
+ }
+ return PACK_REGS(ltmpreg, htmpreg);
+ } else {
+ hr = GET_HIGH_REG(dst->vv.regoff);
+ lr = GET_LOW_REG(dst->vv.regoff);
+ if (((hr % 2) == 0) && lr == (hr + 1)) {
+ /* the result is already in a even-odd pair */
+ return dst->vv.regoff;
+ } else if (((hr % 2) == 0) && (hr < R12)) {
+ /* the high register is at a even position */
+ M_INTMOVE(hr + 1, breg);
+ return PACK_REGS(hr + 1, hr);
+ } else if (((lr % 2) == 1) && (lr < R12)) {
+ /* the low register is at a odd position */
+ M_INTMOVE(lr - 1, breg);
+ return PACK_REGS(lr, lr - 1);
} else {
- /* s1 may be equal to RCX */
- if (s1 == RCX) {
- if (s2 == d) {
- /* d cannot be used to backup s1 since this would
- overwrite s2. */
- M_INTMOVE(s1, REG_ITMP3);
- M_INTMOVE(s2, RCX);
- M_INTMOVE(REG_ITMP3, d);
-
- } else {
- M_INTMOVE(s1, d);
- M_INTMOVE(s2, RCX);
- }
-
- } else {
- /* d may be equal to s2 */
- M_INTMOVE(s2, RCX);
- M_INTMOVE(s1, d);
+ /* no way to create an even-odd pair by 1 copy operation,
+ * Use the temporary register pair.
+ */
+ if (! IS_REG_ITMP(ltmpreg)) {
+ M_INTMOVE(ltmpreg, breg);
}
- emit_shiftl_reg(cd, shift_op, d);
+ if (! IS_REG_ITMP(htmpreg)) {
+ M_INTMOVE(htmpreg, breg);
+ }
+ return PACK_REGS(ltmpreg, htmpreg);
}
-
- if (d_old == RCX)
- M_INTMOVE(REG_ITMP3, RCX);
- else
- M_INTMOVE(REG_ITMP1, RCX); /* restore RCX */
}
}
-
-void emit_lshift(jitdata *jd, s4 shift_op, instruction *iptr)
-{
- s4 s1, s2, d, d_old;
- varinfo *v_s1,*v_s2,*v_dst;
+void emit_restore_dst_even_odd(jitdata *jd, instruction *iptr, s4 htmpreg, s4 ltmpreg, s4 breg) {
codegendata *cd;
-
- /* get required compiler data */
+ s4 hr, lr;
+ varinfo *dst;
cd = jd->cd;
+ dst = VAROP(iptr->dst);
- v_s1 = VAROP(iptr->s1);
- v_s2 = VAROP(iptr->sx.s23.s2);
- v_dst = VAROP(iptr->dst);
-
- s1 = v_s1->vv.regoff;
- s2 = v_s2->vv.regoff;
- d = v_dst->vv.regoff;
-
- M_INTMOVE(RCX, REG_ITMP1); /* save RCX */
-
- if (IS_INMEMORY(v_dst->flags)) {
- if (IS_INMEMORY(v_s2->flags) && IS_INMEMORY(v_s1->flags)) {
- if (s1 == d) {
- M_ILD(RCX, REG_SP, s2 * 8);
- emit_shift_membase(cd, shift_op, REG_SP, d * 8);
-
- } else {
- M_ILD(RCX, REG_SP, s2 * 8);
- M_LLD(REG_ITMP2, REG_SP, s1 * 8);
- emit_shift_reg(cd, shift_op, REG_ITMP2);
- M_LST(REG_ITMP2, REG_SP, d * 8);
- }
-
- } else if (IS_INMEMORY(v_s2->flags) && !IS_INMEMORY(v_s1->flags)) {
- /* s1 may be equal to RCX */
- if (s1 == RCX) {
- if (s2 == d) {
- M_ILD(REG_ITMP1, REG_SP, s2 * 8);
- M_LST(s1, REG_SP, d * 8);
- M_INTMOVE(REG_ITMP1, RCX);
-
- } else {
- M_LST(s1, REG_SP, d * 8);
- M_ILD(RCX, REG_SP, s2 * 8);
- }
-
- } else {
- M_ILD(RCX, REG_SP, s2 * 8);
- M_LST(s1, REG_SP, d * 8);
- }
-
- emit_shift_membase(cd, shift_op, REG_SP, d * 8);
-
- } else if (!IS_INMEMORY(v_s2->flags) && IS_INMEMORY(v_s1->flags)) {
- if (s1 == d) {
- M_INTMOVE(s2, RCX);
- emit_shift_membase(cd, shift_op, REG_SP, d * 8);
-
- } else {
- M_INTMOVE(s2, RCX);
- M_LLD(REG_ITMP2, REG_SP, s1 * 8);
- emit_shift_reg(cd, shift_op, REG_ITMP2);
- M_LST(REG_ITMP2, REG_SP, d * 8);
- }
-
- } else {
- /* s1 may be equal to RCX */
- M_LST(s1, REG_SP, d * 8);
- M_INTMOVE(s2, RCX);
- emit_shift_membase(cd, shift_op, REG_SP, d * 8);
- }
-
- M_INTMOVE(REG_ITMP1, RCX); /* restore RCX */
-
- } else {
- d_old = d;
- if (d == RCX) {
- d = REG_ITMP3;
- }
-
- if (IS_INMEMORY(v_s2->flags) && IS_INMEMORY(v_s1->flags)) {
- M_ILD(RCX, REG_SP, s2 * 8);
- M_LLD(d, REG_SP, s1 * 8);
- emit_shift_reg(cd, shift_op, d);
-
- } else if (IS_INMEMORY(v_s2->flags) && !IS_INMEMORY(v_s1->flags)) {
- /* s1 may be equal to RCX */
- M_INTMOVE(s1, d);
- M_ILD(RCX, REG_SP, s2 * 8);
- emit_shift_reg(cd, shift_op, d);
-
- } else if (!IS_INMEMORY(v_s2->flags) && IS_INMEMORY(v_s1->flags)) {
- M_INTMOVE(s2, RCX);
- M_LLD(d, REG_SP, s1 * 8);
- emit_shift_reg(cd, shift_op, d);
-
- } else {
- /* s1 may be equal to RCX */
- if (s1 == RCX) {
- if (s2 == d) {
- /* d cannot be used to backup s1 since this would
- overwrite s2. */
- M_INTMOVE(s1, REG_ITMP3);
- M_INTMOVE(s2, RCX);
- M_INTMOVE(REG_ITMP3, d);
-
- } else {
- M_INTMOVE(s1, d);
- M_INTMOVE(s2, RCX);
- }
-
- } else {
- /* d may be equal to s2 */
- M_INTMOVE(s2, RCX);
- M_INTMOVE(s1, d);
- }
- emit_shift_reg(cd, shift_op, d);
- }
-
- if (d_old == RCX)
- M_INTMOVE(REG_ITMP3, RCX);
- else
- M_INTMOVE(REG_ITMP1, RCX); /* restore RCX */
- }
-}
-
-
-/* low-level code emitter functions *******************************************/
-
-void emit_mov_reg_reg(codegendata *cd, s8 reg, s8 dreg)
-{
- emit_rex(1,(reg),0,(dreg));
- *(cd->mcodeptr++) = 0x89;
- emit_reg((reg),(dreg));
-}
-
-
-void emit_mov_imm_reg(codegendata *cd, s8 imm, s8 reg)
-{
- emit_rex(1,0,0,(reg));
- *(cd->mcodeptr++) = 0xb8 + ((reg) & 0x07);
- emit_imm64((imm));
-}
-
-
-void emit_movl_reg_reg(codegendata *cd, s8 reg, s8 dreg)
-{
- emit_rex(0,(reg),0,(dreg));
- *(cd->mcodeptr++) = 0x89;
- emit_reg((reg),(dreg));
-}
-
-
-void emit_movl_imm_reg(codegendata *cd, s8 imm, s8 reg) {
- emit_rex(0,0,0,(reg));
- *(cd->mcodeptr++) = 0xb8 + ((reg) & 0x07);
- emit_imm32((imm));
-}
-
-
-void emit_mov_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg) {
- emit_rex(1,(reg),0,(basereg));
- *(cd->mcodeptr++) = 0x8b;
- emit_membase(cd, (basereg),(disp),(reg));
-}
-
-
-/*
- * this one is for INVOKEVIRTUAL/INVOKEINTERFACE to have a
- * constant membase immediate length of 32bit
- */
-void emit_mov_membase32_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg) {
- emit_rex(1,(reg),0,(basereg));
- *(cd->mcodeptr++) = 0x8b;
- emit_membase32(cd, (basereg),(disp),(reg));
-}
-
-
-void emit_movl_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg)
-{
- emit_rex(0,(reg),0,(basereg));
- *(cd->mcodeptr++) = 0x8b;
- emit_membase(cd, (basereg),(disp),(reg));
-}
-
-
-/* ATTENTION: Always emit a REX byte, because the instruction size can
- be smaller when all register indexes are smaller than 7. */
-void emit_movl_membase32_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg)
-{
- emit_byte_rex((reg),0,(basereg));
- *(cd->mcodeptr++) = 0x8b;
- emit_membase32(cd, (basereg),(disp),(reg));
-}
-
-
-void emit_mov_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp) {
- emit_rex(1,(reg),0,(basereg));
- *(cd->mcodeptr++) = 0x89;
- emit_membase(cd, (basereg),(disp),(reg));
-}
-
-
-void emit_mov_reg_membase32(codegendata *cd, s8 reg, s8 basereg, s8 disp) {
- emit_rex(1,(reg),0,(basereg));
- *(cd->mcodeptr++) = 0x89;
- emit_membase32(cd, (basereg),(disp),(reg));
-}
-
-
-void emit_movl_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp) {
- emit_rex(0,(reg),0,(basereg));
- *(cd->mcodeptr++) = 0x89;
- emit_membase(cd, (basereg),(disp),(reg));
-}
-
-
-/* Always emit a REX byte, because the instruction size can be smaller when */
-/* all register indexes are smaller than 7. */
-void emit_movl_reg_membase32(codegendata *cd, s8 reg, s8 basereg, s8 disp) {
- emit_byte_rex((reg),0,(basereg));
- *(cd->mcodeptr++) = 0x89;
- emit_membase32(cd, (basereg),(disp),(reg));
-}
-
-
-void emit_mov_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg) {
- emit_rex(1,(reg),(indexreg),(basereg));
- *(cd->mcodeptr++) = 0x8b;
- emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
-}
-
-
-void emit_movl_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg) {
- emit_rex(0,(reg),(indexreg),(basereg));
- *(cd->mcodeptr++) = 0x8b;
- emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
-}
-
-
-void emit_mov_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale) {
- emit_rex(1,(reg),(indexreg),(basereg));
- *(cd->mcodeptr++) = 0x89;
- emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
-}
-
-
-void emit_movl_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale) {
- emit_rex(0,(reg),(indexreg),(basereg));
- *(cd->mcodeptr++) = 0x89;
- emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
-}
-
-
-void emit_movw_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale) {
- *(cd->mcodeptr++) = 0x66;
- emit_rex(0,(reg),(indexreg),(basereg));
- *(cd->mcodeptr++) = 0x89;
- emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
-}
-
-
-void emit_movb_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale) {
- emit_byte_rex((reg),(indexreg),(basereg));
- *(cd->mcodeptr++) = 0x88;
- emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
-}
-
-
-void emit_mov_imm_membase(codegendata *cd, s8 imm, s8 basereg, s8 disp) {
- emit_rex(1,0,0,(basereg));
- *(cd->mcodeptr++) = 0xc7;
- emit_membase(cd, (basereg),(disp),0);
- emit_imm32((imm));
-}
-
-
-void emit_mov_imm_membase32(codegendata *cd, s8 imm, s8 basereg, s8 disp) {
- emit_rex(1,0,0,(basereg));
- *(cd->mcodeptr++) = 0xc7;
- emit_membase32(cd, (basereg),(disp),0);
- emit_imm32((imm));
-}
-
-
-void emit_movl_imm_membase(codegendata *cd, s8 imm, s8 basereg, s8 disp) {
- emit_rex(0,0,0,(basereg));
- *(cd->mcodeptr++) = 0xc7;
- emit_membase(cd, (basereg),(disp),0);
- emit_imm32((imm));
-}
-
-
-/* Always emit a REX byte, because the instruction size can be smaller when */
-/* all register indexes are smaller than 7. */
-void emit_movl_imm_membase32(codegendata *cd, s8 imm, s8 basereg, s8 disp) {
- emit_byte_rex(0,0,(basereg));
- *(cd->mcodeptr++) = 0xc7;
- emit_membase32(cd, (basereg),(disp),0);
- emit_imm32((imm));
-}
-
-
-void emit_movsbq_reg_reg(codegendata *cd, s8 reg, s8 dreg)
-{
- emit_rex(1,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0xbe;
- /* XXX: why do reg and dreg have to be exchanged */
- emit_reg((dreg),(reg));
-}
-
-
-void emit_movswq_reg_reg(codegendata *cd, s8 reg, s8 dreg)
-{
- emit_rex(1,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0xbf;
- /* XXX: why do reg and dreg have to be exchanged */
- emit_reg((dreg),(reg));
-}
-
-
-void emit_movslq_reg_reg(codegendata *cd, s8 reg, s8 dreg)
-{
- emit_rex(1,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x63;
- /* XXX: why do reg and dreg have to be exchanged */
- emit_reg((dreg),(reg));
-}
-
-
-void emit_movzwq_reg_reg(codegendata *cd, s8 reg, s8 dreg)
-{
- emit_rex(1,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0xb7;
- /* XXX: why do reg and dreg have to be exchanged */
- emit_reg((dreg),(reg));
-}
-
-
-void emit_movswq_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg) {
- emit_rex(1,(reg),(indexreg),(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0xbf;
- emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
-}
-
-
-void emit_movsbq_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg) {
- emit_rex(1,(reg),(indexreg),(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0xbe;
- emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
-}
-
-
-void emit_movzwq_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg) {
- emit_rex(1,(reg),(indexreg),(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0xb7;
- emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
-}
-
-
-void emit_mov_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
-{
- emit_rex(1,0,(indexreg),(basereg));
- *(cd->mcodeptr++) = 0xc7;
- emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
- emit_imm32((imm));
-}
-
-
-void emit_movl_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
-{
- emit_rex(0,0,(indexreg),(basereg));
- *(cd->mcodeptr++) = 0xc7;
- emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
- emit_imm32((imm));
-}
-
-
-void emit_movw_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
-{
- *(cd->mcodeptr++) = 0x66;
- emit_rex(0,0,(indexreg),(basereg));
- *(cd->mcodeptr++) = 0xc7;
- emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
- emit_imm16((imm));
-}
-
-
-void emit_movb_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
-{
- emit_rex(0,0,(indexreg),(basereg));
- *(cd->mcodeptr++) = 0xc6;
- emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
- emit_imm8((imm));
-}
-
-
-/*
- * alu operations
- */
-void emit_alu_reg_reg(codegendata *cd, s8 opc, s8 reg, s8 dreg)
-{
- emit_rex(1,(reg),0,(dreg));
- *(cd->mcodeptr++) = (((opc)) << 3) + 1;
- emit_reg((reg),(dreg));
-}
-
-
-void emit_alul_reg_reg(codegendata *cd, s8 opc, s8 reg, s8 dreg)
-{
- emit_rex(0,(reg),0,(dreg));
- *(cd->mcodeptr++) = (((opc)) << 3) + 1;
- emit_reg((reg),(dreg));
-}
-
-
-void emit_alu_reg_membase(codegendata *cd, s8 opc, s8 reg, s8 basereg, s8 disp)
-{
- emit_rex(1,(reg),0,(basereg));
- *(cd->mcodeptr++) = (((opc)) << 3) + 1;
- emit_membase(cd, (basereg),(disp),(reg));
-}
-
-
-void emit_alul_reg_membase(codegendata *cd, s8 opc, s8 reg, s8 basereg, s8 disp)
-{
- emit_rex(0,(reg),0,(basereg));
- *(cd->mcodeptr++) = (((opc)) << 3) + 1;
- emit_membase(cd, (basereg),(disp),(reg));
-}
-
-
-void emit_alu_membase_reg(codegendata *cd, s8 opc, s8 basereg, s8 disp, s8 reg)
-{
- emit_rex(1,(reg),0,(basereg));
- *(cd->mcodeptr++) = (((opc)) << 3) + 3;
- emit_membase(cd, (basereg),(disp),(reg));
-}
-
-
-void emit_alul_membase_reg(codegendata *cd, s8 opc, s8 basereg, s8 disp, s8 reg)
-{
- emit_rex(0,(reg),0,(basereg));
- *(cd->mcodeptr++) = (((opc)) << 3) + 3;
- emit_membase(cd, (basereg),(disp),(reg));
-}
-
-
-void emit_alu_imm_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg) {
- if (IS_IMM8(imm)) {
- emit_rex(1,0,0,(dreg));
- *(cd->mcodeptr++) = 0x83;
- emit_reg((opc),(dreg));
- emit_imm8((imm));
- } else {
- emit_rex(1,0,0,(dreg));
- *(cd->mcodeptr++) = 0x81;
- emit_reg((opc),(dreg));
- emit_imm32((imm));
- }
-}
-
-
-void emit_alu_imm32_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg) {
- emit_rex(1,0,0,(dreg));
- *(cd->mcodeptr++) = 0x81;
- emit_reg((opc),(dreg));
- emit_imm32((imm));
-}
-
-
-void emit_alul_imm_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg) {
- if (IS_IMM8(imm)) {
- emit_rex(0,0,0,(dreg));
- *(cd->mcodeptr++) = 0x83;
- emit_reg((opc),(dreg));
- emit_imm8((imm));
- } else {
- emit_rex(0,0,0,(dreg));
- *(cd->mcodeptr++) = 0x81;
- emit_reg((opc),(dreg));
- emit_imm32((imm));
- }
-}
-
-
-void emit_alu_imm_membase(codegendata *cd, s8 opc, s8 imm, s8 basereg, s8 disp) {
- if (IS_IMM8(imm)) {
- emit_rex(1,(basereg),0,0);
- *(cd->mcodeptr++) = 0x83;
- emit_membase(cd, (basereg),(disp),(opc));
- emit_imm8((imm));
- } else {
- emit_rex(1,(basereg),0,0);
- *(cd->mcodeptr++) = 0x81;
- emit_membase(cd, (basereg),(disp),(opc));
- emit_imm32((imm));
- }
-}
-
-
-void emit_alul_imm_membase(codegendata *cd, s8 opc, s8 imm, s8 basereg, s8 disp) {
- if (IS_IMM8(imm)) {
- emit_rex(0,(basereg),0,0);
- *(cd->mcodeptr++) = 0x83;
- emit_membase(cd, (basereg),(disp),(opc));
- emit_imm8((imm));
- } else {
- emit_rex(0,(basereg),0,0);
- *(cd->mcodeptr++) = 0x81;
- emit_membase(cd, (basereg),(disp),(opc));
- emit_imm32((imm));
- }
-}
-
-
-void emit_test_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- emit_rex(1,(reg),0,(dreg));
- *(cd->mcodeptr++) = 0x85;
- emit_reg((reg),(dreg));
-}
-
-
-void emit_testl_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- emit_rex(0,(reg),0,(dreg));
- *(cd->mcodeptr++) = 0x85;
- emit_reg((reg),(dreg));
-}
-
-
-void emit_test_imm_reg(codegendata *cd, s8 imm, s8 reg) {
- *(cd->mcodeptr++) = 0xf7;
- emit_reg(0,(reg));
- emit_imm32((imm));
-}
-
-
-void emit_testw_imm_reg(codegendata *cd, s8 imm, s8 reg) {
- *(cd->mcodeptr++) = 0x66;
- *(cd->mcodeptr++) = 0xf7;
- emit_reg(0,(reg));
- emit_imm16((imm));
-}
-
-
-void emit_testb_imm_reg(codegendata *cd, s8 imm, s8 reg) {
- *(cd->mcodeptr++) = 0xf6;
- emit_reg(0,(reg));
- emit_imm8((imm));
-}
-
-
-void emit_lea_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg) {
- emit_rex(1,(reg),0,(basereg));
- *(cd->mcodeptr++) = 0x8d;
- emit_membase(cd, (basereg),(disp),(reg));
-}
-
-
-void emit_leal_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg) {
- emit_rex(0,(reg),0,(basereg));
- *(cd->mcodeptr++) = 0x8d;
- emit_membase(cd, (basereg),(disp),(reg));
-}
-
-
-
-void emit_incl_membase(codegendata *cd, s8 basereg, s8 disp)
-{
- emit_rex(0,0,0,(basereg));
- *(cd->mcodeptr++) = 0xff;
- emit_membase(cd, (basereg),(disp),0);
-}
-
-
-
-void emit_cltd(codegendata *cd) {
- *(cd->mcodeptr++) = 0x99;
-}
-
-
-void emit_cqto(codegendata *cd) {
- emit_rex(1,0,0,0);
- *(cd->mcodeptr++) = 0x99;
-}
-
-
-
-void emit_imul_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- emit_rex(1,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0xaf;
- emit_reg((dreg),(reg));
-}
-
-
-void emit_imull_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- emit_rex(0,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0xaf;
- emit_reg((dreg),(reg));
-}
-
-
-void emit_imul_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) {
- emit_rex(1,(dreg),0,(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0xaf;
- emit_membase(cd, (basereg),(disp),(dreg));
-}
-
-
-void emit_imull_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) {
- emit_rex(0,(dreg),0,(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0xaf;
- emit_membase(cd, (basereg),(disp),(dreg));
-}
-
-
-void emit_imul_imm_reg(codegendata *cd, s8 imm, s8 dreg) {
- if (IS_IMM8((imm))) {
- emit_rex(1,0,0,(dreg));
- *(cd->mcodeptr++) = 0x6b;
- emit_reg(0,(dreg));
- emit_imm8((imm));
- } else {
- emit_rex(1,0,0,(dreg));
- *(cd->mcodeptr++) = 0x69;
- emit_reg(0,(dreg));
- emit_imm32((imm));
- }
-}
-
-
-void emit_imul_imm_reg_reg(codegendata *cd, s8 imm, s8 reg, s8 dreg) {
- if (IS_IMM8((imm))) {
- emit_rex(1,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x6b;
- emit_reg((dreg),(reg));
- emit_imm8((imm));
- } else {
- emit_rex(1,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x69;
- emit_reg((dreg),(reg));
- emit_imm32((imm));
- }
-}
-
-
-void emit_imull_imm_reg_reg(codegendata *cd, s8 imm, s8 reg, s8 dreg) {
- if (IS_IMM8((imm))) {
- emit_rex(0,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x6b;
- emit_reg((dreg),(reg));
- emit_imm8((imm));
- } else {
- emit_rex(0,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x69;
- emit_reg((dreg),(reg));
- emit_imm32((imm));
- }
-}
-
-
-void emit_imul_imm_membase_reg(codegendata *cd, s8 imm, s8 basereg, s8 disp, s8 dreg) {
- if (IS_IMM8((imm))) {
- emit_rex(1,(dreg),0,(basereg));
- *(cd->mcodeptr++) = 0x6b;
- emit_membase(cd, (basereg),(disp),(dreg));
- emit_imm8((imm));
- } else {
- emit_rex(1,(dreg),0,(basereg));
- *(cd->mcodeptr++) = 0x69;
- emit_membase(cd, (basereg),(disp),(dreg));
- emit_imm32((imm));
- }
-}
-
-
-void emit_imull_imm_membase_reg(codegendata *cd, s8 imm, s8 basereg, s8 disp, s8 dreg) {
- if (IS_IMM8((imm))) {
- emit_rex(0,(dreg),0,(basereg));
- *(cd->mcodeptr++) = 0x6b;
- emit_membase(cd, (basereg),(disp),(dreg));
- emit_imm8((imm));
- } else {
- emit_rex(0,(dreg),0,(basereg));
- *(cd->mcodeptr++) = 0x69;
- emit_membase(cd, (basereg),(disp),(dreg));
- emit_imm32((imm));
- }
-}
-
-
-void emit_idiv_reg(codegendata *cd, s8 reg) {
- emit_rex(1,0,0,(reg));
- *(cd->mcodeptr++) = 0xf7;
- emit_reg(7,(reg));
-}
-
-
-void emit_idivl_reg(codegendata *cd, s8 reg) {
- emit_rex(0,0,0,(reg));
- *(cd->mcodeptr++) = 0xf7;
- emit_reg(7,(reg));
-}
-
-
-
-void emit_ret(codegendata *cd) {
- *(cd->mcodeptr++) = 0xc3;
-}
-
-
-
-/*
- * shift ops
- */
-void emit_shift_reg(codegendata *cd, s8 opc, s8 reg) {
- emit_rex(1,0,0,(reg));
- *(cd->mcodeptr++) = 0xd3;
- emit_reg((opc),(reg));
-}
-
-
-void emit_shiftl_reg(codegendata *cd, s8 opc, s8 reg) {
- emit_rex(0,0,0,(reg));
- *(cd->mcodeptr++) = 0xd3;
- emit_reg((opc),(reg));
-}
-
-
-void emit_shift_membase(codegendata *cd, s8 opc, s8 basereg, s8 disp) {
- emit_rex(1,0,0,(basereg));
- *(cd->mcodeptr++) = 0xd3;
- emit_membase(cd, (basereg),(disp),(opc));
-}
-
-
-void emit_shiftl_membase(codegendata *cd, s8 opc, s8 basereg, s8 disp) {
- emit_rex(0,0,0,(basereg));
- *(cd->mcodeptr++) = 0xd3;
- emit_membase(cd, (basereg),(disp),(opc));
-}
-
-
-void emit_shift_imm_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg) {
- if ((imm) == 1) {
- emit_rex(1,0,0,(dreg));
- *(cd->mcodeptr++) = 0xd1;
- emit_reg((opc),(dreg));
- } else {
- emit_rex(1,0,0,(dreg));
- *(cd->mcodeptr++) = 0xc1;
- emit_reg((opc),(dreg));
- emit_imm8((imm));
- }
-}
-
-
-void emit_shiftl_imm_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg) {
- if ((imm) == 1) {
- emit_rex(0,0,0,(dreg));
- *(cd->mcodeptr++) = 0xd1;
- emit_reg((opc),(dreg));
- } else {
- emit_rex(0,0,0,(dreg));
- *(cd->mcodeptr++) = 0xc1;
- emit_reg((opc),(dreg));
- emit_imm8((imm));
- }
-}
-
-
-void emit_shift_imm_membase(codegendata *cd, s8 opc, s8 imm, s8 basereg, s8 disp) {
- if ((imm) == 1) {
- emit_rex(1,0,0,(basereg));
- *(cd->mcodeptr++) = 0xd1;
- emit_membase(cd, (basereg),(disp),(opc));
- } else {
- emit_rex(1,0,0,(basereg));
- *(cd->mcodeptr++) = 0xc1;
- emit_membase(cd, (basereg),(disp),(opc));
- emit_imm8((imm));
- }
-}
-
-
-void emit_shiftl_imm_membase(codegendata *cd, s8 opc, s8 imm, s8 basereg, s8 disp) {
- if ((imm) == 1) {
- emit_rex(0,0,0,(basereg));
- *(cd->mcodeptr++) = 0xd1;
- emit_membase(cd, (basereg),(disp),(opc));
- } else {
- emit_rex(0,0,0,(basereg));
- *(cd->mcodeptr++) = 0xc1;
- emit_membase(cd, (basereg),(disp),(opc));
- emit_imm8((imm));
- }
-}
-
-
-
-/*
- * jump operations
- */
-void emit_jmp_imm(codegendata *cd, s8 imm) {
- *(cd->mcodeptr++) = 0xe9;
- emit_imm32((imm));
-}
-
-
-void emit_jmp_reg(codegendata *cd, s8 reg) {
- emit_rex(0,0,0,(reg));
- *(cd->mcodeptr++) = 0xff;
- emit_reg(4,(reg));
-}
-
-
-void emit_jcc(codegendata *cd, s8 opc, s8 imm) {
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = (0x80 + (opc));
- emit_imm32((imm));
-}
-
-
-
-/*
- * conditional set and move operations
- */
-
-/* we need the rex byte to get all low bytes */
-void emit_setcc_reg(codegendata *cd, s8 opc, s8 reg) {
- *(cd->mcodeptr++) = (0x40 | (((reg) >> 3) & 0x01));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = (0x90 + (opc));
- emit_reg(0,(reg));
-}
-
-
-/* we need the rex byte to get all low bytes */
-void emit_setcc_membase(codegendata *cd, s8 opc, s8 basereg, s8 disp) {
- *(cd->mcodeptr++) = (0x40 | (((basereg) >> 3) & 0x01));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = (0x90 + (opc));
- emit_membase(cd, (basereg),(disp),0);
-}
-
-
-void emit_cmovcc_reg_reg(codegendata *cd, s8 opc, s8 reg, s8 dreg)
-{
- emit_rex(1,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = (0x40 + (opc));
- emit_reg((dreg),(reg));
-}
-
-
-void emit_cmovccl_reg_reg(codegendata *cd, s8 opc, s8 reg, s8 dreg)
-{
- emit_rex(0,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = (0x40 + (opc));
- emit_reg((dreg),(reg));
-}
-
-
-
-void emit_neg_reg(codegendata *cd, s8 reg)
-{
- emit_rex(1,0,0,(reg));
- *(cd->mcodeptr++) = 0xf7;
- emit_reg(3,(reg));
-}
-
-
-void emit_negl_reg(codegendata *cd, s8 reg)
-{
- emit_rex(0,0,0,(reg));
- *(cd->mcodeptr++) = 0xf7;
- emit_reg(3,(reg));
-}
-
-
-void emit_push_reg(codegendata *cd, s8 reg) {
- emit_rex(0,0,0,(reg));
- *(cd->mcodeptr++) = 0x50 + (0x07 & (reg));
-}
-
-
-void emit_push_imm(codegendata *cd, s8 imm) {
- *(cd->mcodeptr++) = 0x68;
- emit_imm32((imm));
-}
-
-
-void emit_pop_reg(codegendata *cd, s8 reg) {
- emit_rex(0,0,0,(reg));
- *(cd->mcodeptr++) = 0x58 + (0x07 & (reg));
-}
-
-
-void emit_xchg_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- emit_rex(1,(reg),0,(dreg));
- *(cd->mcodeptr++) = 0x87;
- emit_reg((reg),(dreg));
-}
-
-
-void emit_nop(codegendata *cd) {
- *(cd->mcodeptr++) = 0x90;
-}
-
-
-
-/*
- * call instructions
- */
-void emit_call_reg(codegendata *cd, s8 reg) {
- emit_rex(1,0,0,(reg));
- *(cd->mcodeptr++) = 0xff;
- emit_reg(2,(reg));
-}
-
-
-void emit_call_imm(codegendata *cd, s8 imm) {
- *(cd->mcodeptr++) = 0xe8;
- emit_imm32((imm));
-}
-
-
-void emit_call_mem(codegendata *cd, ptrint mem)
-{
- *(cd->mcodeptr++) = 0xff;
- emit_mem(2,(mem));
-}
-
-
-
-/*
- * floating point instructions (SSE2)
- */
-void emit_addsd_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- *(cd->mcodeptr++) = 0xf2;
- emit_rex(0,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x58;
- emit_reg((dreg),(reg));
-}
-
-
-void emit_addss_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- *(cd->mcodeptr++) = 0xf3;
- emit_rex(0,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x58;
- emit_reg((dreg),(reg));
-}
-
-
-void emit_cvtsi2ssq_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- *(cd->mcodeptr++) = 0xf3;
- emit_rex(1,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x2a;
- emit_reg((dreg),(reg));
-}
-
-
-void emit_cvtsi2ss_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- *(cd->mcodeptr++) = 0xf3;
- emit_rex(0,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x2a;
- emit_reg((dreg),(reg));
-}
-
-
-void emit_cvtsi2sdq_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- *(cd->mcodeptr++) = 0xf2;
- emit_rex(1,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x2a;
- emit_reg((dreg),(reg));
-}
-
-
-void emit_cvtsi2sd_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- *(cd->mcodeptr++) = 0xf2;
- emit_rex(0,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x2a;
- emit_reg((dreg),(reg));
-}
-
-
-void emit_cvtss2sd_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- *(cd->mcodeptr++) = 0xf3;
- emit_rex(0,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x5a;
- emit_reg((dreg),(reg));
-}
-
-
-void emit_cvtsd2ss_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- *(cd->mcodeptr++) = 0xf2;
- emit_rex(0,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x5a;
- emit_reg((dreg),(reg));
-}
-
-
-void emit_cvttss2siq_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- *(cd->mcodeptr++) = 0xf3;
- emit_rex(1,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x2c;
- emit_reg((dreg),(reg));
-}
-
-
-void emit_cvttss2si_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- *(cd->mcodeptr++) = 0xf3;
- emit_rex(0,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x2c;
- emit_reg((dreg),(reg));
-}
-
-
-void emit_cvttsd2siq_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- *(cd->mcodeptr++) = 0xf2;
- emit_rex(1,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x2c;
- emit_reg((dreg),(reg));
-}
-
-
-void emit_cvttsd2si_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- *(cd->mcodeptr++) = 0xf2;
- emit_rex(0,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x2c;
- emit_reg((dreg),(reg));
-}
-
-
-void emit_divss_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- *(cd->mcodeptr++) = 0xf3;
- emit_rex(0,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x5e;
- emit_reg((dreg),(reg));
-}
-
-
-void emit_divsd_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- *(cd->mcodeptr++) = 0xf2;
- emit_rex(0,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x5e;
- emit_reg((dreg),(reg));
-}
-
-
-void emit_movd_reg_freg(codegendata *cd, s8 reg, s8 freg) {
- *(cd->mcodeptr++) = 0x66;
- emit_rex(1,(freg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x6e;
- emit_reg((freg),(reg));
-}
-
-
-void emit_movd_freg_reg(codegendata *cd, s8 freg, s8 reg) {
- *(cd->mcodeptr++) = 0x66;
- emit_rex(1,(freg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x7e;
- emit_reg((freg),(reg));
-}
-
-
-void emit_movd_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp) {
- *(cd->mcodeptr++) = 0x66;
- emit_rex(0,(reg),0,(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x7e;
- emit_membase(cd, (basereg),(disp),(reg));
-}
-
-
-void emit_movd_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale) {
- *(cd->mcodeptr++) = 0x66;
- emit_rex(0,(reg),(indexreg),(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x7e;
- emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
-}
-
-
-void emit_movd_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) {
- *(cd->mcodeptr++) = 0x66;
- emit_rex(1,(dreg),0,(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x6e;
- emit_membase(cd, (basereg),(disp),(dreg));
-}
-
-
-void emit_movdl_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) {
- *(cd->mcodeptr++) = 0x66;
- emit_rex(0,(dreg),0,(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x6e;
- emit_membase(cd, (basereg),(disp),(dreg));
-}
-
-
-void emit_movd_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 dreg) {
- *(cd->mcodeptr++) = 0x66;
- emit_rex(0,(dreg),(indexreg),(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x6e;
- emit_memindex(cd, (dreg),(disp),(basereg),(indexreg),(scale));
-}
-
-
-void emit_movq_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- *(cd->mcodeptr++) = 0xf3;
- emit_rex(0,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x7e;
- emit_reg((dreg),(reg));
-}
-
-
-void emit_movq_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp) {
- *(cd->mcodeptr++) = 0x66;
- emit_rex(0,(reg),0,(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0xd6;
- emit_membase(cd, (basereg),(disp),(reg));
-}
-
-
-void emit_movq_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) {
- *(cd->mcodeptr++) = 0xf3;
- emit_rex(0,(dreg),0,(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x7e;
- emit_membase(cd, (basereg),(disp),(dreg));
-}
-
-
-void emit_movss_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- *(cd->mcodeptr++) = 0xf3;
- emit_rex(0,(reg),0,(dreg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x10;
- emit_reg((reg),(dreg));
-}
-
-
-void emit_movsd_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- *(cd->mcodeptr++) = 0xf2;
- emit_rex(0,(reg),0,(dreg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x10;
- emit_reg((reg),(dreg));
-}
-
-
-void emit_movss_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp) {
- *(cd->mcodeptr++) = 0xf3;
- emit_rex(0,(reg),0,(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x11;
- emit_membase(cd, (basereg),(disp),(reg));
-}
-
-
-/* Always emit a REX byte, because the instruction size can be smaller when */
-/* all register indexes are smaller than 7. */
-void emit_movss_reg_membase32(codegendata *cd, s8 reg, s8 basereg, s8 disp) {
- *(cd->mcodeptr++) = 0xf3;
- emit_byte_rex((reg),0,(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x11;
- emit_membase32(cd, (basereg),(disp),(reg));
-}
-
-
-void emit_movsd_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp) {
- *(cd->mcodeptr++) = 0xf2;
- emit_rex(0,(reg),0,(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x11;
- emit_membase(cd, (basereg),(disp),(reg));
-}
-
-
-/* Always emit a REX byte, because the instruction size can be smaller when */
-/* all register indexes are smaller than 7. */
-void emit_movsd_reg_membase32(codegendata *cd, s8 reg, s8 basereg, s8 disp) {
- *(cd->mcodeptr++) = 0xf2;
- emit_byte_rex((reg),0,(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x11;
- emit_membase32(cd, (basereg),(disp),(reg));
-}
-
-
-void emit_movss_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) {
- *(cd->mcodeptr++) = 0xf3;
- emit_rex(0,(dreg),0,(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x10;
- emit_membase(cd, (basereg),(disp),(dreg));
-}
-
-
-/* Always emit a REX byte, because the instruction size can be smaller when */
-/* all register indexes are smaller than 7. */
-void emit_movss_membase32_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) {
- *(cd->mcodeptr++) = 0xf3;
- emit_byte_rex((dreg),0,(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x10;
- emit_membase32(cd, (basereg),(disp),(dreg));
-}
-
-
-void emit_movlps_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg)
-{
- emit_rex(0,(dreg),0,(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x12;
- emit_membase(cd, (basereg),(disp),(dreg));
-}
-
-
-void emit_movlps_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp)
-{
- emit_rex(0,(reg),0,(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x13;
- emit_membase(cd, (basereg),(disp),(reg));
-}
-
-
-void emit_movsd_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) {
- *(cd->mcodeptr++) = 0xf2;
- emit_rex(0,(dreg),0,(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x10;
- emit_membase(cd, (basereg),(disp),(dreg));
-}
-
-
-/* Always emit a REX byte, because the instruction size can be smaller when */
-/* all register indexes are smaller than 7. */
-void emit_movsd_membase32_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) {
- *(cd->mcodeptr++) = 0xf2;
- emit_byte_rex((dreg),0,(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x10;
- emit_membase32(cd, (basereg),(disp),(dreg));
-}
-
-
-void emit_movlpd_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg)
-{
- *(cd->mcodeptr++) = 0x66;
- emit_rex(0,(dreg),0,(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x12;
- emit_membase(cd, (basereg),(disp),(dreg));
-}
-
-
-void emit_movlpd_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp)
-{
- *(cd->mcodeptr++) = 0x66;
- emit_rex(0,(reg),0,(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x13;
- emit_membase(cd, (basereg),(disp),(reg));
-}
-
-
-void emit_movss_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale) {
- *(cd->mcodeptr++) = 0xf3;
- emit_rex(0,(reg),(indexreg),(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x11;
- emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
-}
-
-
-void emit_movsd_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale) {
- *(cd->mcodeptr++) = 0xf2;
- emit_rex(0,(reg),(indexreg),(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x11;
- emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
-}
-
-
-void emit_movss_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 dreg) {
- *(cd->mcodeptr++) = 0xf3;
- emit_rex(0,(dreg),(indexreg),(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x10;
- emit_memindex(cd, (dreg),(disp),(basereg),(indexreg),(scale));
-}
-
-
-void emit_movsd_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 dreg) {
- *(cd->mcodeptr++) = 0xf2;
- emit_rex(0,(dreg),(indexreg),(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x10;
- emit_memindex(cd, (dreg),(disp),(basereg),(indexreg),(scale));
-}
-
-
-void emit_mulss_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- *(cd->mcodeptr++) = 0xf3;
- emit_rex(0,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x59;
- emit_reg((dreg),(reg));
-}
-
-
-void emit_mulsd_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- *(cd->mcodeptr++) = 0xf2;
- emit_rex(0,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x59;
- emit_reg((dreg),(reg));
-}
-
-
-void emit_subss_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- *(cd->mcodeptr++) = 0xf3;
- emit_rex(0,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x5c;
- emit_reg((dreg),(reg));
-}
-
-
-void emit_subsd_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- *(cd->mcodeptr++) = 0xf2;
- emit_rex(0,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x5c;
- emit_reg((dreg),(reg));
-}
-
-
-void emit_ucomiss_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- emit_rex(0,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x2e;
- emit_reg((dreg),(reg));
-}
-
-
-void emit_ucomisd_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- *(cd->mcodeptr++) = 0x66;
- emit_rex(0,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x2e;
- emit_reg((dreg),(reg));
-}
-
-
-void emit_xorps_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- emit_rex(0,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x57;
- emit_reg((dreg),(reg));
-}
-
-
-void emit_xorps_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) {
- emit_rex(0,(dreg),0,(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x57;
- emit_membase(cd, (basereg),(disp),(dreg));
-}
-
-
-void emit_xorpd_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
- *(cd->mcodeptr++) = 0x66;
- emit_rex(0,(dreg),0,(reg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x57;
- emit_reg((dreg),(reg));
-}
-
-
-void emit_xorpd_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) {
- *(cd->mcodeptr++) = 0x66;
- emit_rex(0,(dreg),0,(basereg));
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x57;
- emit_membase(cd, (basereg),(disp),(dreg));
-}
-
-
-/* system instructions ********************************************************/
-
-void emit_rdtsc(codegendata *cd)
-{
- *(cd->mcodeptr++) = 0x0f;
- *(cd->mcodeptr++) = 0x31;
+ if (IS_INMEMORY(dst->flags)) {
+ if (! IS_REG_ITMP(ltmpreg)) {
+ M_INTMOVE(breg, ltmpreg);
+ }
+ if (! IS_REG_ITMP(htmpreg)) {
+ M_INTMOVE(breg, htmpreg);
+ }
+ } else {
+ hr = GET_HIGH_REG(dst->vv.regoff);
+ lr = GET_LOW_REG(dst->vv.regoff);
+ if (((hr % 2) == 0) && lr == (hr + 1)) {
+ return;
+ } else if (((hr % 2) == 0) && (hr < R12)) {
+ M_INTMOVE(breg, hr + 1);
+ } else if (((lr % 2) == 1) && (lr < R12)) {
+ M_INTMOVE(breg, lr - 1);
+ } else {
+ if (! IS_REG_ITMP(ltmpreg)) {
+ M_INTMOVE(breg, ltmpreg);
+ }
+ if (! IS_REG_ITMP(htmpreg)) {
+ M_INTMOVE(breg, htmpreg);
+ }
+ }
+ }
}
-/* emit_load_high **************************************************************
-
- Emits a possible load of the high 32-bits of an operand.
-
-*******************************************************************************/
-
-__PORTED__ s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
-{
- codegendata *cd;
- s4 disp;
- s4 reg;
-
- assert(src->type == TYPE_LNG);
-
- /* get required compiler data */
-
+void emit_copy_dst(jitdata *jd, instruction *iptr, s4 dtmpreg) {
+ codegendata *cd;
+ varinfo *dst;
cd = jd->cd;
-
- if (IS_INMEMORY(src->flags)) {
- COUNT_SPILLS;
-
- disp = src->vv.regoff * 4;
-
- M_ILD(tempreg, REG_SP, disp);
-
- reg = tempreg;
+ dst = VAROP(iptr->dst);
+ if (! IS_INMEMORY(dst->flags)) {
+ if (dst->vv.regoff != dtmpreg) {
+ if (IS_FLT_DBL_TYPE(dst->type)) {
+ M_FLTMOVE(dtmpreg, dst->vv.regoff);
+ } else if (IS_2_WORD_TYPE(dst->type)) {
+ M_LNGMOVE(dtmpreg, dst->vv.regoff);
+ } else {
+ M_INTMOVE(dtmpreg, dst->vv.regoff);
+ }
+ }
}
- else
- reg = GET_HIGH_REG(src->vv.regoff);
-
- return reg;
}
-/* emit_load_low ***************************************************************
-
- Emits a possible load of the low 32-bits of an operand.
-
-*******************************************************************************/
-
-__PORTED__ s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
-{
- codegendata *cd;
- s4 disp;
- s4 reg;
-
- assert(src->type == TYPE_LNG);
-
- /* get required compiler data */
-
- cd = jd->cd;
-
- if (IS_INMEMORY(src->flags)) {
- COUNT_SPILLS;
+void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt) {
- disp = src->vv.regoff * 4;
-
- M_ILD(tempreg, REG_SP, disp + 4);
+ s4 branchdisp = disp;
- reg = tempreg;
+ switch (condition) {
+ case BRANCH_EQ:
+ M_BEQ(branchdisp);
+ break;
+ case BRANCH_NE:
+ M_BNE(branchdisp);
+ break;
+ case BRANCH_LT:
+ M_BLT(branchdisp);
+ break;
+ case BRANCH_GE:
+ M_BGE(branchdisp);
+ break;
+ case BRANCH_GT:
+ M_BGT(branchdisp);
+ break;
+ case BRANCH_LE:
+ M_BLE(branchdisp);
+ break;
+ case BRANCH_UNCONDITIONAL:
+ M_BR(branchdisp);
+ break;
+ default:
+ vm_abort("emit_branch: unknown condition %d", condition);
}
- else
- reg = GET_LOW_REG(src->vv.regoff);
-
- return reg;
}
-/* emit_nullpointer_check ******************************************************
-
- Emit a NullPointerException check.
-
-*******************************************************************************/
-
-__PORTED__ void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
-{
+void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg) {
if (INSTRUCTION_MUST_CHECK(iptr)) {
M_TEST(reg);
- M_BEQ(0);
- codegen_add_nullpointerexception_ref(cd);
+ M_BNE(SZ_BRC + SZ_ILL);
+ M_ILL(EXCEPTION_HARDWARE_ARITHMETIC);
}
}
*******************************************************************************/
-__PORTED__ void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
+void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
{
if (INSTRUCTION_MUST_CHECK(iptr)) {
/* Size is s4, >= 0
* Do unsigned comparison to catch negative indexes.
*/
N_CL(s2, OFFSET(java_arrayheader, size), RN, s1);
- M_BGE(0);
- codegen_add_arrayindexoutofboundsexception_ref(cd, s2);
+ M_BLT(SZ_BRC + SZ_ILL);
+ M_ILL2(s2, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
}
}
-s4 emit_load_s1_notzero(jitdata *jd, instruction *iptr, s4 tempreg) {
- codegendata *cd = jd->cd;
- s4 reg = emit_load_s1(jd, iptr, tempreg);
- if (reg == 0) {
- M_MOV(reg, tempreg);
- return tempreg;
- } else {
- return reg;
+void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1) {
+ if (INSTRUCTION_MUST_CHECK(iptr)) {
+ if (reg != RN) {
+ M_TEST(reg);
+ }
+ switch (condition) {
+ case BRANCH_LE:
+ M_BGT(SZ_BRC + SZ_ILL);
+ break;
+ case BRANCH_EQ:
+ M_BNE(SZ_BRC + SZ_ILL);
+ break;
+ case BRANCH_GT:
+ M_BLE(SZ_BRC + SZ_ILL);
+ break;
+ default:
+ vm_abort("emit_classcast_check: unknown condition %d", condition);
+ }
+ M_ILL2(s1, EXCEPTION_HARDWARE_CLASSCAST);
}
}
-s4 emit_load_s2_notzero(jitdata *jd, instruction *iptr, s4 tempreg) {
- codegendata *cd = jd->cd;
- s4 reg = emit_load_s2(jd, iptr, tempreg);
- if (reg == 0) {
- M_MOV(reg, tempreg);
- return tempreg;
- } else {
- return reg;
+void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg) {
+ if (INSTRUCTION_MUST_CHECK(iptr)) {
+ M_TEST(reg);
+ M_BNE(SZ_BRC + SZ_ILL);
+ M_ILL(EXCEPTION_HARDWARE_NULLPOINTER);
}
}
-s4 emit_load_s1_but(jitdata *jd, instruction *iptr, s4 tempreg, s4 notreg) {
- codegendata *cd = jd->cd;
- s4 reg = emit_load_s1(jd, iptr, tempreg);
- if (reg == notreg) {
- M_MOV(reg, tempreg);
- return tempreg;
- } else {
- return reg;
+void emit_exception_check(codegendata *cd, instruction *iptr) {
+ if (INSTRUCTION_MUST_CHECK(iptr)) {
+ M_TEST(REG_RESULT);
+ M_BNE(SZ_BRC + SZ_ILL);
+ M_ILL(EXCEPTION_HARDWARE_EXCEPTION);
}
}
-s4 emit_load_s2_but(jitdata *jd, instruction *iptr, s4 tempreg, s4 notreg) {
- codegendata *cd = jd->cd;
- s4 reg = emit_load_s2(jd, iptr, tempreg);
- if (reg == notreg) {
- M_MOV(reg, tempreg);
- return tempreg;
- } else {
- return reg;
- }
-}
+void emit_restore_pv(codegendata *cd) {
+ s4 offset;
-s4 emit_alloc_dst_even_odd(jitdata *jd, instruction *iptr, s4 htmpreg, s4 ltmpreg, s4 breg) {
- codegendata *cd;
- s4 hr, lr;
- varinfo *dst;
+ /*
+ N_BASR(REG_PV, RN);
+ disp = (s4) (cd->mcodeptr - cd->mcodebase);
+ M_ASUB_IMM32(disp, REG_ITMP1, REG_PV);
+ */
- /* (r0, r1)
- * (r2, r3)
- * (r4, r5)
- * (r6, r7)
- * (r8, r9)
- * (r10, r11)
- * (r12, r13) Illegal, because r13 is PV
- * (r14, r15) Illegal, because r15 is SP
+ /* If the offset from the method start does not fit into an immediate
+ * value, we can't put it into the data segment!
*/
- cd = jd->cd;
- dst = VAROP(iptr->dst);
-
- if (IS_INMEMORY(dst->flags)) {
- if (! IS_REG_ITMP(ltmpreg)) {
- M_INTMOVE(ltmpreg, breg);
- }
- if (! IS_REG_ITMP(htmpreg)) {
- M_INTMOVE(htmpreg, breg);
- }
- return PACK_REGS(ltmpreg, htmpreg);
- } else {
- hr = GET_HIGH_REG(dst->vv.regoff);
- lr = GET_LOW_REG(dst->vv.regoff);
- if (((hr % 2) == 0) && lr == (hr + 1)) {
- /* the result is already in a even-odd pair */
- return dst->vv.regoff;
- } else if (((hr % 2) == 0) && (hr < R12)) {
- /* the high register is at a even position */
- M_INTMOVE(hr + 1, breg);
- return PACK_REGS(hr + 1, hr);
- } else if (((lr % 2) == 1) && (lr < R12)) {
- /* the low register is at a odd position */
- M_INTMOVE(lr - 1, breg);
- return PACK_REGS(lr, lr - 1);
- } else {
- /* no way to create an even-odd pair by 1 copy operation,
- * Use the temporary register pair.
- */
- if (! IS_REG_ITMP(ltmpreg)) {
- M_INTMOVE(ltmpreg, breg);
- }
- if (! IS_REG_ITMP(htmpreg)) {
- M_INTMOVE(htmpreg, breg);
- }
- return PACK_REGS(ltmpreg, htmpreg);
- }
- }
-}
-
-void emit_restore_dst_even_odd(jitdata *jd, instruction *iptr, s4 htmpreg, s4 ltmpreg, s4 breg) {
- codegendata *cd;
- s4 hr, lr;
- varinfo *dst;
+ /* Displacement from start of method to here */
- cd = jd->cd;
- dst = VAROP(iptr->dst);
+ offset = (s4) (cd->mcodeptr - cd->mcodebase);
- if (IS_INMEMORY(dst->flags)) {
- if (! IS_REG_ITMP(ltmpreg)) {
- M_INTMOVE(breg, ltmpreg);
- }
- if (! IS_REG_ITMP(htmpreg)) {
- M_INTMOVE(breg, htmpreg);
- }
+ if (N_VALID_IMM(-(offset + SZ_BASR))) {
+ /* Get program counter */
+ N_BASR(REG_PV, RN);
+ /* Substract displacement */
+ M_ASUB_IMM(offset + SZ_BASR, REG_PV);
} else {
- hr = GET_HIGH_REG(dst->vv.regoff);
- lr = GET_LOW_REG(dst->vv.regoff);
- if (((hr % 2) == 0) && lr == (hr + 1)) {
- return;
- } else if (((hr % 2) == 0) && (hr < R12)) {
- M_INTMOVE(breg, hr + 1);
- } else if (((lr % 2) == 1) && (lr < R12)) {
- M_INTMOVE(breg, lr - 1);
- } else {
- if (! IS_REG_ITMP(ltmpreg)) {
- M_INTMOVE(breg, ltmpreg);
- }
- if (! IS_REG_ITMP(htmpreg)) {
- M_INTMOVE(breg, htmpreg);
- }
- }
- }
-}
-
-void emit_copy_dst(jitdata *jd, instruction *iptr, s4 dtmpreg) {
- codegendata *cd;
- varinfo *dst;
- cd = jd->cd;
- dst = VAROP(iptr->dst);
- if (! IS_INMEMORY(dst->flags)) {
- if (dst->vv.regoff != dtmpreg) {
- if (IS_FLT_DBL_TYPE(dst->type)) {
- M_FLTMOVE(dtmpreg, dst->vv.regoff);
- } else if (IS_2_WORD_TYPE(dst->type)) {
- M_LNGMOVE(dtmpreg, dst->vv.regoff);
- } else {
- M_INTMOVE(dtmpreg, dst->vv.regoff);
- }
- }
+ /* Save program counter and jump over displacement in instruction flow */
+ N_BRAS(REG_PV, SZ_BRAS + SZ_LONG);
+ /* Place displacement here */
+ /* REG_PV points now exactly to this position */
+ N_LONG(offset + SZ_BRAS);
+ /* Substract *(REG_PV) from REG_PV */
+ N_S(REG_PV, 0, RN, REG_PV);
}
}
projects / cacao.git / blobdiff