/* src/vm/jit/s390/codegen.h - code generation macros for s390
- Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
- C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
- E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
- J. Wenninger, Institut f. Computersprachen - TU Wien
+ Copyright (C) 1996-2005, 2006, 2007, 2008, 2010
+ CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
This file is part of CACAO.
#include "vm/types.h"
-#include "vm/jit/jit.h"
+#include "vm/jit/jit.hpp"
/* MCODECHECK(icnt) */
codegen_increase(cd); \
} while (0)
+#define ALIGNCODENOP \
+ do { \
+ while (((ptrint) cd->mcodeptr) & 2) { \
+ M_NOP2; \
+ } \
+ while (((ptrint) cd->mcodeptr) & 4) { \
+ M_NOP; \
+ } \
+ } while (0)
+
/* some patcher defines *******************************************************/
#define PATCHER_CALL_SIZE 2 /* size in bytes of a patcher call */
#define PATCHER_NOPS M_NOP3
-#define PATCHER_NOPS_SKIP 2
/* branch defines ************************************************************/
} \
} while (0)
-/* stub defines **************************************************************/
-
-#define COMPILERSTUB_CODESIZE (SZ_AHI + SZ_L + SZ_L + SZ_BCR)
/* *** BIG TODO ***
* Make all this inline functions !!!!!!!!!!
#define SZ_RR 2
+static inline uint8_t N_RR_GET_OPC(uint8_t *instrp) {
+ return instrp[0];
+}
+
+static inline uint8_t N_RR_GET_REG1(uint8_t *instrp) {
+ return (instrp[1] >> 4) & 0xF;
+}
+
+static inline uint8_t N_RR_GET_REG2(uint8_t *instrp) {
+ return (instrp[1] & 0xF);
+}
+
#define N_RR2(op, i) \
_CODE2( (_OP(op) << 8) | _I8(i) )
#define SZ_RX 4
+static inline uint8_t N_RX_GET_OPC(uint8_t *instrp) {
+ return instrp[0];
+}
+
+static inline uint8_t N_RX_GET_REG(uint8_t *instrp) {
+ return (instrp[1] >> 4) & 0xF;
+}
+
+static inline uint8_t N_RX_GET_INDEX(uint8_t *instrp) {
+ return (instrp[1] & 0xF);
+}
+
+static inline uint8_t N_RX_GET_BASE(uint8_t *instrp) {
+ return (instrp[2] >> 4) & 0xF;
+}
+
+static inline uint16_t N_RX_GET_DISP(uint8_t *instrp) {
+ return *(uint16_t *)(instrp + 2) & 0xFFF;
+}
+
+static inline void N_RX_SET_DISP(uint8_t *instrp, uint16_t disp) {
+ *(uint16_t *)(instrp + 2) |= (disp & 0xFFF);
+}
+
#define N_RI(op1, op2, r1, i2) \
_CODE4( (_OP(op1) << 24) | (_R(r1) << 20) | (_OP4(op2) << 16) | (u2)_SI16(i2) )
+static inline int16_t N_RI_GET_IMM(uint8_t *instrp) {
+ return *(int16_t *)(instrp + 2);
+}
+
+static inline void N_RI_SET_IMM(uint8_t *instrp, int16_t imm) {
+ *(int16_t *)(instrp + 2) = imm;
+}
+
#define N_RI2(op1, op2, r1, i2) \
_CODE4( (_OP(op1) << 24) | (_R(r1) << 20) | (_OP4(op2) << 16) | (u2)_UI16(i2) )
#define N_DSEG_DISP(x) ((x) - N_PV_OFFSET)
#define N_VALID_DSEG_DISP(x) N_VALID_DISP(N_DSEG_DISP(x))
-#define N_BRANCH_MIN -32768
-#define N_BRANCH_MAX 32767
+#define N_BRANCH_MIN (-32768 * 2)
+#define N_BRANCH_MAX (32767 * 2)
#define N_VALID_BRANCH(x) ((N_BRANCH_MIN <= (x)) && ((x) <= N_BRANCH_MAX))
#define ASSERT_VALID_BRANCH(x) assert(N_VALID_BRANCH(x))
* 0 15
*/
#define N_ILL(data) _CODE2(0x0200 | _UBITS(data, 8))
-#define SZ_ILL 2
+# define OPC_ILL 0x02
+# define SZ_ILL 2
+
+static inline uint8_t N_ILL_GET_REG(uint8_t *instrp) {
+ return (instrp[1] >> 4) & 0xF;
+}
+
+static inline uint8_t N_ILL_GET_TYPE(uint8_t *instrp) {
+ return (instrp[1] & 0xF);
+}
#define N_LONG(l) _CODE4(l)
#define SZ_LONG 4
#define N_CHI(r1, i2) N_RI(0xA7, 0xE, r1, i2)
#define N_CLR(r1, r2) N_RR(0x15, r1, r2)
#define N_CL(r1, d2, x2, b2) N_RX(0x55, r1, d2, x2, b2)
+# define OPC_CL 0x55
#define N_CLI(d1, b1, i2) N_SI(0x95, d1, b1, i2)
#define N_CLC(d1, l, b1, d2, b2) N_SS(0xD5, d1, (l - 1), b1, d2, b2)
#define N_CLM(r1, m3, d2, b2) N_RS(0xBD, r1, m3, d2, b2)
#define N_CUTFU(r1, r2) N_RRE(0xB2A7, r1, r2)
#define N_CPYA(r1, r2) N_RRE(0xB240, r1, r2)
#define N_DR(r1, r2) N_RR(0x1D, r1, r2)
+# define OPC_DR 0x1D
#define N_D(r1, d2, x2, b2) N_RX(0x5D, r1, d2, x2, b2)
#define N_XR(r1, r2) N_RR(0x17, r1, r2)
#define N_X(r1, d2, x2, b2) N_RX(0x57, r1, d2, x2, b2)
#define N_LR(r1, r2) N_RR(0x18, r1, r2)
#define N_L(r1, d2, x2, b2) N_RX(0x58, r1, d2, x2, b2)
# define SZ_L SZ_RX
+# define OPC_L 0x58
#define N_LAM(r1, r3, d2, b2) N_RS(0x9A, r1, r3, d2, b2)
#define N_LA(r1, d2, x2, b2) N_RX(0x41, r1, d2, x2, b2)
#define N_LAE(r1, d2, x2, b2) N_RX(0x51, r1, d2, x2, b2)
#define N_SRA(r1, d2, b2) N_RS(0x8A, r1, 0x00, d2, b2)
#define N_SRL(r1, d2, b2) N_RS(0x88, r1, 0x00, d2, b2)
#define N_ST(r1, d2, x2, b2) N_RX(0x50, r1, d2, x2, b2)
+# define OPC_ST 0x50
#define N_STAM(r1, r3, d2, b2) N_RS(0x9B, r1, r3, d2, b2)
#define N_STC(r1, d2, x2, b2) N_RX(0x42, r1, d2, x2, b2)
#define N_STCM(r1, m3, d2, b2) N_RS(0xBE, r1, m3, d2, b2)
#define M_MOV(a, b) N_LR(b, a)
#define M_FMOV(a, b) N_LDR(b, a)
+#define M_DMOV(a, b) M_FMOV((a), (b))
#define M_DST(r, b, d) _IFNEG(d, assert(0), N_STD(r, d, RN, b))
#define M_FST(r, b, d) _IFNEG(d, assert(0), N_STE(r, d, RN, b))
#define M_IST(r, b, d) _IFNEG( \
#define M_ICMP(a, b) N_CR(a, b)
#define M_ICMPU(a, b) N_CLR(a, b)
#define M_ICMP_IMM(a, b) N_CHI(a, b)
+#define M_ACMP(a, b) N_CR(a, b)
#define M_CVTIF(src, dst) N_CEFBR(dst, src)
#define M_CVTID(src, dst) N_CDFBR(dst, src)
#define M_FMUL(a, dest) N_MEEBR(dest, a)
ICONST(GET_LOW_REG((reg)), (s4) ((s8) (c))); \
} while (0)
-/* M_INTMOVE:
- generates an integer-move from register a to b.
- if a and b are the same int-register, no code will be generated.
-*/
-
-#define M_INTMOVE(reg,dreg) \
- do { \
- if ((reg) != (dreg)) { \
- M_MOV(reg, dreg); \
- } \
- } while (0)
-
-#define M_LNGMOVE(a, b) \
- do { \
- if (GET_HIGH_REG(a) == GET_LOW_REG(b)) { \
- assert((GET_LOW_REG(a) != GET_HIGH_REG(b))); \
- M_INTMOVE(GET_HIGH_REG(a), GET_HIGH_REG(b)); \
- M_INTMOVE(GET_LOW_REG(a), GET_LOW_REG(b)); \
- } else { \
- M_INTMOVE(GET_LOW_REG(a), GET_LOW_REG(b)); \
- M_INTMOVE(GET_HIGH_REG(a), GET_HIGH_REG(b)); \
- } \
- } while (0)
-
-/* M_FLTMOVE:
- generates a floating-point-move from register a to b.
- if a and b are the same float-register, no code will be generated
-*/
-
-#define M_FLTMOVE(reg,dreg) \
- do { \
- if ((reg) != (dreg)) { \
- M_FMOV(reg, dreg); \
- } \
- } while (0)
-
#define M_ISUB_IMM32(imm, tmpreg, reg) \
do { \
if (N_VALID_IMM(imm)) { \
#define M_ASUB_IMM32(imm, tmpreg, reg) M_ISUB_IMM32(imm, tmpreg, reg)
-#define PROFILE_CYCLE_START
-
-#define PROFILE_CYCLE_STOP
-
#endif /* _CODEGEN_H */
/*