/* src/vm/jit/s390/codegen.h - code generation macros for s390
- Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
- C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
- E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
- J. Wenninger, Institut f. Computersprachen - TU Wien
+ Copyright (C) 1996-2005, 2006, 2007, 2008, 2010
+ CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
This file is part of CACAO.
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
02110-1301, USA.
- $Id: codegen.h 8240 2007-07-29 20:36:47Z pm $
-
*/
#include "vm/types.h"
-#include "vm/jit/jit.h"
+#include "vm/jit/jit.hpp"
/* MCODECHECK(icnt) */
} while (0)
#define ALIGNCODENOP \
- if ((s4) (((ptrint) cd->mcodeptr) & 7)) { \
- M_NOP; \
- }
-
-/* some patcher defines *******************************************************/
-
-#define PATCHER_CALL_SIZE 4 /* size in bytes of a patcher call */
-
-#define PATCHER_NOPS \
do { \
- /* do not generate additonal nops for long patcher branches */ \
- if (! CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) { \
- M_NOP; \
- M_NOP; \
- M_NOP; \
- } \
+ while (((ptrint) cd->mcodeptr) & 2) { \
+ M_NOP2; \
+ } \
+ while (((ptrint) cd->mcodeptr) & 4) { \
+ M_NOP; \
+ } \
} while (0)
-#define PATCHER_LONGBRANCHES_NOPS \
- do { \
- M_BR(SZ_BRC + (10 * 2)); \
- M_NOP2; M_NOP2; M_NOP2; M_NOP2; M_NOP2; M_NOP2; M_NOP2; M_NOP2; /* ild */ \
- M_NOP2; /* aadd */ \
- M_NOP2; /* jmp */ \
- } while (0)
+/* some patcher defines *******************************************************/
-#define PATCHER_NOPS_SKIP 12
-#define PATCHER_LONGBRANCHES_NOPS_SKIP 24
+#define PATCHER_CALL_SIZE 2 /* size in bytes of a patcher call */
+#define PATCHER_NOPS M_NOP3
/* branch defines ************************************************************/
} \
} while (0)
-/* stub defines **************************************************************/
-
-#define COMPILERSTUB_CODESIZE (SZ_AHI + SZ_L + SZ_L + SZ_BCR)
/* *** BIG TODO ***
* Make all this inline functions !!!!!!!!!!
* In debug mode, the instructions assert that %r0 was not given as argument.
*/
-#if 1
+#if !defined(NDEBUG)
+
# include <stdlib.h>
+
/* register none */
# define RN 16
- /* Optional register.
- * Check that value given is %r1 - %r15 or RN
- */
-# define _WITH_LINE(f, ...) f(__FILE__, __LINE__, __VA_ARGS__)
+
static inline int _OR_IMPL(const char *file, int line, int r) {
if(!(
((0 < r) && (r < 16)) ||
}
return ((r == RN) ? 0 : r);
}
-# define _OR(r) _WITH_LINE(_OR_IMPL, r)
+# define _OR(r) _OR_IMPL(__FILE__, __LINE__, r)
# define _SMIN(b) (-(1 << (bits - 1)))
# define _SMAX(b) ((1 << (b - 1)) - 1)
}
return i;
}
-# define _UBITS(i, bits) _WITH_LINE(_UBITS_IMPL, i, bits)
+
+# define _UBITS(i, bits) _UBITS_IMPL(__FILE__, __LINE__, i, bits)
+
static inline int _SBITS_IMPL(const char *file, int line, int i, int bits) {
if(!((_SMIN(bits) <= i) && (i <= _SMAX(bits)))) {
fprintf(stdout, "%d (0x%X) is not an signed %d bit integer at %s:%d.\n", i, i, bits, file, line);
}
return i;
}
-# define _SBITS(i, bits) _WITH_LINE(_SBITS_IMPL, i, bits)
+
+# define _SBITS(i, bits) _SBITS_IMPL(__FILE__, __LINE__, i, bits)
+
static inline int _BITS_IMPL(const char *file, int line, int i, int bits) {
if (!(
((_UMIN(bits) <= i) && (i <= _UMAX(bits))) ||
}
return i;
}
-# define _BITS(i, bits) _WITH_LINE(_BITS_IMPL, i, bits)
+
+# define _BITS(i, bits) _BITS_IMPL(__FILE__, __LINE__, i, bits)
+
#else
# define RN 0
# define _OR(x) (x)
#define SZ_RR 2
+static inline uint8_t N_RR_GET_OPC(uint8_t *instrp) {
+ return instrp[0];
+}
+
+static inline uint8_t N_RR_GET_REG1(uint8_t *instrp) {
+ return (instrp[1] >> 4) & 0xF;
+}
+
+static inline uint8_t N_RR_GET_REG2(uint8_t *instrp) {
+ return (instrp[1] & 0xF);
+}
+
#define N_RR2(op, i) \
_CODE2( (_OP(op) << 8) | _I8(i) )
#define SZ_RX 4
+static inline uint8_t N_RX_GET_OPC(uint8_t *instrp) {
+ return instrp[0];
+}
+
+static inline uint8_t N_RX_GET_REG(uint8_t *instrp) {
+ return (instrp[1] >> 4) & 0xF;
+}
+
+static inline uint8_t N_RX_GET_INDEX(uint8_t *instrp) {
+ return (instrp[1] & 0xF);
+}
+
+static inline uint8_t N_RX_GET_BASE(uint8_t *instrp) {
+ return (instrp[2] >> 4) & 0xF;
+}
+
+static inline uint16_t N_RX_GET_DISP(uint8_t *instrp) {
+ return *(uint16_t *)(instrp + 2) & 0xFFF;
+}
+
+static inline void N_RX_SET_DISP(uint8_t *instrp, uint16_t disp) {
+ *(uint16_t *)(instrp + 2) |= (disp & 0xFFF);
+}
+
#define N_RI(op1, op2, r1, i2) \
_CODE4( (_OP(op1) << 24) | (_R(r1) << 20) | (_OP4(op2) << 16) | (u2)_SI16(i2) )
+static inline int16_t N_RI_GET_IMM(uint8_t *instrp) {
+ return *(int16_t *)(instrp + 2);
+}
+
+static inline void N_RI_SET_IMM(uint8_t *instrp, int16_t imm) {
+ *(int16_t *)(instrp + 2) = imm;
+}
+
#define N_RI2(op1, op2, r1, i2) \
_CODE4( (_OP(op1) << 24) | (_R(r1) << 20) | (_OP4(op2) << 16) | (u2)_UI16(i2) )
#define N_DSEG_DISP(x) ((x) - N_PV_OFFSET)
#define N_VALID_DSEG_DISP(x) N_VALID_DISP(N_DSEG_DISP(x))
-#define N_BRANCH_MIN -32768
-#define N_BRANCH_MAX 32767
+#define N_BRANCH_MIN (-32768 * 2)
+#define N_BRANCH_MAX (32767 * 2)
#define N_VALID_BRANCH(x) ((N_BRANCH_MIN <= (x)) && ((x) <= N_BRANCH_MAX))
#define ASSERT_VALID_BRANCH(x) assert(N_VALID_BRANCH(x))
+#define N_IS_EVEN_ODD(x) \
+ (((GET_HIGH_REG(x) % 2) == 0) && (GET_LOW_REG(x) == (GET_HIGH_REG(x) + 1)))
+
/* Condition codes */
#define DD_O 1
* 0 15
*/
#define N_ILL(data) _CODE2(0x0200 | _UBITS(data, 8))
-#define SZ_ILL 2
+# define OPC_ILL 0x02
+# define SZ_ILL 2
+
+static inline uint8_t N_ILL_GET_REG(uint8_t *instrp) {
+ return (instrp[1] >> 4) & 0xF;
+}
+
+static inline uint8_t N_ILL_GET_TYPE(uint8_t *instrp) {
+ return (instrp[1] & 0xF);
+}
#define N_LONG(l) _CODE4(l)
#define SZ_LONG 4
#define N_CHI(r1, i2) N_RI(0xA7, 0xE, r1, i2)
#define N_CLR(r1, r2) N_RR(0x15, r1, r2)
#define N_CL(r1, d2, x2, b2) N_RX(0x55, r1, d2, x2, b2)
+# define OPC_CL 0x55
#define N_CLI(d1, b1, i2) N_SI(0x95, d1, b1, i2)
#define N_CLC(d1, l, b1, d2, b2) N_SS(0xD5, d1, (l - 1), b1, d2, b2)
#define N_CLM(r1, m3, d2, b2) N_RS(0xBD, r1, m3, d2, b2)
#define N_CUTFU(r1, r2) N_RRE(0xB2A7, r1, r2)
#define N_CPYA(r1, r2) N_RRE(0xB240, r1, r2)
#define N_DR(r1, r2) N_RR(0x1D, r1, r2)
+# define OPC_DR 0x1D
#define N_D(r1, d2, x2, b2) N_RX(0x5D, r1, d2, x2, b2)
#define N_XR(r1, r2) N_RR(0x17, r1, r2)
#define N_X(r1, d2, x2, b2) N_RX(0x57, r1, d2, x2, b2)
#define N_LR(r1, r2) N_RR(0x18, r1, r2)
#define N_L(r1, d2, x2, b2) N_RX(0x58, r1, d2, x2, b2)
# define SZ_L SZ_RX
+# define OPC_L 0x58
#define N_LAM(r1, r3, d2, b2) N_RS(0x9A, r1, r3, d2, b2)
#define N_LA(r1, d2, x2, b2) N_RX(0x41, r1, d2, x2, b2)
#define N_LAE(r1, d2, x2, b2) N_RX(0x51, r1, d2, x2, b2)
#define N_SRA(r1, d2, b2) N_RS(0x8A, r1, 0x00, d2, b2)
#define N_SRL(r1, d2, b2) N_RS(0x88, r1, 0x00, d2, b2)
#define N_ST(r1, d2, x2, b2) N_RX(0x50, r1, d2, x2, b2)
+# define OPC_ST 0x50
#define N_STAM(r1, r3, d2, b2) N_RS(0x9B, r1, r3, d2, b2)
#define N_STC(r1, d2, x2, b2) N_RX(0x42, r1, d2, x2, b2)
#define N_STCM(r1, m3, d2, b2) N_RS(0xBE, r1, m3, d2, b2)
#define M_MOV(a, b) N_LR(b, a)
#define M_FMOV(a, b) N_LDR(b, a)
+#define M_DMOV(a, b) M_FMOV((a), (b))
#define M_DST(r, b, d) _IFNEG(d, assert(0), N_STD(r, d, RN, b))
#define M_FST(r, b, d) _IFNEG(d, assert(0), N_STE(r, d, RN, b))
#define M_IST(r, b, d) _IFNEG( \
#define M_JMP(rs, rd) _IF(rs == RN, N_BCR(DD_ANY, rd), N_BASR(rs, rd))
#define M_NOP N_BC(0, 0, RN, RN)
#define M_NOP2 N_BCR(0, RN)
+#define M_NOP3 N_BCR(0, 1)
#define M_JSR(reg_ret, reg_addr) N_BASR(reg_ret, reg_addr)
#define M_ICMP(a, b) N_CR(a, b)
#define M_ICMPU(a, b) N_CLR(a, b)
#define M_ICMP_IMM(a, b) N_CHI(a, b)
+#define M_ACMP(a, b) N_CR(a, b)
#define M_CVTIF(src, dst) N_CEFBR(dst, src)
#define M_CVTID(src, dst) N_CDFBR(dst, src)
#define M_FMUL(a, dest) N_MEEBR(dest, a)
ICONST(GET_LOW_REG((reg)), (s4) ((s8) (c))); \
} while (0)
-/* M_INTMOVE:
- generates an integer-move from register a to b.
- if a and b are the same int-register, no code will be generated.
-*/
-
-#define M_INTMOVE(reg,dreg) \
- do { \
- if ((reg) != (dreg)) { \
- M_MOV(reg, dreg); \
- } \
- } while (0)
-
-#define M_LNGMOVE(a, b) \
- do { \
- if (GET_HIGH_REG(a) == GET_LOW_REG(b)) { \
- assert((GET_LOW_REG(a) != GET_HIGH_REG(b))); \
- M_INTMOVE(GET_HIGH_REG(a), GET_HIGH_REG(b)); \
- M_INTMOVE(GET_LOW_REG(a), GET_LOW_REG(b)); \
- } else { \
- M_INTMOVE(GET_LOW_REG(a), GET_LOW_REG(b)); \
- M_INTMOVE(GET_HIGH_REG(a), GET_HIGH_REG(b)); \
- } \
- } while (0)
-
-/* M_FLTMOVE:
- generates a floating-point-move from register a to b.
- if a and b are the same float-register, no code will be generated
-*/
-
-#define M_FLTMOVE(reg,dreg) \
- do { \
- if ((reg) != (dreg)) { \
- M_FMOV(reg, dreg); \
- } \
- } while (0)
-
#define M_ISUB_IMM32(imm, tmpreg, reg) \
do { \
if (N_VALID_IMM(imm)) { \
#define M_ASUB_IMM32(imm, tmpreg, reg) M_ISUB_IMM32(imm, tmpreg, reg)
-/* ----------------------------------------------- */
-
-#define _DEPR(x) \
- do { \
- fprintf(stdout, \
- "Using old x86_64 instruction %s at %s (%s:%d), fix this.\n", \
- #x, __FUNCTION__, __FILE__, __LINE__); \
- } while (0)
-
-#define M_MOV_IMM(a,b) _DEPR( M_MOV_IMM(a,b) )
-
-#define M_IMOV(a,b) _DEPR( M_IMOV(a,b) )
-#define M_IMOV_IMM(a,b) _DEPR( M_IMOV_IMM(a,b) )
-
-
-#define M_ILD32(a,b,disp) _DEPR( M_ILD32(a,b,disp) )
-#define M_LLD32(a,b,disp) _DEPR( M_LLD32(a,b,disp) )
-
-
-#define M_IST_IMM(a,b,disp) _DEPR( M_IST_IMM(a,b,disp) )
-#define M_LST_IMM32(a,b,disp) _DEPR( M_LST_IMM32(a,b,disp) )
-
-#define M_IST32(a,b,disp) _DEPR( M_IST32(a,b,disp) )
-#define M_LST32(a,b,disp) _DEPR( M_LST32(a,b,disp) )
-
-#define M_IST32_IMM(a,b,disp) _DEPR( M_IST32_IMM(a,b,disp) )
-#define M_LST32_IMM32(a,b,disp) _DEPR( M_LST32_IMM32(a,b,disp) )
-
-
-#define M_LADD(a,b) _DEPR( M_LADD(a,b) )
-#define M_LSUB(a,b) _DEPR( M_LSUB(a,b) )
-#define M_LMUL(a,b) _DEPR( M_LMUL(a,b) )
-
-#define M_LADD_IMM(a,b) _DEPR( M_LADD_IMM(a,b) )
-#define M_LSUB_IMM(a,b) _DEPR( M_LSUB_IMM(a,b) )
-#define M_LMUL_IMM(a,b,c) _DEPR( M_LMUL_IMM(a,b,c) )
-
-#define M_IINC(a) _DEPR( M_IINC(a) )
-#define M_IDEC(a) _DEPR( M_IDEC(a) )
-
-#define M_ALD32(a,b,disp) _DEPR( M_ALD32(a,b,disp) )
-
-#define M_AST_IMM32(a,b,c) _DEPR( M_AST_IMM32(a,b,c) )
-
-#define M_LADD_IMM32(a,b) _DEPR( M_LADD_IMM32(a,b) )
-#define M_AADD_IMM32(a,b) _DEPR( M_AADD_IMM32(a,b) )
-#define M_LSUB_IMM32(a,b) _DEPR( M_LSUB_IMM32(a,b) )
-
-#define M_ILEA(a,b,c) _DEPR( M_ILEA(a,b,c) )
-#define M_LLEA(a,b,c) _DEPR( M_LLEA(a,b,c) )
-#define M_ALEA(a,b,c) _DEPR( M_ALEA(a,b,c) )
-
-#define M_LNEG(a) _DEPR( M_LNEG(a) )
-
-#define M_IAND_IMM(a,b) _DEPR( M_IAND_IMM(a,b) )
-#define M_IOR_IMM(a,b) _DEPR( M_IOR_IMM(a,b) )
-#define M_IXOR_IMM(a,b) _DEPR( M_IXOR_IMM(a,b) )
-
-#define M_LAND(a,b) _DEPR( M_LAND(a,b) )
-#define M_LOR(a,b) _DEPR( M_LOR(a,b) )
-#define M_LXOR(a,b) _DEPR( M_LXOR(a,b) )
-
-#define M_LAND_IMM(a,b) _DEPR( M_LAND_IMM(a,b) )
-#define M_LOR_IMM(a,b) _DEPR( M_LOR_IMM(a,b) )
-#define M_LXOR_IMM(a,b) _DEPR( M_LXOR_IMM(a,b) )
-
-#define M_SSEXT(a,b) _DEPR( M_SSEXT(a,b) )
-#define M_ISEXT(a,b) _DEPR( M_ISEXT(a,b) )
-
-#define M_CZEXT(a,b) _DEPR( M_CZEXT(a,b) )
-
-#define M_ISRA_IMM(a,b) _DEPR( M_ISRA_IMM(a,b) )
-
-#define M_LSLL_IMM(a,b) _DEPR( M_LSLL_IMM(a,b) )
-#define M_LSRA_IMM(a,b) _DEPR( M_LSRA_IMM(a,b) )
-#define M_LSRL_IMM(a,b) _DEPR( M_LSRL_IMM(a,b) )
-
-#define M_LCMP(a,b) _DEPR( M_LCMP(a,b) )
-#define M_LCMP_IMM(a,b) _DEPR( M_LCMP_IMM(a,b) )
-#define M_LCMP_IMM_MEMBASE(a,b,c) _DEPR( M_LCMP_IMM_MEMBASE(a,b,c) )
-#define M_LCMP_MEMBASE(a,b,c) _DEPR( M_LCMP_MEMBASE(a,b,c) )
-
-#define M_ICMP_IMM_MEMBASE(a,b,c) _DEPR( M_ICMP_IMM_MEMBASE(a,b,c) )
-#define M_ICMP_MEMBASE(a,b,c) _DEPR( M_ICMP_MEMBASE(a,b,c) )
-
-#define M_BAE(disp) _DEPR( M_BAE(disp) )
-#define M_BA(disp) _DEPR( M_BA(disp) )
-
-#define M_CMOVEQ(a,b) _DEPR( M_CMOVEQ(a,b) )
-#define M_CMOVNE(a,b) _DEPR( M_CMOVNE(a,b) )
-#define M_CMOVLT(a,b) _DEPR( M_CMOVLT(a,b) )
-#define M_CMOVLE(a,b) _DEPR( M_CMOVLE(a,b) )
-#define M_CMOVGE(a,b) _DEPR( M_CMOVGE(a,b) )
-#define M_CMOVGT(a,b) _DEPR( M_CMOVGT(a,b) )
-
-#define M_CMOVEQ_MEMBASE(a,b,c) _DEPR( M_CMOVEQ_MEMBASE(a,b,c) )
-#define M_CMOVNE_MEMBASE(a,b,c) _DEPR( M_CMOVNE_MEMBASE(a,b,c) )
-#define M_CMOVLT_MEMBASE(a,b,c) _DEPR( M_CMOVLT_MEMBASE(a,b,c) )
-#define M_CMOVLE_MEMBASE(a,b,c) _DEPR( M_CMOVLE_MEMBASE(a,b,c) )
-#define M_CMOVGE_MEMBASE(a,b,c) _DEPR( M_CMOVGE_MEMBASE(a,b,c) )
-#define M_CMOVGT_MEMBASE(a,b,c) _DEPR( M_CMOVGT_MEMBASE(a,b,c) )
-
-#define M_CMOVB(a,b) _DEPR( M_CMOVB(a,b) )
-#define M_CMOVA(a,b) _DEPR( M_CMOVA(a,b) )
-#define M_CMOVP(a,b) _DEPR( M_CMOVP(a,b) )
-
-#define M_PUSH(a) _DEPR( M_PUSH(a) )
-#define M_PUSH_IMM(a) _DEPR( M_PUSH_IMM(a) )
-#define M_POP(a) _DEPR( M_POP(a) )
-
-#define M_JMP_IMM(a) _DEPR( M_JMP_IMM(a) )
-#define M_CALL_IMM(a) _DEPR( M_CALL_IMM(a) )
-
-#define M_FLD32(a,b,disp) _DEPR( M_FLD32(a,b,disp) )
-#define M_DLD32(a,b,disp) _DEPR( M_DLD32(a,b,disp) )
-
-#define M_FST32(a,b,disp) _DEPR( M_FST32(a,b,disp) )
-#define M_DST32(a,b,disp) _DEPR( M_DST32(a,b,disp) )
-
-
-/* system instructions ********************************************************/
-
-#define M_RDTSC _DEPR( M_RDTSC )
-
-#define M_IINC_MEMBASE(a,b) _DEPR( M_IINC_MEMBASE(a,b) )
-
-#define M_IADD_MEMBASE(a,b,c) _DEPR( M_IADD_MEMBASE(a,b,c) )
-#define M_IADC_MEMBASE(a,b,c) _DEPR( M_IADC_MEMBASE(a,b,c) )
-#define M_ISUB_MEMBASE(a,b,c) _DEPR( M_ISUB_MEMBASE(a,b,c) )
-#define M_ISBB_MEMBASE(a,b,c) _DEPR( M_ISBB_MEMBASE(a,b,c) )
-
-#define PROFILE_CYCLE_START
-#define __PROFILE_CYCLE_START _DEPR( __PROFILE_CYCLE_START )
-
-#define PROFILE_CYCLE_STOP
-#define __PROFILE_CYCLE_STOP _DEPR( __PROFILE_CYCLE_STOP )
-
#endif /* _CODEGEN_H */
-
-s4 codegen_reg_of_dst_notzero(jitdata *jd, instruction *iptr, s4 tempregnum);
-
-
/*
* These are local overrides for various environment variables in Emacs.
* Please do not remove this and leave it at the end of the file, where
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