/* src/vm/jit/arm/emit.c - Arm code emitter functions
- Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
- C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
- E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
- J. Wenninger, Institut f. Computersprachen - TU Wien
+ Copyright (C) 1996-2005, 2006, 2007, 2008
+ CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
This file is part of CACAO.
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
02110-1301, USA.
- $Id: emit.c 4398 2006-01-31 23:43:08Z twisti $
-
*/
#include "vm/jit/arm/codegen.h"
-#include "mm/memory.h"
+#include "mm/memory.hpp"
-#include "threads/lock-common.h"
+#include "threads/lock.hpp"
-#include "vm/builtin.h"
-#include "vm/exceptions.h"
#include "vm/global.h"
#include "vm/jit/abi.h"
#include "vm/jit/asmpart.h"
-#include "vm/jit/emit-common.h"
-#include "vm/jit/jit.h"
-#include "vm/jit/patcher-common.h"
-#include "vm/jit/replace.h"
+#include "vm/jit/emit-common.hpp"
+#include "vm/jit/jit.hpp"
+#include "vm/jit/patcher-common.hpp"
+#include "vm/jit/replace.hpp"
+#include "vm/jit/trace.hpp"
+#include "vm/jit/trap.hpp"
-#include "toolbox/logging.h" /* XXX for debugging only */
+#include "toolbox/logging.hpp" /* XXX for debugging only */
/* emit_load *******************************************************************
}
+/**
+ * Emits code updating the condition register by comparing one integer
+ * register to an immediate integer value.
+ */
+void emit_icmp_imm(codegendata* cd, int reg, int32_t value)
+{
+ int32_t disp;
+
+ if (IS_IMM(value)) {
+ M_CMP_IMM(reg, value);
+ } else if (IS_IMM(-value)) {
+ M_CMN_IMM(reg, -value);
+ } else {
+ assert(reg != REG_ITMP3);
+ disp = dseg_add_s4(cd, value);
+ M_DSEG_LOAD(REG_ITMP3, disp);
+ M_CMP(reg, REG_ITMP3);
+ }
+}
+
+
/* emit_branch *****************************************************************
Emits the code for conditional and unconditional branchs.
if (INSTRUCTION_MUST_CHECK(iptr)) {
CHECK_INT_REG(reg);
M_TEQ_IMM(reg, 0);
- M_TRAPEQ(0, EXCEPTION_HARDWARE_ARITHMETIC);
+ M_TRAPEQ(0, TRAP_ArithmeticException);
}
}
{
if (INSTRUCTION_MUST_CHECK(iptr)) {
M_TST(reg, reg);
- M_TRAPEQ(0, EXCEPTION_HARDWARE_NULLPOINTER);
+ M_TRAPEQ(0, TRAP_NullPointerException);
}
}
void emit_nullpointer_check_force(codegendata *cd, instruction *iptr, s4 reg)
{
M_TST(reg, reg);
- M_TRAPEQ(0, EXCEPTION_HARDWARE_NULLPOINTER);
+ M_TRAPEQ(0, TRAP_NullPointerException);
}
if (INSTRUCTION_MUST_CHECK(iptr)) {
M_ILD_INTERN(REG_ITMP3, s1, OFFSET(java_array_t, size));
M_CMP(s2, REG_ITMP3);
- M_TRAPHS(s2, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
+ M_TRAPHS(s2, TRAP_ArrayIndexOutOfBoundsException);
+ }
+}
+
+
+/* emit_arraystore_check *******************************************************
+
+ Emit an ArrayStoreException check.
+
+*******************************************************************************/
+
+void emit_arraystore_check(codegendata *cd, instruction *iptr)
+{
+ if (INSTRUCTION_MUST_CHECK(iptr)) {
+ M_TST(REG_RESULT, REG_RESULT);
+ M_TRAPEQ(0, TRAP_ArrayStoreException);
}
}
if (INSTRUCTION_MUST_CHECK(iptr)) {
switch (condition) {
case BRANCH_EQ:
- M_TRAPEQ(s1, EXCEPTION_HARDWARE_CLASSCAST);
+ M_TRAPEQ(s1, TRAP_ClassCastException);
+ break;
+
+ case BRANCH_NE:
+ M_TRAPNE(s1, TRAP_ClassCastException);
+ break;
+
+ case BRANCH_LT:
+ M_TRAPLT(s1, TRAP_ClassCastException);
break;
case BRANCH_LE:
- M_TRAPLE(s1, EXCEPTION_HARDWARE_CLASSCAST);
+ M_TRAPLE(s1, TRAP_ClassCastException);
break;
case BRANCH_UGT:
- M_TRAPHI(s1, EXCEPTION_HARDWARE_CLASSCAST);
+ M_TRAPHI(s1, TRAP_ClassCastException);
break;
default:
{
if (INSTRUCTION_MUST_CHECK(iptr)) {
M_TST(REG_RESULT, REG_RESULT);
- M_TRAPEQ(0, EXCEPTION_HARDWARE_EXCEPTION);
+ M_TRAPEQ(0, TRAP_CHECK_EXCEPTION);
}
}
+/* emit_trap_compiler **********************************************************
+
+ Emit a trap instruction which calls the JIT compiler.
+
+*******************************************************************************/
+
+void emit_trap_compiler(codegendata *cd)
+{
+ M_TRAP(REG_METHODPTR, TRAP_COMPILER);
+}
+
+
/* emit_trap *******************************************************************
Emit a trap instruction and return the original machine code.
/* Get machine code which is patched back in later. The
trap is 1 instruction word long. */
- mcode = *((u4 *) cd->mcodeptr);
+ mcode = *((uint32_t *) cd->mcodeptr);
- M_TRAP(0, EXCEPTION_HARDWARE_PATCHER);
+ M_TRAP(0, TRAP_PATCHER);
return mcode;
}
+/**
+ * Emit code to recompute the procedure vector.
+ */
+void emit_recompute_pv(codegendata *cd)
+{
+ // This is used to recompute our PV (we use the IP for this) out
+ // of the current PC.
+ int32_t disp = (int32_t) (cd->mcodeptr - cd->mcodebase);
+
+ // We use PC relative addressing.
+ disp += 8;
+
+ // Sanity checks.
+ assert((disp & 0x03) == 0);
+ assert(disp >= 0 && disp <= 0x03ffffff);
+
+ // ATTENTION: If you change this, you have to look at other functions
+ // as well! Following things depend on it: md_codegen_get_pv_from_pc();
+ if (disp > 0x0003ffff) {
+ M_SUB_IMM(REG_PV, REG_PC, IMM_ROTL(disp >> 18, 9));
+ M_SUB_IMM(REG_PV, REG_PV, IMM_ROTL(disp >> 10, 5));
+ M_SUB_IMM(REG_PV, REG_PV, IMM_ROTL(disp >> 2, 1));
+ } else if (disp > 0x000003ff) {
+ M_SUB_IMM(REG_PV, REG_PC, IMM_ROTL(disp >> 10, 5));
+ M_SUB_IMM(REG_PV, REG_PV, IMM_ROTL(disp >> 2, 1));
+ } else {
+ M_SUB_IMM(REG_PV, REG_PC, IMM_ROTL(disp >> 2, 1));
+ }
+}
+
+
+/**
+ * Generates synchronization code to enter a monitor.
+ */
+#if defined(ENABLE_THREADS)
+void emit_monitor_enter(jitdata* jd, int32_t syncslot_offset)
+{
+ int32_t disp;
+
+ // Get required compiler data.
+ methodinfo* m = jd->m;
+ codegendata* cd = jd->cd;
+
+# if !defined(NDEBUG)
+ if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
+ M_STMFD(BITMASK_ARGS, REG_SP);
+ syncslot_offset += 4 * 4;
+ }
+# endif
+
+ /* get the correct lock object */
+
+ if (m->flags & ACC_STATIC) {
+ disp = dseg_add_address(cd, &m->clazz->object.header);
+ M_DSEG_LOAD(REG_A0, disp);
+ }
+ else {
+ emit_nullpointer_check_force(cd, NULL, REG_A0);
+ }
+
+ M_STR(REG_A0, REG_SP, syncslot_offset);
+ disp = dseg_add_functionptr(cd, LOCK_monitor_enter);
+ M_DSEG_BRANCH(disp);
+ emit_recompute_pv(cd);
+
+# if !defined(NDEBUG)
+ if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
+ M_LDMFD(BITMASK_ARGS, REG_SP);
+# endif
+}
+#endif
+
+
+/**
+ * Generates synchronization code to leave a monitor.
+ */
+#if defined(ENABLE_THREADS)
+void emit_monitor_exit(jitdata* jd, int32_t syncslot_offset)
+{
+ int32_t disp;
+
+ // Get required compiler data.
+ methodinfo* m = jd->m;
+ codegendata* cd = jd->cd;
+
+ /* we need to save the proper return value */
+
+ methoddesc* md = m->parseddesc;
+
+ switch (md->returntype.type) {
+ case TYPE_INT:
+ case TYPE_ADR:
+ case TYPE_LNG:
+ case TYPE_FLT: /* XXX TWISTI: is that correct? */
+ case TYPE_DBL:
+ M_STMFD(BITMASK_RESULT, REG_SP);
+ syncslot_offset += 2 * 4;
+ break;
+ }
+
+ M_LDR(REG_A0, REG_SP, syncslot_offset);
+ disp = dseg_add_functionptr(cd, LOCK_monitor_exit);
+ M_DSEG_BRANCH(disp);
+
+ /* we no longer need PV here, no more loading */
+ /*emit_recompute_pv(cd);*/
+
+ switch (md->returntype.type) {
+ case TYPE_INT:
+ case TYPE_ADR:
+ case TYPE_LNG:
+ case TYPE_FLT: /* XXX TWISTI: is that correct? */
+ case TYPE_DBL:
+ M_LDMFD(BITMASK_RESULT, REG_SP);
+ break;
+ }
+}
+#endif
+
+
/* emit_verbosecall_enter ******************************************************
Generates the code for the call trace.
codegendata *cd;
registerdata *rd;
methoddesc *md;
- s4 stackframesize;
s4 disp;
- s4 i, t, s1, s2;
+ s4 i, s;
/* get required compiler data */
md = m->parseddesc;
- /* stackframesize is changed below */
-
- stackframesize = cd->stackframesize;
-
/* mark trace code */
M_NOP;
- /* Save argument registers to stack (including LR and PV). Keep
- stack 8-byte aligned. */
-
- M_STMFD(BITMASK_ARGS | (1<<REG_LR) | (1<<REG_PV), REG_SP);
- M_SUB_IMM(REG_SP, REG_SP, (2 + 2 + 1 + 1) * 4); /* space for a3, a4 and m */
-
- stackframesize += (6 + 2 + 2 + 1 + 1) * 4;
-
- /* prepare args for tracer */
-
- i = md->paramcount - 1;
-
- if (i > 3)
- i = 3;
+ /* Keep stack 8-byte aligned. */
- for (; i >= 0; i--) {
- t = md->paramtypes[i].type;
+ M_STMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
+ M_SUB_IMM(REG_SP, REG_SP, md->paramcount * 8);
- /* load argument into register (s1) and make it of TYPE_LNG */
+ /* save argument registers */
+ for (i = 0; i < md->paramcount; i++) {
if (!md->params[i].inmemory) {
- s1 = md->params[i].regoff;
+ s = md->params[i].regoff;
- if (!IS_2_WORD_TYPE(t)) {
- M_MOV_IMM(REG_ITMP1, 0);
- s1 = PACK_REGS(s1, REG_ITMP1);
- }
- }
- else {
- s1 = REG_ITMP12_PACKED;
- s2 = md->params[i].regoff + stackframesize;
-
- if (IS_2_WORD_TYPE(t))
- M_LLD(s1, REG_SP, s2);
- else {
- M_ILD(GET_LOW_REG(s1), REG_SP, s2);
- M_MOV_IMM(GET_HIGH_REG(s1), 0);
+ switch (md->paramtypes[i].type) {
+ case TYPE_INT:
+ case TYPE_FLT:
+ case TYPE_ADR:
+ M_IST(s, REG_SP, i * 8);
+ break;
+ case TYPE_LNG:
+ case TYPE_DBL:
+ M_LST(s, REG_SP, i * 8);
+ break;
}
}
-
- /* place argument for tracer */
-
- if (i < 2) {
-#if defined(__ARMEL__)
- s2 = PACK_REGS(abi_registers_integer_argument[i * 2],
- abi_registers_integer_argument[i * 2 + 1]);
-#else /* defined(__ARMEB__) */
- s2 = PACK_REGS(abi_registers_integer_argument[i * 2 + 1],
- abi_registers_integer_argument[i * 2]);
-#endif
- M_LNGMOVE(s1, s2);
- }
- else {
- s2 = (i - 2) * 2;
- M_LST(s1, REG_SP, s2 * 4);
- }
}
- /* prepare methodinfo pointer for tracer */
-
disp = dseg_add_address(cd, m);
- M_DSEG_LOAD(REG_ITMP1, disp);
- M_STR_INTERN(REG_ITMP1, REG_SP, 16);
+ M_DSEG_LOAD(REG_A0, disp);
+ M_MOV(REG_A1, REG_SP);
+ M_ADD_IMM(REG_A2, REG_SP, md->paramcount * 8 + 2 * 4 + cd->stackframesize * 8);
+ M_LONGBRANCH(trace_java_call_enter);
- /* call tracer here (we use a long branch) */
+ /* restore argument registers */
- M_LONGBRANCH(builtin_verbosecall_enter);
+ for (i = 0; i < md->paramcount; i++) {
+ if (!md->params[i].inmemory) {
+ s = md->params[i].regoff;
- /* Restore argument registers from stack. Keep stack 8-byte
- aligned. */
+ switch (md->paramtypes[i].type) {
+ case TYPE_INT:
+ case TYPE_FLT:
+ case TYPE_ADR:
+ M_ILD(s, REG_SP, i * 8);
+ break;
+ case TYPE_LNG:
+ case TYPE_DBL:
+ M_LLD(s, REG_SP, i * 8);
+ break;
+ }
+ }
+ }
+
+ /* Keep stack 8-byte aligned. */
- M_ADD_IMM(REG_SP, REG_SP, (2 + 2 + 1 + 1) * 4); /* free argument stack */
- M_LDMFD(BITMASK_ARGS | (1<<REG_LR) | (1<<REG_PV), REG_SP);
+ M_ADD_IMM(REG_SP, REG_SP, md->paramcount * 8);
+ M_LDMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
/* mark trace code */
Generates the code for the call trace.
- void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m);
-
*******************************************************************************/
#if !defined(NDEBUG)
/* Keep stack 8-byte aligned. */
- M_STMFD(BITMASK_RESULT | (1<<REG_LR) | (1<<REG_PV), REG_SP);
- M_SUB_IMM(REG_SP, REG_SP, (1 + 1) * 4); /* space for f and m */
+ M_STMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
+ M_SUB_IMM(REG_SP, REG_SP, 1 * 8);
+
+ /* save return value */
switch (md->returntype.type) {
case TYPE_ADR:
case TYPE_INT:
- M_INTMOVE(REG_RESULT, GET_LOW_REG(REG_A0_A1_PACKED));
- M_MOV_IMM(GET_HIGH_REG(REG_A0_A1_PACKED), 0);
+ case TYPE_FLT:
+ M_IST(REG_RESULT, REG_SP, 0 * 8);
break;
-
case TYPE_LNG:
- M_LNGMOVE(REG_RESULT_PACKED, REG_A0_A1_PACKED);
+ case TYPE_DBL:
+ M_LST(REG_RESULT_PACKED, REG_SP, 0 * 8);
break;
+ }
+
+ disp = dseg_add_address(cd, m);
+ M_DSEG_LOAD(REG_A0, disp);
+ M_MOV(REG_A1, REG_SP);
+ M_LONGBRANCH(trace_java_call_exit);
+ /* restore return value */
+
+ switch (md->returntype.type) {
+ case TYPE_ADR:
+ case TYPE_INT:
case TYPE_FLT:
- M_IST(REG_RESULT, REG_SP, 0 * 4);
+ M_ILD(REG_RESULT, REG_SP, 0 * 8);
break;
-
+ case TYPE_LNG:
case TYPE_DBL:
- M_LNGMOVE(REG_RESULT_PACKED, REG_A2_A3_PACKED);
+ M_LLD(REG_RESULT_PACKED, REG_SP, 0 * 8);
break;
}
- disp = dseg_add_address(cd, m);
- M_DSEG_LOAD(REG_ITMP1, disp);
- M_AST(REG_ITMP1, REG_SP, 1 * 4);
- M_LONGBRANCH(builtin_verbosecall_exit);
-
/* Keep stack 8-byte aligned. */
- M_ADD_IMM(REG_SP, REG_SP, (1 + 1) * 4); /* free argument stack */
- M_LDMFD(BITMASK_RESULT | (1<<REG_LR) | (1<<REG_PV), REG_SP);
+ M_ADD_IMM(REG_SP, REG_SP, 1 * 8);
+ M_LDMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
/* mark trace code */
#endif /* !defined(NDEBUG) */
+/**
+ * Emit profiling code for method frequency counting.
+ * Its slow but working, so be carefull, if you want to use it...
+ */
+#if defined(ENABLE_PROFILING)
+void emit_profile_method(codegendata* cd, codeinfo* code)
+{
+ ICONST(REG_ITMP3,code);
+ M_LDR(REG_ITMP2,REG_ITMP3,OFFSET(codeinfo, frequency));
+ M_ADD_IMM(REG_ITMP2, REG_ITMP2, 1);
+ M_STR(REG_ITMP2,REG_ITMP3,OFFSET(codeinfo, frequency));
+// M_TRAP(0, TRAP_DEBUG);
+}
+
+#endif
+
+/**
+ * Emit profiling code for basicblock frequency counting.
+ * Its slow but working, so be carefull, if you want to use it...
+ */
+#if defined(ENABLE_PROFILING)
+void emit_profile_basicblock(codegendata* cd, codeinfo* code, basicblock* bptr)
+{
+ ICONST(REG_ITMP3,code);
+ M_LDR(REG_ITMP2,REG_ITMP3,OFFSET(codeinfo, bbfrequency));
+ M_ADD_IMM(REG_ITMP2, REG_ITMP2, 1);
+ M_STR(REG_ITMP2,REG_ITMP3,OFFSET(codeinfo, bbfrequency));
+}
+#endif
+
+
+/**
+ * Emit profiling code to start CPU cycle counting.
+ */
+#if defined(ENABLE_PROFILING)
+void emit_profile_cycle_start(codegendata* cd, codeinfo* code)
+{
+ // XXX Not implemented yet!
+}
+#endif
+
+
+/**
+ * Emit profiling code to stop CPU cycle counting.
+ */
+#if defined(ENABLE_PROFILING)
+void emit_profile_cycle_stop(codegendata* cd, codeinfo* code)
+{
+ // XXX Not implemented yet!
+}
+#endif
+
/*
* These are local overrides for various environment variables in Emacs.
* Please do not remove this and leave it at the end of the file, where
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