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Updating FSF address in the code.
[coreboot.git]
/
src
/
southbridge
/
ricoh
/
rl5c476
/
drwxr-xr-x
..
-rw-r--r--
31
Config.lb
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-rw-r--r--
227
chip.h
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5944
rl5c476.c
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-rw-r--r--
1754
rl5c476.h
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