From bad9d0b21ded8a51396371fced77f2ffe8cfe3d8 Mon Sep 17 00:00:00 2001 From: twisti Date: Thu, 27 Apr 2006 12:33:20 +0000 Subject: [PATCH] * src/vm/jit/x86_64/emit.c: Changed x86_64 function prefix to emit. And some other stuff too. * src/vm/jit/x86_64/md-emit.h: Likewise. * src/vm/jit/x86_64/codegen.c: Likewise. * src/vm/jit/x86_64/codegen.h: Likewise. --- src/vm/jit/x86_64/codegen.c | 811 +++++++++++----------- src/vm/jit/x86_64/codegen.h | 393 +++-------- src/vm/jit/x86_64/emit.c | 1312 ++++++++++++++++++----------------- src/vm/jit/x86_64/md-emit.h | 550 ++++++++++----- 4 files changed, 1562 insertions(+), 1504 deletions(-) diff --git a/src/vm/jit/x86_64/codegen.c b/src/vm/jit/x86_64/codegen.c index ef24f8771..031852fa7 100644 --- a/src/vm/jit/x86_64/codegen.c +++ b/src/vm/jit/x86_64/codegen.c @@ -30,7 +30,7 @@ Changes: Christian Ullrich Edwin Steiner - $Id: codegen.c 4826 2006-04-24 16:06:16Z twisti $ + $Id: codegen.c 4853 2006-04-27 12:33:20Z twisti $ */ @@ -338,11 +338,10 @@ bool codegen(jitdata *jd) following integer registers. */ if (IS_FLT_DBL_TYPE(md->paramtypes[p].type)) { - for (s1 = INT_ARG_CNT - 2; s1 >= p; s1--) { + for (s1 = INT_ARG_CNT - 2; s1 >= p; s1--) M_MOV(rd->argintregs[s1], rd->argintregs[s1 + 1]); - } - x86_64_movd_freg_reg(cd, rd->argfltregs[l], rd->argintregs[p]); + emit_movd_freg_reg(cd, rd->argfltregs[l], rd->argintregs[p]); l++; } } @@ -438,10 +437,10 @@ bool codegen(jitdata *jd) if (bptr->type == BBTYPE_SBR) { /* d = reg_of_var(rd, src, REG_ITMP1); */ if (!(src->flags & INMEMORY)) - d= src->regoff; + d = src->regoff; else - d=REG_ITMP1; - x86_64_pop_reg(cd, d); + d = REG_ITMP1; + M_POP(d); emit_store(jd, NULL, src, d); } else if (bptr->type == BBTYPE_EXH) { @@ -560,7 +559,7 @@ bool codegen(jitdata *jd) d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1); disp = dseg_addfloat(cd, iptr->val.f); - x86_64_movdl_membase_reg(cd, RIP, -(((s8) cd->mcodeptr + ((d > 7) ? 9 : 8)) - (s8) cd->mcodebase) + disp, d); + emit_movdl_membase_reg(cd, RIP, -(((s8) cd->mcodeptr + ((d > 7) ? 9 : 8)) - (s8) cd->mcodebase) + disp, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -569,7 +568,7 @@ bool codegen(jitdata *jd) d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1); disp = dseg_adddouble(cd, iptr->val.d); - x86_64_movd_membase_reg(cd, RIP, -(((s8) cd->mcodeptr + 9) - (s8) cd->mcodebase) + disp, d); + emit_movd_membase_reg(cd, RIP, -(((s8) cd->mcodeptr + 9) - (s8) cd->mcodebase) + disp, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -758,8 +757,17 @@ bool codegen(jitdata *jd) /* integer operations *************************************************/ +#define RISC_STYLE 1 + case ICMD_INEG: /* ..., value ==> ..., - value */ +#if RISC_STYLE + s1 = emit_load_s1(jd, iptr, src, REG_ITMP1); + d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1); + M_INTMOVE(s1, d); + M_INEG(d); + emit_store(jd, iptr, iptr->dst, d); +#else d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY) { if (src->flags & INMEMORY) { @@ -786,10 +794,18 @@ bool codegen(jitdata *jd) M_INEG(iptr->dst->regoff); } } +#endif break; case ICMD_LNEG: /* ..., value ==> ..., - value */ +#if RISC_STYLE + s1 = emit_load_s1(jd, iptr, src, REG_ITMP1); + d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1); + M_INTMOVE(s1, d); + M_LNEG(d); + emit_store(jd, iptr, iptr->dst, d); +#else d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY) { if (src->flags & INMEMORY) { @@ -816,24 +832,23 @@ bool codegen(jitdata *jd) M_LNEG(iptr->dst->regoff); } } +#endif break; case ICMD_I2L: /* ..., value ==> ..., value */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP3); - if (src->flags & INMEMORY) { - x86_64_movslq_membase_reg(cd, REG_SP, src->regoff * 8, d); - - } else { - x86_64_movslq_reg_reg(cd, src->regoff, d); - } + if (src->flags & INMEMORY) + M_ISEXT_MEMBASE(REG_SP, src->regoff * 8, d); + else + M_ISEXT(src->regoff, d); emit_store(jd, iptr, iptr->dst, d); break; case ICMD_L2I: /* ..., value ==> ..., value */ s1 = emit_load_s1(jd, iptr, src, REG_ITMP1); - d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP3); + d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1); M_INTMOVE(s1, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -841,64 +856,73 @@ bool codegen(jitdata *jd) case ICMD_INT2BYTE: /* ..., value ==> ..., value */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP3); - if (src->flags & INMEMORY) { - x86_64_movsbq_membase_reg(cd, REG_SP, src->regoff * 8, d); - - } else { - x86_64_movsbq_reg_reg(cd, src->regoff, d); - } + if (src->flags & INMEMORY) + M_BSEXT_MEMBASE(REG_SP, src->regoff * 8, d); + else + M_BSEXT(src->regoff, d); emit_store(jd, iptr, iptr->dst, d); break; case ICMD_INT2CHAR: /* ..., value ==> ..., value */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP3); - if (src->flags & INMEMORY) { - x86_64_movzwq_membase_reg(cd, REG_SP, src->regoff * 8, d); - - } else { - x86_64_movzwq_reg_reg(cd, src->regoff, d); - } + if (src->flags & INMEMORY) + M_CZEXT_MEMBASE(REG_SP, src->regoff * 8, d); + else + M_CZEXT(src->regoff, d); emit_store(jd, iptr, iptr->dst, d); break; case ICMD_INT2SHORT: /* ..., value ==> ..., value */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP3); - if (src->flags & INMEMORY) { - x86_64_movswq_membase_reg(cd, REG_SP, src->regoff * 8, d); - - } else { - x86_64_movswq_reg_reg(cd, src->regoff, d); - } + if (src->flags & INMEMORY) + M_SSEXT_MEMBASE(REG_SP, src->regoff * 8, d); + else + M_SSEXT(src->regoff, d); emit_store(jd, iptr, iptr->dst, d); break; case ICMD_IADD: /* ..., val1, val2 ==> ..., val1 + val2 */ +#if RISC_STYLE + s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1); + s2 = emit_load_s2(jd, iptr, src, REG_ITMP2); + d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2); + if (s1 == d) + M_IADD(s2, d); + else if (s2 == d) + M_IADD(s1, d); + else { + M_INTMOVE(s1, d); + M_IADD(s2, d); + } + emit_store(jd, iptr, iptr->dst, d); +#else d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_ialu(cd, X86_64_ADD, src, iptr); + emit_ialu(cd, ALU_ADD, src, iptr); +#endif break; case ICMD_IADDCONST: /* ..., value ==> ..., value + constant */ /* val.i = constant */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_ialuconst(cd, X86_64_ADD, src, iptr); + emit_ialuconst(cd, ALU_ADD, src, iptr); break; case ICMD_LADD: /* ..., val1, val2 ==> ..., val1 + val2 */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_lalu(cd, X86_64_ADD, src, iptr); + emit_lalu(cd, ALU_ADD, src, iptr); break; case ICMD_LADDCONST: /* ..., value ==> ..., value + constant */ /* val.l = constant */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_laluconst(cd, X86_64_ADD, src, iptr); + emit_laluconst(cd, ALU_ADD, src, iptr); break; case ICMD_ISUB: /* ..., val1, val2 ==> ..., val1 - val2 */ @@ -907,66 +931,66 @@ bool codegen(jitdata *jd) if (iptr->dst->flags & INMEMORY) { if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { if (src->prev->regoff == iptr->dst->regoff) { - x86_64_movl_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); - x86_64_alul_reg_membase(cd, X86_64_SUB, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + emit_movl_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + emit_alul_reg_membase(cd, ALU_SUB, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } else { - x86_64_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); - x86_64_alul_membase_reg(cd, X86_64_SUB, REG_SP, src->regoff * 8, REG_ITMP1); - x86_64_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + emit_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); + emit_alul_membase_reg(cd, ALU_SUB, REG_SP, src->regoff * 8, REG_ITMP1); + emit_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { M_INTMOVE(src->prev->regoff, REG_ITMP1); - x86_64_alul_membase_reg(cd, X86_64_SUB, REG_SP, src->regoff * 8, REG_ITMP1); - x86_64_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + emit_alul_membase_reg(cd, ALU_SUB, REG_SP, src->regoff * 8, REG_ITMP1); + emit_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { if (src->prev->regoff == iptr->dst->regoff) { - x86_64_alul_reg_membase(cd, X86_64_SUB, src->regoff, REG_SP, iptr->dst->regoff * 8); + emit_alul_reg_membase(cd, ALU_SUB, src->regoff, REG_SP, iptr->dst->regoff * 8); } else { - x86_64_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); - x86_64_alul_reg_reg(cd, X86_64_SUB, src->regoff, REG_ITMP1); - x86_64_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + emit_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); + emit_alul_reg_reg(cd, ALU_SUB, src->regoff, REG_ITMP1); + emit_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } } else { - x86_64_movl_reg_membase(cd, src->prev->regoff, REG_SP, iptr->dst->regoff * 8); - x86_64_alul_reg_membase(cd, X86_64_SUB, src->regoff, REG_SP, iptr->dst->regoff * 8); + emit_movl_reg_membase(cd, src->prev->regoff, REG_SP, iptr->dst->regoff * 8); + emit_alul_reg_membase(cd, ALU_SUB, src->regoff, REG_SP, iptr->dst->regoff * 8); } } else { if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - x86_64_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, d); - x86_64_alul_membase_reg(cd, X86_64_SUB, REG_SP, src->regoff * 8, d); + emit_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, d); + emit_alul_membase_reg(cd, ALU_SUB, REG_SP, src->regoff * 8, d); } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { M_INTMOVE(src->prev->regoff, d); - x86_64_alul_membase_reg(cd, X86_64_SUB, REG_SP, src->regoff * 8, d); + emit_alul_membase_reg(cd, ALU_SUB, REG_SP, src->regoff * 8, d); } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { /* workaround for reg alloc */ if (src->regoff == iptr->dst->regoff) { - x86_64_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); - x86_64_alul_reg_reg(cd, X86_64_SUB, src->regoff, REG_ITMP1); + emit_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); + emit_alul_reg_reg(cd, ALU_SUB, src->regoff, REG_ITMP1); M_INTMOVE(REG_ITMP1, d); } else { - x86_64_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, d); - x86_64_alul_reg_reg(cd, X86_64_SUB, src->regoff, d); + emit_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, d); + emit_alul_reg_reg(cd, ALU_SUB, src->regoff, d); } } else { /* workaround for reg alloc */ if (src->regoff == iptr->dst->regoff) { M_INTMOVE(src->prev->regoff, REG_ITMP1); - x86_64_alul_reg_reg(cd, X86_64_SUB, src->regoff, REG_ITMP1); + emit_alul_reg_reg(cd, ALU_SUB, src->regoff, REG_ITMP1); M_INTMOVE(REG_ITMP1, d); } else { M_INTMOVE(src->prev->regoff, d); - x86_64_alul_reg_reg(cd, X86_64_SUB, src->regoff, d); + emit_alul_reg_reg(cd, ALU_SUB, src->regoff, d); } } } @@ -976,7 +1000,7 @@ bool codegen(jitdata *jd) /* val.i = constant */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_ialuconst(cd, X86_64_SUB, src, iptr); + emit_ialuconst(cd, ALU_SUB, src, iptr); break; case ICMD_LSUB: /* ..., val1, val2 ==> ..., val1 - val2 */ @@ -985,66 +1009,66 @@ bool codegen(jitdata *jd) if (iptr->dst->flags & INMEMORY) { if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { if (src->prev->regoff == iptr->dst->regoff) { - x86_64_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); - x86_64_alu_reg_membase(cd, X86_64_SUB, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + emit_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + emit_alu_reg_membase(cd, ALU_SUB, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } else { - x86_64_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); - x86_64_alu_membase_reg(cd, X86_64_SUB, REG_SP, src->regoff * 8, REG_ITMP1); - x86_64_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + emit_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); + emit_alu_membase_reg(cd, ALU_SUB, REG_SP, src->regoff * 8, REG_ITMP1); + emit_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { M_INTMOVE(src->prev->regoff, REG_ITMP1); - x86_64_alu_membase_reg(cd, X86_64_SUB, REG_SP, src->regoff * 8, REG_ITMP1); - x86_64_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + emit_alu_membase_reg(cd, ALU_SUB, REG_SP, src->regoff * 8, REG_ITMP1); + emit_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { if (src->prev->regoff == iptr->dst->regoff) { - x86_64_alu_reg_membase(cd, X86_64_SUB, src->regoff, REG_SP, iptr->dst->regoff * 8); + emit_alu_reg_membase(cd, ALU_SUB, src->regoff, REG_SP, iptr->dst->regoff * 8); } else { - x86_64_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); - x86_64_alu_reg_reg(cd, X86_64_SUB, src->regoff, REG_ITMP1); - x86_64_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + emit_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); + emit_alu_reg_reg(cd, ALU_SUB, src->regoff, REG_ITMP1); + emit_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } } else { - x86_64_mov_reg_membase(cd, src->prev->regoff, REG_SP, iptr->dst->regoff * 8); - x86_64_alu_reg_membase(cd, X86_64_SUB, src->regoff, REG_SP, iptr->dst->regoff * 8); + emit_mov_reg_membase(cd, src->prev->regoff, REG_SP, iptr->dst->regoff * 8); + emit_alu_reg_membase(cd, ALU_SUB, src->regoff, REG_SP, iptr->dst->regoff * 8); } } else { if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - x86_64_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, d); - x86_64_alu_membase_reg(cd, X86_64_SUB, REG_SP, src->regoff * 8, d); + emit_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, d); + emit_alu_membase_reg(cd, ALU_SUB, REG_SP, src->regoff * 8, d); } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { M_INTMOVE(src->prev->regoff, d); - x86_64_alu_membase_reg(cd, X86_64_SUB, REG_SP, src->regoff * 8, d); + emit_alu_membase_reg(cd, ALU_SUB, REG_SP, src->regoff * 8, d); } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { /* workaround for reg alloc */ if (src->regoff == iptr->dst->regoff) { - x86_64_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); - x86_64_alu_reg_reg(cd, X86_64_SUB, src->regoff, REG_ITMP1); + emit_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); + emit_alu_reg_reg(cd, ALU_SUB, src->regoff, REG_ITMP1); M_INTMOVE(REG_ITMP1, d); } else { - x86_64_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, d); - x86_64_alu_reg_reg(cd, X86_64_SUB, src->regoff, d); + emit_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, d); + emit_alu_reg_reg(cd, ALU_SUB, src->regoff, d); } } else { /* workaround for reg alloc */ if (src->regoff == iptr->dst->regoff) { M_INTMOVE(src->prev->regoff, REG_ITMP1); - x86_64_alu_reg_reg(cd, X86_64_SUB, src->regoff, REG_ITMP1); + emit_alu_reg_reg(cd, ALU_SUB, src->regoff, REG_ITMP1); M_INTMOVE(REG_ITMP1, d); } else { M_INTMOVE(src->prev->regoff, d); - x86_64_alu_reg_reg(cd, X86_64_SUB, src->regoff, d); + emit_alu_reg_reg(cd, ALU_SUB, src->regoff, d); } } } @@ -1054,7 +1078,7 @@ bool codegen(jitdata *jd) /* val.l = constant */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_laluconst(cd, X86_64_SUB, src, iptr); + emit_laluconst(cd, ALU_SUB, src, iptr); break; case ICMD_IMUL: /* ..., val1, val2 ==> ..., val1 * val2 */ @@ -1062,46 +1086,46 @@ bool codegen(jitdata *jd) d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY) { if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - x86_64_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); - x86_64_imull_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); - x86_64_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + emit_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); + emit_imull_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + emit_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { - x86_64_movl_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); - x86_64_imull_reg_reg(cd, src->prev->regoff, REG_ITMP1); - x86_64_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + emit_movl_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + emit_imull_reg_reg(cd, src->prev->regoff, REG_ITMP1); + emit_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - x86_64_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); - x86_64_imull_reg_reg(cd, src->regoff, REG_ITMP1); - x86_64_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + emit_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); + emit_imull_reg_reg(cd, src->regoff, REG_ITMP1); + emit_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } else { M_INTMOVE(src->prev->regoff, REG_ITMP1); - x86_64_imull_reg_reg(cd, src->regoff, REG_ITMP1); - x86_64_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + emit_imull_reg_reg(cd, src->regoff, REG_ITMP1); + emit_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } } else { if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - x86_64_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, iptr->dst->regoff); - x86_64_imull_membase_reg(cd, REG_SP, src->regoff * 8, iptr->dst->regoff); + emit_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, iptr->dst->regoff); + emit_imull_membase_reg(cd, REG_SP, src->regoff * 8, iptr->dst->regoff); } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { M_INTMOVE(src->prev->regoff, iptr->dst->regoff); - x86_64_imull_membase_reg(cd, REG_SP, src->regoff * 8, iptr->dst->regoff); + emit_imull_membase_reg(cd, REG_SP, src->regoff * 8, iptr->dst->regoff); } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { M_INTMOVE(src->regoff, iptr->dst->regoff); - x86_64_imull_membase_reg(cd, REG_SP, src->prev->regoff * 8, iptr->dst->regoff); + emit_imull_membase_reg(cd, REG_SP, src->prev->regoff * 8, iptr->dst->regoff); } else { if (src->regoff == iptr->dst->regoff) { - x86_64_imull_reg_reg(cd, src->prev->regoff, iptr->dst->regoff); + emit_imull_reg_reg(cd, src->prev->regoff, iptr->dst->regoff); } else { M_INTMOVE(src->prev->regoff, iptr->dst->regoff); - x86_64_imull_reg_reg(cd, src->regoff, iptr->dst->regoff); + emit_imull_reg_reg(cd, src->regoff, iptr->dst->regoff); } } } @@ -1113,25 +1137,25 @@ bool codegen(jitdata *jd) d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY) { if (src->flags & INMEMORY) { - x86_64_imull_imm_membase_reg(cd, iptr->val.i, REG_SP, src->regoff * 8, REG_ITMP1); - x86_64_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + emit_imull_imm_membase_reg(cd, iptr->val.i, REG_SP, src->regoff * 8, REG_ITMP1); + emit_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } else { - x86_64_imull_imm_reg_reg(cd, iptr->val.i, src->regoff, REG_ITMP1); - x86_64_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + emit_imull_imm_reg_reg(cd, iptr->val.i, src->regoff, REG_ITMP1); + emit_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } } else { if (src->flags & INMEMORY) { - x86_64_imull_imm_membase_reg(cd, iptr->val.i, REG_SP, src->regoff * 8, iptr->dst->regoff); + emit_imull_imm_membase_reg(cd, iptr->val.i, REG_SP, src->regoff * 8, iptr->dst->regoff); } else { if (iptr->val.i == 2) { M_INTMOVE(src->regoff, iptr->dst->regoff); - x86_64_alul_reg_reg(cd, X86_64_ADD, iptr->dst->regoff, iptr->dst->regoff); + emit_alul_reg_reg(cd, ALU_ADD, iptr->dst->regoff, iptr->dst->regoff); } else { - x86_64_imull_imm_reg_reg(cd, iptr->val.i, src->regoff, iptr->dst->regoff); /* 3 cycles */ + emit_imull_imm_reg_reg(cd, iptr->val.i, src->regoff, iptr->dst->regoff); /* 3 cycles */ } } } @@ -1142,46 +1166,46 @@ bool codegen(jitdata *jd) d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY) { if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - x86_64_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); - x86_64_imul_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); - x86_64_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + emit_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); + emit_imul_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + emit_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { - x86_64_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); - x86_64_imul_reg_reg(cd, src->prev->regoff, REG_ITMP1); - x86_64_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + emit_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + emit_imul_reg_reg(cd, src->prev->regoff, REG_ITMP1); + emit_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - x86_64_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); - x86_64_imul_reg_reg(cd, src->regoff, REG_ITMP1); - x86_64_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + emit_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); + emit_imul_reg_reg(cd, src->regoff, REG_ITMP1); + emit_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } else { - x86_64_mov_reg_reg(cd, src->prev->regoff, REG_ITMP1); - x86_64_imul_reg_reg(cd, src->regoff, REG_ITMP1); - x86_64_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + emit_mov_reg_reg(cd, src->prev->regoff, REG_ITMP1); + emit_imul_reg_reg(cd, src->regoff, REG_ITMP1); + emit_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } } else { if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - x86_64_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, iptr->dst->regoff); - x86_64_imul_membase_reg(cd, REG_SP, src->regoff * 8, iptr->dst->regoff); + emit_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, iptr->dst->regoff); + emit_imul_membase_reg(cd, REG_SP, src->regoff * 8, iptr->dst->regoff); } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { M_INTMOVE(src->prev->regoff, iptr->dst->regoff); - x86_64_imul_membase_reg(cd, REG_SP, src->regoff * 8, iptr->dst->regoff); + emit_imul_membase_reg(cd, REG_SP, src->regoff * 8, iptr->dst->regoff); } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { M_INTMOVE(src->regoff, iptr->dst->regoff); - x86_64_imul_membase_reg(cd, REG_SP, src->prev->regoff * 8, iptr->dst->regoff); + emit_imul_membase_reg(cd, REG_SP, src->prev->regoff * 8, iptr->dst->regoff); } else { if (src->regoff == iptr->dst->regoff) { - x86_64_imul_reg_reg(cd, src->prev->regoff, iptr->dst->regoff); + emit_imul_reg_reg(cd, src->prev->regoff, iptr->dst->regoff); } else { M_INTMOVE(src->prev->regoff, iptr->dst->regoff); - x86_64_imul_reg_reg(cd, src->regoff, iptr->dst->regoff); + emit_imul_reg_reg(cd, src->regoff, iptr->dst->regoff); } } } @@ -1194,49 +1218,49 @@ bool codegen(jitdata *jd) if (iptr->dst->flags & INMEMORY) { if (src->flags & INMEMORY) { if (IS_IMM32(iptr->val.l)) { - x86_64_imul_imm_membase_reg(cd, iptr->val.l, REG_SP, src->regoff * 8, REG_ITMP1); + emit_imul_imm_membase_reg(cd, iptr->val.l, REG_SP, src->regoff * 8, REG_ITMP1); } else { - x86_64_mov_imm_reg(cd, iptr->val.l, REG_ITMP1); - x86_64_imul_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + emit_mov_imm_reg(cd, iptr->val.l, REG_ITMP1); + emit_imul_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); } - x86_64_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + emit_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } else { if (IS_IMM32(iptr->val.l)) { - x86_64_imul_imm_reg_reg(cd, iptr->val.l, src->regoff, REG_ITMP1); + emit_imul_imm_reg_reg(cd, iptr->val.l, src->regoff, REG_ITMP1); } else { - x86_64_mov_imm_reg(cd, iptr->val.l, REG_ITMP1); - x86_64_imul_reg_reg(cd, src->regoff, REG_ITMP1); + emit_mov_imm_reg(cd, iptr->val.l, REG_ITMP1); + emit_imul_reg_reg(cd, src->regoff, REG_ITMP1); } - x86_64_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + emit_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } } else { if (src->flags & INMEMORY) { if (IS_IMM32(iptr->val.l)) { - x86_64_imul_imm_membase_reg(cd, iptr->val.l, REG_SP, src->regoff * 8, iptr->dst->regoff); + emit_imul_imm_membase_reg(cd, iptr->val.l, REG_SP, src->regoff * 8, iptr->dst->regoff); } else { - x86_64_mov_imm_reg(cd, iptr->val.l, iptr->dst->regoff); - x86_64_imul_membase_reg(cd, REG_SP, src->regoff * 8, iptr->dst->regoff); + emit_mov_imm_reg(cd, iptr->val.l, iptr->dst->regoff); + emit_imul_membase_reg(cd, REG_SP, src->regoff * 8, iptr->dst->regoff); } } else { /* should match in many cases */ if (iptr->val.l == 2) { M_INTMOVE(src->regoff, iptr->dst->regoff); - x86_64_alul_reg_reg(cd, X86_64_ADD, iptr->dst->regoff, iptr->dst->regoff); + emit_alul_reg_reg(cd, ALU_ADD, iptr->dst->regoff, iptr->dst->regoff); } else { if (IS_IMM32(iptr->val.l)) { - x86_64_imul_imm_reg_reg(cd, iptr->val.l, src->regoff, iptr->dst->regoff); /* 4 cycles */ + emit_imul_imm_reg_reg(cd, iptr->val.l, src->regoff, iptr->dst->regoff); /* 4 cycles */ } else { - x86_64_mov_imm_reg(cd, iptr->val.l, REG_ITMP1); + emit_mov_imm_reg(cd, iptr->val.l, REG_ITMP1); M_INTMOVE(src->regoff, iptr->dst->regoff); - x86_64_imul_reg_reg(cd, REG_ITMP1, iptr->dst->regoff); + emit_imul_reg_reg(cd, REG_ITMP1, iptr->dst->regoff); } } } @@ -1247,38 +1271,38 @@ bool codegen(jitdata *jd) d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); if (src->prev->flags & INMEMORY) { - x86_64_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, RAX); + emit_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, RAX); } else { M_INTMOVE(src->prev->regoff, RAX); } if (src->flags & INMEMORY) { - x86_64_movl_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP3); + emit_movl_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP3); } else { M_INTMOVE(src->regoff, REG_ITMP3); } gen_div_check(src); - x86_64_alul_imm_reg(cd, X86_64_CMP, 0x80000000, RAX); /* check as described in jvm spec */ - x86_64_jcc(cd, X86_64_CC_NE, 4 + 6); - x86_64_alul_imm_reg(cd, X86_64_CMP, -1, REG_ITMP3); /* 4 bytes */ - x86_64_jcc(cd, X86_64_CC_E, 3 + 1 + 3); /* 6 bytes */ + emit_alul_imm_reg(cd, ALU_CMP, 0x80000000, RAX); /* check as described in jvm spec */ + emit_jcc(cd, CC_NE, 4 + 6); + emit_alul_imm_reg(cd, ALU_CMP, -1, REG_ITMP3); /* 4 bytes */ + emit_jcc(cd, CC_E, 3 + 1 + 3); /* 6 bytes */ - x86_64_mov_reg_reg(cd, RDX, REG_ITMP2); /* save %rdx, cause it's an argument register */ - x86_64_cltd(cd); - x86_64_idivl_reg(cd, REG_ITMP3); + emit_mov_reg_reg(cd, RDX, REG_ITMP2); /* save %rdx, cause it's an argument register */ + emit_cltd(cd); + emit_idivl_reg(cd, REG_ITMP3); if (iptr->dst->flags & INMEMORY) { - x86_64_mov_reg_membase(cd, RAX, REG_SP, iptr->dst->regoff * 8); - x86_64_mov_reg_reg(cd, REG_ITMP2, RDX); /* restore %rdx */ + emit_mov_reg_membase(cd, RAX, REG_SP, iptr->dst->regoff * 8); + emit_mov_reg_reg(cd, REG_ITMP2, RDX); /* restore %rdx */ } else { M_INTMOVE(RAX, iptr->dst->regoff); if (iptr->dst->regoff != RDX) { - x86_64_mov_reg_reg(cd, REG_ITMP2, RDX); /* restore %rdx */ + emit_mov_reg_reg(cd, REG_ITMP2, RDX); /* restore %rdx */ } } break; @@ -1286,42 +1310,42 @@ bool codegen(jitdata *jd) case ICMD_IREM: /* ..., val1, val2 ==> ..., val1 % val2 */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); if (src->prev->flags & INMEMORY) { - x86_64_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, RAX); + emit_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, RAX); } else { M_INTMOVE(src->prev->regoff, RAX); } if (src->flags & INMEMORY) { - x86_64_movl_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP3); + emit_movl_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP3); } else { M_INTMOVE(src->regoff, REG_ITMP3); } gen_div_check(src); - x86_64_mov_reg_reg(cd, RDX, REG_ITMP2); /* save %rdx, cause it's an argument register */ + emit_mov_reg_reg(cd, RDX, REG_ITMP2); /* save %rdx, cause it's an argument register */ - x86_64_alul_imm_reg(cd, X86_64_CMP, 0x80000000, RAX); /* check as described in jvm spec */ - x86_64_jcc(cd, X86_64_CC_NE, 2 + 4 + 6); + emit_alul_imm_reg(cd, ALU_CMP, 0x80000000, RAX); /* check as described in jvm spec */ + emit_jcc(cd, CC_NE, 2 + 4 + 6); - x86_64_alul_reg_reg(cd, X86_64_XOR, RDX, RDX); /* 2 bytes */ - x86_64_alul_imm_reg(cd, X86_64_CMP, -1, REG_ITMP3); /* 4 bytes */ - x86_64_jcc(cd, X86_64_CC_E, 1 + 3); /* 6 bytes */ + emit_alul_reg_reg(cd, ALU_XOR, RDX, RDX); /* 2 bytes */ + emit_alul_imm_reg(cd, ALU_CMP, -1, REG_ITMP3); /* 4 bytes */ + emit_jcc(cd, CC_E, 1 + 3); /* 6 bytes */ - x86_64_cltd(cd); - x86_64_idivl_reg(cd, REG_ITMP3); + emit_cltd(cd); + emit_idivl_reg(cd, REG_ITMP3); if (iptr->dst->flags & INMEMORY) { - x86_64_mov_reg_membase(cd, RDX, REG_SP, iptr->dst->regoff * 8); - x86_64_mov_reg_reg(cd, REG_ITMP2, RDX); /* restore %rdx */ + emit_mov_reg_membase(cd, RDX, REG_SP, iptr->dst->regoff * 8); + emit_mov_reg_reg(cd, REG_ITMP2, RDX); /* restore %rdx */ } else { M_INTMOVE(RDX, iptr->dst->regoff); if (iptr->dst->regoff != RDX) { - x86_64_mov_reg_reg(cd, REG_ITMP2, RDX); /* restore %rdx */ + emit_mov_reg_reg(cd, REG_ITMP2, RDX); /* restore %rdx */ } } break; @@ -1332,11 +1356,11 @@ bool codegen(jitdata *jd) s1 = emit_load_s1(jd, iptr, src, REG_ITMP1); d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP3); M_INTMOVE(s1, REG_ITMP1); - x86_64_alul_imm_reg(cd, X86_64_CMP, -1, REG_ITMP1); - x86_64_leal_membase_reg(cd, REG_ITMP1, (1 << iptr->val.i) - 1, REG_ITMP2); - x86_64_cmovccl_reg_reg(cd, X86_64_CC_LE, REG_ITMP2, REG_ITMP1); - x86_64_shiftl_imm_reg(cd, X86_64_SAR, iptr->val.i, REG_ITMP1); - x86_64_mov_reg_reg(cd, REG_ITMP1, d); + emit_alul_imm_reg(cd, ALU_CMP, -1, REG_ITMP1); + emit_leal_membase_reg(cd, REG_ITMP1, (1 << iptr->val.i) - 1, REG_ITMP2); + emit_cmovccl_reg_reg(cd, CC_LE, REG_ITMP2, REG_ITMP1); + emit_shiftl_imm_reg(cd, SHIFT_SAR, iptr->val.i, REG_ITMP1); + emit_mov_reg_reg(cd, REG_ITMP1, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -1346,12 +1370,12 @@ bool codegen(jitdata *jd) s1 = emit_load_s1(jd, iptr, src, REG_ITMP1); d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP3); M_INTMOVE(s1, REG_ITMP1); - x86_64_alul_imm_reg(cd, X86_64_CMP, -1, REG_ITMP1); - x86_64_leal_membase_reg(cd, REG_ITMP1, iptr->val.i, REG_ITMP2); - x86_64_cmovccl_reg_reg(cd, X86_64_CC_G, REG_ITMP1, REG_ITMP2); - x86_64_alul_imm_reg(cd, X86_64_AND, -1 - (iptr->val.i), REG_ITMP2); - x86_64_alul_reg_reg(cd, X86_64_SUB, REG_ITMP2, REG_ITMP1); - x86_64_mov_reg_reg(cd, REG_ITMP1, d); + emit_alul_imm_reg(cd, ALU_CMP, -1, REG_ITMP1); + emit_leal_membase_reg(cd, REG_ITMP1, iptr->val.i, REG_ITMP2); + emit_cmovccl_reg_reg(cd, CC_G, REG_ITMP1, REG_ITMP2); + emit_alul_imm_reg(cd, ALU_AND, -1 - (iptr->val.i), REG_ITMP2); + emit_alul_reg_reg(cd, ALU_SUB, REG_ITMP2, REG_ITMP1); + emit_mov_reg_reg(cd, REG_ITMP1, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -1383,8 +1407,8 @@ bool codegen(jitdata *jd) M_BEQ(3 + 2 + 3); /* 6 bytes */ M_MOV(RDX, REG_ITMP2); /* save %rdx, cause it's an argument register */ - x86_64_cqto(cd); - x86_64_idiv_reg(cd, REG_ITMP3); + emit_cqto(cd); + emit_idiv_reg(cd, REG_ITMP3); if (iptr->dst->flags & INMEMORY) { M_LST(RAX, REG_SP, iptr->dst->regoff * 8); @@ -1425,14 +1449,14 @@ bool codegen(jitdata *jd) M_BNE(3 + 4 + 6); #if 0 - x86_64_alul_reg_reg(cd, X86_64_XOR, RDX, RDX); /* 2 bytes */ + emit_alul_reg_reg(cd, ALU_XOR, RDX, RDX); /* 2 bytes */ #endif M_XOR(RDX, RDX); /* 3 bytes */ M_CMP_IMM(-1, REG_ITMP3); /* 4 bytes */ M_BEQ(2 + 3); /* 6 bytes */ - x86_64_cqto(cd); - x86_64_idiv_reg(cd, REG_ITMP3); + emit_cqto(cd); + emit_idiv_reg(cd, REG_ITMP3); if (iptr->dst->flags & INMEMORY) { M_LST(RDX, REG_SP, iptr->dst->regoff * 8); @@ -1453,11 +1477,11 @@ bool codegen(jitdata *jd) s1 = emit_load_s1(jd, iptr, src, REG_ITMP1); d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP3); M_INTMOVE(s1, REG_ITMP1); - x86_64_alu_imm_reg(cd, X86_64_CMP, -1, REG_ITMP1); - x86_64_lea_membase_reg(cd, REG_ITMP1, (1 << iptr->val.i) - 1, REG_ITMP2); - x86_64_cmovcc_reg_reg(cd, X86_64_CC_LE, REG_ITMP2, REG_ITMP1); - x86_64_shift_imm_reg(cd, X86_64_SAR, iptr->val.i, REG_ITMP1); - x86_64_mov_reg_reg(cd, REG_ITMP1, d); + emit_alu_imm_reg(cd, ALU_CMP, -1, REG_ITMP1); + emit_lea_membase_reg(cd, REG_ITMP1, (1 << iptr->val.i) - 1, REG_ITMP2); + emit_cmovcc_reg_reg(cd, CC_LE, REG_ITMP2, REG_ITMP1); + emit_shift_imm_reg(cd, SHIFT_SAR, iptr->val.i, REG_ITMP1); + emit_mov_reg_reg(cd, REG_ITMP1, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -1467,169 +1491,169 @@ bool codegen(jitdata *jd) s1 = emit_load_s1(jd, iptr, src, REG_ITMP1); d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP3); M_INTMOVE(s1, REG_ITMP1); - x86_64_alu_imm_reg(cd, X86_64_CMP, -1, REG_ITMP1); - x86_64_lea_membase_reg(cd, REG_ITMP1, iptr->val.i, REG_ITMP2); - x86_64_cmovcc_reg_reg(cd, X86_64_CC_G, REG_ITMP1, REG_ITMP2); - x86_64_alu_imm_reg(cd, X86_64_AND, -1 - (iptr->val.i), REG_ITMP2); - x86_64_alu_reg_reg(cd, X86_64_SUB, REG_ITMP2, REG_ITMP1); - x86_64_mov_reg_reg(cd, REG_ITMP1, d); + emit_alu_imm_reg(cd, ALU_CMP, -1, REG_ITMP1); + emit_lea_membase_reg(cd, REG_ITMP1, iptr->val.i, REG_ITMP2); + emit_cmovcc_reg_reg(cd, CC_G, REG_ITMP1, REG_ITMP2); + emit_alu_imm_reg(cd, ALU_AND, -1 - (iptr->val.i), REG_ITMP2); + emit_alu_reg_reg(cd, ALU_SUB, REG_ITMP2, REG_ITMP1); + emit_mov_reg_reg(cd, REG_ITMP1, d); emit_store(jd, iptr, iptr->dst, d); break; case ICMD_ISHL: /* ..., val1, val2 ==> ..., val1 << val2 */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_ishift(cd, X86_64_SHL, src, iptr); + emit_ishift(cd, SHIFT_SHL, src, iptr); break; case ICMD_ISHLCONST: /* ..., value ==> ..., value << constant */ /* val.i = constant */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_ishiftconst(cd, X86_64_SHL, src, iptr); + emit_ishiftconst(cd, SHIFT_SHL, src, iptr); break; case ICMD_ISHR: /* ..., val1, val2 ==> ..., val1 >> val2 */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_ishift(cd, X86_64_SAR, src, iptr); + emit_ishift(cd, SHIFT_SAR, src, iptr); break; case ICMD_ISHRCONST: /* ..., value ==> ..., value >> constant */ /* val.i = constant */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_ishiftconst(cd, X86_64_SAR, src, iptr); + emit_ishiftconst(cd, SHIFT_SAR, src, iptr); break; case ICMD_IUSHR: /* ..., val1, val2 ==> ..., val1 >>> val2 */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_ishift(cd, X86_64_SHR, src, iptr); + emit_ishift(cd, SHIFT_SHR, src, iptr); break; case ICMD_IUSHRCONST: /* ..., value ==> ..., value >>> constant */ /* val.i = constant */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_ishiftconst(cd, X86_64_SHR, src, iptr); + emit_ishiftconst(cd, SHIFT_SHR, src, iptr); break; case ICMD_LSHL: /* ..., val1, val2 ==> ..., val1 << val2 */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_lshift(cd, X86_64_SHL, src, iptr); + emit_lshift(cd, SHIFT_SHL, src, iptr); break; case ICMD_LSHLCONST: /* ..., value ==> ..., value << constant */ /* val.i = constant */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_lshiftconst(cd, X86_64_SHL, src, iptr); + emit_lshiftconst(cd, SHIFT_SHL, src, iptr); break; case ICMD_LSHR: /* ..., val1, val2 ==> ..., val1 >> val2 */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_lshift(cd, X86_64_SAR, src, iptr); + emit_lshift(cd, SHIFT_SAR, src, iptr); break; case ICMD_LSHRCONST: /* ..., value ==> ..., value >> constant */ /* val.i = constant */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_lshiftconst(cd, X86_64_SAR, src, iptr); + emit_lshiftconst(cd, SHIFT_SAR, src, iptr); break; case ICMD_LUSHR: /* ..., val1, val2 ==> ..., val1 >>> val2 */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_lshift(cd, X86_64_SHR, src, iptr); + emit_lshift(cd, SHIFT_SHR, src, iptr); break; case ICMD_LUSHRCONST: /* ..., value ==> ..., value >>> constant */ /* val.l = constant */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_lshiftconst(cd, X86_64_SHR, src, iptr); + emit_lshiftconst(cd, SHIFT_SHR, src, iptr); break; case ICMD_IAND: /* ..., val1, val2 ==> ..., val1 & val2 */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_ialu(cd, X86_64_AND, src, iptr); + emit_ialu(cd, ALU_AND, src, iptr); break; case ICMD_IANDCONST: /* ..., value ==> ..., value & constant */ /* val.i = constant */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_ialuconst(cd, X86_64_AND, src, iptr); + emit_ialuconst(cd, ALU_AND, src, iptr); break; case ICMD_LAND: /* ..., val1, val2 ==> ..., val1 & val2 */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_lalu(cd, X86_64_AND, src, iptr); + emit_lalu(cd, ALU_AND, src, iptr); break; case ICMD_LANDCONST: /* ..., value ==> ..., value & constant */ /* val.l = constant */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_laluconst(cd, X86_64_AND, src, iptr); + emit_laluconst(cd, ALU_AND, src, iptr); break; case ICMD_IOR: /* ..., val1, val2 ==> ..., val1 | val2 */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_ialu(cd, X86_64_OR, src, iptr); + emit_ialu(cd, ALU_OR, src, iptr); break; case ICMD_IORCONST: /* ..., value ==> ..., value | constant */ /* val.i = constant */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_ialuconst(cd, X86_64_OR, src, iptr); + emit_ialuconst(cd, ALU_OR, src, iptr); break; case ICMD_LOR: /* ..., val1, val2 ==> ..., val1 | val2 */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_lalu(cd, X86_64_OR, src, iptr); + emit_lalu(cd, ALU_OR, src, iptr); break; case ICMD_LORCONST: /* ..., value ==> ..., value | constant */ /* val.l = constant */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_laluconst(cd, X86_64_OR, src, iptr); + emit_laluconst(cd, ALU_OR, src, iptr); break; case ICMD_IXOR: /* ..., val1, val2 ==> ..., val1 ^ val2 */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_ialu(cd, X86_64_XOR, src, iptr); + emit_ialu(cd, ALU_XOR, src, iptr); break; case ICMD_IXORCONST: /* ..., value ==> ..., value ^ constant */ /* val.i = constant */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_ialuconst(cd, X86_64_XOR, src, iptr); + emit_ialuconst(cd, ALU_XOR, src, iptr); break; case ICMD_LXOR: /* ..., val1, val2 ==> ..., val1 ^ val2 */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_lalu(cd, X86_64_XOR, src, iptr); + emit_lalu(cd, ALU_XOR, src, iptr); break; case ICMD_LXORCONST: /* ..., value ==> ..., value ^ constant */ /* val.l = constant */ d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_NULL); - x86_64_emit_laluconst(cd, X86_64_XOR, src, iptr); + emit_laluconst(cd, ALU_XOR, src, iptr); break; @@ -1643,24 +1667,24 @@ bool codegen(jitdata *jd) d = var->regoff; if (var->flags & INMEMORY) { if (iptr->val.i == 1) { - x86_64_incl_membase(cd, REG_SP, d * 8); + emit_incl_membase(cd, REG_SP, d * 8); } else if (iptr->val.i == -1) { - x86_64_decl_membase(cd, REG_SP, d * 8); + emit_decl_membase(cd, REG_SP, d * 8); } else { - x86_64_alul_imm_membase(cd, X86_64_ADD, iptr->val.i, REG_SP, d * 8); + emit_alul_imm_membase(cd, ALU_ADD, iptr->val.i, REG_SP, d * 8); } } else { if (iptr->val.i == 1) { - x86_64_incl_reg(cd, d); + emit_incl_reg(cd, d); } else if (iptr->val.i == -1) { - x86_64_decl_reg(cd, d); + emit_decl_reg(cd, d); } else { - x86_64_alul_imm_reg(cd, X86_64_ADD, iptr->val.i, d); + emit_alul_imm_reg(cd, ALU_ADD, iptr->val.i, d); } } break; @@ -1674,8 +1698,8 @@ bool codegen(jitdata *jd) d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3); disp = dseg_adds4(cd, 0x80000000); M_FLTMOVE(s1, d); - x86_64_movss_membase_reg(cd, RIP, -(((s8) cd->mcodeptr + 9) - (s8) cd->mcodebase) + disp, REG_FTMP2); - x86_64_xorps_reg_reg(cd, REG_FTMP2, d); + emit_movss_membase_reg(cd, RIP, -(((s8) cd->mcodeptr + 9) - (s8) cd->mcodebase) + disp, REG_FTMP2); + emit_xorps_reg_reg(cd, REG_FTMP2, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -1685,8 +1709,8 @@ bool codegen(jitdata *jd) d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3); disp = dseg_adds8(cd, 0x8000000000000000); M_FLTMOVE(s1, d); - x86_64_movd_membase_reg(cd, RIP, -(((s8) cd->mcodeptr + 9) - (s8) cd->mcodebase) + disp, REG_FTMP2); - x86_64_xorpd_reg_reg(cd, REG_FTMP2, d); + emit_movd_membase_reg(cd, RIP, -(((s8) cd->mcodeptr + 9) - (s8) cd->mcodebase) + disp, REG_FTMP2); + emit_xorpd_reg_reg(cd, REG_FTMP2, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -1696,12 +1720,12 @@ bool codegen(jitdata *jd) s2 = emit_load_s2(jd, iptr, src, REG_FTMP2); d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3); if (s1 == d) { - x86_64_addss_reg_reg(cd, s2, d); + emit_addss_reg_reg(cd, s2, d); } else if (s2 == d) { - x86_64_addss_reg_reg(cd, s1, d); + emit_addss_reg_reg(cd, s1, d); } else { M_FLTMOVE(s1, d); - x86_64_addss_reg_reg(cd, s2, d); + emit_addss_reg_reg(cd, s2, d); } emit_store(jd, iptr, iptr->dst, d); break; @@ -1712,12 +1736,12 @@ bool codegen(jitdata *jd) s2 = emit_load_s2(jd, iptr, src, REG_FTMP2); d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3); if (s1 == d) { - x86_64_addsd_reg_reg(cd, s2, d); + emit_addsd_reg_reg(cd, s2, d); } else if (s2 == d) { - x86_64_addsd_reg_reg(cd, s1, d); + emit_addsd_reg_reg(cd, s1, d); } else { M_FLTMOVE(s1, d); - x86_64_addsd_reg_reg(cd, s2, d); + emit_addsd_reg_reg(cd, s2, d); } emit_store(jd, iptr, iptr->dst, d); break; @@ -1732,7 +1756,7 @@ bool codegen(jitdata *jd) s2 = REG_FTMP2; } M_FLTMOVE(s1, d); - x86_64_subss_reg_reg(cd, s2, d); + emit_subss_reg_reg(cd, s2, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -1746,7 +1770,7 @@ bool codegen(jitdata *jd) s2 = REG_FTMP2; } M_FLTMOVE(s1, d); - x86_64_subsd_reg_reg(cd, s2, d); + emit_subsd_reg_reg(cd, s2, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -1756,12 +1780,12 @@ bool codegen(jitdata *jd) s2 = emit_load_s2(jd, iptr, src, REG_FTMP2); d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3); if (s1 == d) { - x86_64_mulss_reg_reg(cd, s2, d); + emit_mulss_reg_reg(cd, s2, d); } else if (s2 == d) { - x86_64_mulss_reg_reg(cd, s1, d); + emit_mulss_reg_reg(cd, s1, d); } else { M_FLTMOVE(s1, d); - x86_64_mulss_reg_reg(cd, s2, d); + emit_mulss_reg_reg(cd, s2, d); } emit_store(jd, iptr, iptr->dst, d); break; @@ -1772,12 +1796,12 @@ bool codegen(jitdata *jd) s2 = emit_load_s2(jd, iptr, src, REG_FTMP2); d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3); if (s1 == d) { - x86_64_mulsd_reg_reg(cd, s2, d); + emit_mulsd_reg_reg(cd, s2, d); } else if (s2 == d) { - x86_64_mulsd_reg_reg(cd, s1, d); + emit_mulsd_reg_reg(cd, s1, d); } else { M_FLTMOVE(s1, d); - x86_64_mulsd_reg_reg(cd, s2, d); + emit_mulsd_reg_reg(cd, s2, d); } emit_store(jd, iptr, iptr->dst, d); break; @@ -1792,7 +1816,7 @@ bool codegen(jitdata *jd) s2 = REG_FTMP2; } M_FLTMOVE(s1, d); - x86_64_divss_reg_reg(cd, s2, d); + emit_divss_reg_reg(cd, s2, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -1806,7 +1830,7 @@ bool codegen(jitdata *jd) s2 = REG_FTMP2; } M_FLTMOVE(s1, d); - x86_64_divsd_reg_reg(cd, s2, d); + emit_divsd_reg_reg(cd, s2, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -1814,7 +1838,7 @@ bool codegen(jitdata *jd) s1 = emit_load_s1(jd, iptr, src, REG_ITMP1); d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1); - x86_64_cvtsi2ss_reg_reg(cd, s1, d); + emit_cvtsi2ss_reg_reg(cd, s1, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -1822,7 +1846,7 @@ bool codegen(jitdata *jd) s1 = emit_load_s1(jd, iptr, src, REG_ITMP1); d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1); - x86_64_cvtsi2sd_reg_reg(cd, s1, d); + emit_cvtsi2sd_reg_reg(cd, s1, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -1830,7 +1854,7 @@ bool codegen(jitdata *jd) s1 = emit_load_s1(jd, iptr, src, REG_ITMP1); d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1); - x86_64_cvtsi2ssq_reg_reg(cd, s1, d); + emit_cvtsi2ssq_reg_reg(cd, s1, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -1838,7 +1862,7 @@ bool codegen(jitdata *jd) s1 = emit_load_s1(jd, iptr, src, REG_ITMP1); d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1); - x86_64_cvtsi2sdq_reg_reg(cd, s1, d); + emit_cvtsi2sdq_reg_reg(cd, s1, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -1846,13 +1870,13 @@ bool codegen(jitdata *jd) s1 = emit_load_s1(jd, iptr, src, REG_FTMP1); d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1); - x86_64_cvttss2si_reg_reg(cd, s1, d); - x86_64_alul_imm_reg(cd, X86_64_CMP, 0x80000000, d); /* corner cases */ + emit_cvttss2si_reg_reg(cd, s1, d); + emit_alul_imm_reg(cd, ALU_CMP, 0x80000000, d); /* corner cases */ a = ((s1 == REG_FTMP1) ? 0 : 5) + 10 + 3 + ((REG_RESULT == d) ? 0 : 3); - x86_64_jcc(cd, X86_64_CC_NE, a); + emit_jcc(cd, CC_NE, a); M_FLTMOVE(s1, REG_FTMP1); - x86_64_mov_imm_reg(cd, (ptrint) asm_builtin_f2i, REG_ITMP2); - x86_64_call_reg(cd, REG_ITMP2); + emit_mov_imm_reg(cd, (ptrint) asm_builtin_f2i, REG_ITMP2); + emit_call_reg(cd, REG_ITMP2); M_INTMOVE(REG_RESULT, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -1861,13 +1885,13 @@ bool codegen(jitdata *jd) s1 = emit_load_s1(jd, iptr, src, REG_FTMP1); d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1); - x86_64_cvttsd2si_reg_reg(cd, s1, d); - x86_64_alul_imm_reg(cd, X86_64_CMP, 0x80000000, d); /* corner cases */ + emit_cvttsd2si_reg_reg(cd, s1, d); + emit_alul_imm_reg(cd, ALU_CMP, 0x80000000, d); /* corner cases */ a = ((s1 == REG_FTMP1) ? 0 : 5) + 10 + 3 + ((REG_RESULT == d) ? 0 : 3); - x86_64_jcc(cd, X86_64_CC_NE, a); + emit_jcc(cd, CC_NE, a); M_FLTMOVE(s1, REG_FTMP1); - x86_64_mov_imm_reg(cd, (ptrint) asm_builtin_d2i, REG_ITMP2); - x86_64_call_reg(cd, REG_ITMP2); + emit_mov_imm_reg(cd, (ptrint) asm_builtin_d2i, REG_ITMP2); + emit_call_reg(cd, REG_ITMP2); M_INTMOVE(REG_RESULT, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -1876,14 +1900,14 @@ bool codegen(jitdata *jd) s1 = emit_load_s1(jd, iptr, src, REG_FTMP1); d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1); - x86_64_cvttss2siq_reg_reg(cd, s1, d); - x86_64_mov_imm_reg(cd, 0x8000000000000000, REG_ITMP2); - x86_64_alu_reg_reg(cd, X86_64_CMP, REG_ITMP2, d); /* corner cases */ + emit_cvttss2siq_reg_reg(cd, s1, d); + emit_mov_imm_reg(cd, 0x8000000000000000, REG_ITMP2); + emit_alu_reg_reg(cd, ALU_CMP, REG_ITMP2, d); /* corner cases */ a = ((s1 == REG_FTMP1) ? 0 : 5) + 10 + 3 + ((REG_RESULT == d) ? 0 : 3); - x86_64_jcc(cd, X86_64_CC_NE, a); + emit_jcc(cd, CC_NE, a); M_FLTMOVE(s1, REG_FTMP1); - x86_64_mov_imm_reg(cd, (ptrint) asm_builtin_f2l, REG_ITMP2); - x86_64_call_reg(cd, REG_ITMP2); + emit_mov_imm_reg(cd, (ptrint) asm_builtin_f2l, REG_ITMP2); + emit_call_reg(cd, REG_ITMP2); M_INTMOVE(REG_RESULT, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -1892,14 +1916,14 @@ bool codegen(jitdata *jd) s1 = emit_load_s1(jd, iptr, src, REG_FTMP1); d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1); - x86_64_cvttsd2siq_reg_reg(cd, s1, d); - x86_64_mov_imm_reg(cd, 0x8000000000000000, REG_ITMP2); - x86_64_alu_reg_reg(cd, X86_64_CMP, REG_ITMP2, d); /* corner cases */ + emit_cvttsd2siq_reg_reg(cd, s1, d); + emit_mov_imm_reg(cd, 0x8000000000000000, REG_ITMP2); + emit_alu_reg_reg(cd, ALU_CMP, REG_ITMP2, d); /* corner cases */ a = ((s1 == REG_FTMP1) ? 0 : 5) + 10 + 3 + ((REG_RESULT == d) ? 0 : 3); - x86_64_jcc(cd, X86_64_CC_NE, a); + emit_jcc(cd, CC_NE, a); M_FLTMOVE(s1, REG_FTMP1); - x86_64_mov_imm_reg(cd, (ptrint) asm_builtin_d2l, REG_ITMP2); - x86_64_call_reg(cd, REG_ITMP2); + emit_mov_imm_reg(cd, (ptrint) asm_builtin_d2l, REG_ITMP2); + emit_call_reg(cd, REG_ITMP2); M_INTMOVE(REG_RESULT, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -1908,7 +1932,7 @@ bool codegen(jitdata *jd) s1 = emit_load_s1(jd, iptr, src, REG_FTMP1); d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3); - x86_64_cvtss2sd_reg_reg(cd, s1, d); + emit_cvtss2sd_reg_reg(cd, s1, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -1916,7 +1940,7 @@ bool codegen(jitdata *jd) s1 = emit_load_s1(jd, iptr, src, REG_FTMP1); d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3); - x86_64_cvtsd2ss_reg_reg(cd, s1, d); + emit_cvtsd2ss_reg_reg(cd, s1, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -1929,7 +1953,7 @@ bool codegen(jitdata *jd) M_CLR(d); M_MOV_IMM(1, REG_ITMP1); M_MOV_IMM(-1, REG_ITMP2); - x86_64_ucomiss_reg_reg(cd, s1, s2); + emit_ucomiss_reg_reg(cd, s1, s2); M_CMOVB(REG_ITMP1, d); M_CMOVA(REG_ITMP2, d); M_CMOVP(REG_ITMP2, d); /* treat unordered as GT */ @@ -1945,7 +1969,7 @@ bool codegen(jitdata *jd) M_CLR(d); M_MOV_IMM(1, REG_ITMP1); M_MOV_IMM(-1, REG_ITMP2); - x86_64_ucomiss_reg_reg(cd, s1, s2); + emit_ucomiss_reg_reg(cd, s1, s2); M_CMOVB(REG_ITMP1, d); M_CMOVA(REG_ITMP2, d); M_CMOVP(REG_ITMP1, d); /* treat unordered as LT */ @@ -1961,7 +1985,7 @@ bool codegen(jitdata *jd) M_CLR(d); M_MOV_IMM(1, REG_ITMP1); M_MOV_IMM(-1, REG_ITMP2); - x86_64_ucomisd_reg_reg(cd, s1, s2); + emit_ucomisd_reg_reg(cd, s1, s2); M_CMOVB(REG_ITMP1, d); M_CMOVA(REG_ITMP2, d); M_CMOVP(REG_ITMP2, d); /* treat unordered as GT */ @@ -1977,7 +2001,7 @@ bool codegen(jitdata *jd) M_CLR(d); M_MOV_IMM(1, REG_ITMP1); M_MOV_IMM(-1, REG_ITMP2); - x86_64_ucomisd_reg_reg(cd, s1, s2); + emit_ucomisd_reg_reg(cd, s1, s2); M_CMOVB(REG_ITMP1, d); M_CMOVA(REG_ITMP2, d); M_CMOVP(REG_ITMP1, d); /* treat unordered as LT */ @@ -2005,7 +2029,7 @@ bool codegen(jitdata *jd) gen_nullptr_check(s1); gen_bound_check; } - x86_64_movsbq_memindex_reg(cd, OFFSET(java_bytearray, data[0]), s1, s2, 0, d); + emit_movsbq_memindex_reg(cd, OFFSET(java_bytearray, data[0]), s1, s2, 0, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -2018,7 +2042,7 @@ bool codegen(jitdata *jd) gen_nullptr_check(s1); gen_bound_check; } - x86_64_movzwq_memindex_reg(cd, OFFSET(java_chararray, data[0]), s1, s2, 1, d); + emit_movzwq_memindex_reg(cd, OFFSET(java_chararray, data[0]), s1, s2, 1, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -2031,7 +2055,7 @@ bool codegen(jitdata *jd) gen_nullptr_check(s1); gen_bound_check; } - x86_64_movswq_memindex_reg(cd, OFFSET(java_shortarray, data[0]), s1, s2, 1, d); + emit_movswq_memindex_reg(cd, OFFSET(java_shortarray, data[0]), s1, s2, 1, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -2044,7 +2068,7 @@ bool codegen(jitdata *jd) gen_nullptr_check(s1); gen_bound_check; } - x86_64_movl_memindex_reg(cd, OFFSET(java_intarray, data[0]), s1, s2, 2, d); + emit_movl_memindex_reg(cd, OFFSET(java_intarray, data[0]), s1, s2, 2, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -2057,7 +2081,7 @@ bool codegen(jitdata *jd) gen_nullptr_check(s1); gen_bound_check; } - x86_64_mov_memindex_reg(cd, OFFSET(java_longarray, data[0]), s1, s2, 3, d); + emit_mov_memindex_reg(cd, OFFSET(java_longarray, data[0]), s1, s2, 3, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -2070,7 +2094,7 @@ bool codegen(jitdata *jd) gen_nullptr_check(s1); gen_bound_check; } - x86_64_movss_memindex_reg(cd, OFFSET(java_floatarray, data[0]), s1, s2, 2, d); + emit_movss_memindex_reg(cd, OFFSET(java_floatarray, data[0]), s1, s2, 2, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -2083,7 +2107,7 @@ bool codegen(jitdata *jd) gen_nullptr_check(s1); gen_bound_check; } - x86_64_movsd_memindex_reg(cd, OFFSET(java_doublearray, data[0]), s1, s2, 3, d); + emit_movsd_memindex_reg(cd, OFFSET(java_doublearray, data[0]), s1, s2, 3, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -2096,7 +2120,7 @@ bool codegen(jitdata *jd) gen_nullptr_check(s1); gen_bound_check; } - x86_64_mov_memindex_reg(cd, OFFSET(java_objectarray, data[0]), s1, s2, 3, d); + emit_mov_memindex_reg(cd, OFFSET(java_objectarray, data[0]), s1, s2, 3, d); emit_store(jd, iptr, iptr->dst, d); break; @@ -2110,7 +2134,7 @@ bool codegen(jitdata *jd) gen_bound_check; } s3 = emit_load_s3(jd, iptr, src, REG_ITMP3); - x86_64_movb_reg_memindex(cd, s3, OFFSET(java_bytearray, data[0]), s1, s2, 0); + emit_movb_reg_memindex(cd, s3, OFFSET(java_bytearray, data[0]), s1, s2, 0); break; case ICMD_CASTORE: /* ..., arrayref, index, value ==> ... */ @@ -2122,7 +2146,7 @@ bool codegen(jitdata *jd) gen_bound_check; } s3 = emit_load_s3(jd, iptr, src, REG_ITMP3); - x86_64_movw_reg_memindex(cd, s3, OFFSET(java_chararray, data[0]), s1, s2, 1); + emit_movw_reg_memindex(cd, s3, OFFSET(java_chararray, data[0]), s1, s2, 1); break; case ICMD_SASTORE: /* ..., arrayref, index, value ==> ... */ @@ -2134,7 +2158,7 @@ bool codegen(jitdata *jd) gen_bound_check; } s3 = emit_load_s3(jd, iptr, src, REG_ITMP3); - x86_64_movw_reg_memindex(cd, s3, OFFSET(java_shortarray, data[0]), s1, s2, 1); + emit_movw_reg_memindex(cd, s3, OFFSET(java_shortarray, data[0]), s1, s2, 1); break; case ICMD_IASTORE: /* ..., arrayref, index, value ==> ... */ @@ -2146,7 +2170,7 @@ bool codegen(jitdata *jd) gen_bound_check; } s3 = emit_load_s3(jd, iptr, src, REG_ITMP3); - x86_64_movl_reg_memindex(cd, s3, OFFSET(java_intarray, data[0]), s1, s2, 2); + emit_movl_reg_memindex(cd, s3, OFFSET(java_intarray, data[0]), s1, s2, 2); break; case ICMD_LASTORE: /* ..., arrayref, index, value ==> ... */ @@ -2158,7 +2182,7 @@ bool codegen(jitdata *jd) gen_bound_check; } s3 = emit_load_s3(jd, iptr, src, REG_ITMP3); - x86_64_mov_reg_memindex(cd, s3, OFFSET(java_longarray, data[0]), s1, s2, 3); + emit_mov_reg_memindex(cd, s3, OFFSET(java_longarray, data[0]), s1, s2, 3); break; case ICMD_FASTORE: /* ..., arrayref, index, value ==> ... */ @@ -2170,7 +2194,7 @@ bool codegen(jitdata *jd) gen_bound_check; } s3 = emit_load_s3(jd, iptr, src, REG_FTMP3); - x86_64_movss_reg_memindex(cd, s3, OFFSET(java_floatarray, data[0]), s1, s2, 2); + emit_movss_reg_memindex(cd, s3, OFFSET(java_floatarray, data[0]), s1, s2, 2); break; case ICMD_DASTORE: /* ..., arrayref, index, value ==> ... */ @@ -2182,7 +2206,7 @@ bool codegen(jitdata *jd) gen_bound_check; } s3 = emit_load_s3(jd, iptr, src, REG_FTMP3); - x86_64_movsd_reg_memindex(cd, s3, OFFSET(java_doublearray, data[0]), s1, s2, 3); + emit_movsd_reg_memindex(cd, s3, OFFSET(java_doublearray, data[0]), s1, s2, 3); break; case ICMD_AASTORE: /* ..., arrayref, index, value ==> ... */ @@ -2206,7 +2230,7 @@ bool codegen(jitdata *jd) s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1); s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2); s3 = emit_load_s3(jd, iptr, src, REG_ITMP3); - x86_64_mov_reg_memindex(cd, s3, OFFSET(java_objectarray, data[0]), s1, s2, 3); + emit_mov_reg_memindex(cd, s3, OFFSET(java_objectarray, data[0]), s1, s2, 3); break; @@ -2218,7 +2242,7 @@ bool codegen(jitdata *jd) gen_nullptr_check(s1); gen_bound_check; } - x86_64_movb_imm_memindex(cd, iptr->val.i, OFFSET(java_bytearray, data[0]), s1, s2, 0); + emit_movb_imm_memindex(cd, iptr->val.i, OFFSET(java_bytearray, data[0]), s1, s2, 0); break; case ICMD_CASTORECONST: /* ..., arrayref, index ==> ... */ @@ -2229,7 +2253,7 @@ bool codegen(jitdata *jd) gen_nullptr_check(s1); gen_bound_check; } - x86_64_movw_imm_memindex(cd, iptr->val.i, OFFSET(java_chararray, data[0]), s1, s2, 1); + emit_movw_imm_memindex(cd, iptr->val.i, OFFSET(java_chararray, data[0]), s1, s2, 1); break; case ICMD_SASTORECONST: /* ..., arrayref, index ==> ... */ @@ -2240,7 +2264,7 @@ bool codegen(jitdata *jd) gen_nullptr_check(s1); gen_bound_check; } - x86_64_movw_imm_memindex(cd, iptr->val.i, OFFSET(java_shortarray, data[0]), s1, s2, 1); + emit_movw_imm_memindex(cd, iptr->val.i, OFFSET(java_shortarray, data[0]), s1, s2, 1); break; case ICMD_IASTORECONST: /* ..., arrayref, index ==> ... */ @@ -2251,7 +2275,7 @@ bool codegen(jitdata *jd) gen_nullptr_check(s1); gen_bound_check; } - x86_64_movl_imm_memindex(cd, iptr->val.i, OFFSET(java_intarray, data[0]), s1, s2, 2); + emit_movl_imm_memindex(cd, iptr->val.i, OFFSET(java_intarray, data[0]), s1, s2, 2); break; case ICMD_LASTORECONST: /* ..., arrayref, index ==> ... */ @@ -2264,10 +2288,10 @@ bool codegen(jitdata *jd) } if (IS_IMM32(iptr->val.l)) { - x86_64_mov_imm_memindex(cd, (u4) (iptr->val.l & 0x00000000ffffffff), OFFSET(java_longarray, data[0]), s1, s2, 3); + emit_mov_imm_memindex(cd, (u4) (iptr->val.l & 0x00000000ffffffff), OFFSET(java_longarray, data[0]), s1, s2, 3); } else { - x86_64_movl_imm_memindex(cd, (u4) (iptr->val.l & 0x00000000ffffffff), OFFSET(java_longarray, data[0]), s1, s2, 3); - x86_64_movl_imm_memindex(cd, (u4) (iptr->val.l >> 32), OFFSET(java_longarray, data[0]) + 4, s1, s2, 3); + emit_movl_imm_memindex(cd, (u4) (iptr->val.l & 0x00000000ffffffff), OFFSET(java_longarray, data[0]), s1, s2, 3); + emit_movl_imm_memindex(cd, (u4) (iptr->val.l >> 32), OFFSET(java_longarray, data[0]) + 4, s1, s2, 3); } break; @@ -2279,7 +2303,7 @@ bool codegen(jitdata *jd) gen_nullptr_check(s1); gen_bound_check; } - x86_64_mov_imm_memindex(cd, 0, OFFSET(java_objectarray, data[0]), s1, s2, 3); + emit_mov_imm_memindex(cd, 0, OFFSET(java_objectarray, data[0]), s1, s2, 3); break; @@ -2338,12 +2362,12 @@ bool codegen(jitdata *jd) break; case TYPE_FLT: d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1); - x86_64_movss_membase_reg(cd, REG_ITMP2, 0, d); + emit_movss_membase_reg(cd, REG_ITMP2, 0, d); emit_store(jd, iptr, iptr->dst, d); break; case TYPE_DBL: d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1); - x86_64_movsd_membase_reg(cd, REG_ITMP2, 0, d); + emit_movsd_membase_reg(cd, REG_ITMP2, 0, d); emit_store(jd, iptr, iptr->dst, d); break; } @@ -2402,11 +2426,11 @@ bool codegen(jitdata *jd) break; case TYPE_FLT: s2 = emit_load_s2(jd, iptr, src, REG_FTMP1); - x86_64_movss_reg_membase(cd, s2, REG_ITMP2, 0); + emit_movss_reg_membase(cd, s2, REG_ITMP2, 0); break; case TYPE_DBL: s2 = emit_load_s2(jd, iptr, src, REG_FTMP1); - x86_64_movsd_reg_membase(cd, s2, REG_ITMP2, 0); + emit_movsd_reg_membase(cd, s2, REG_ITMP2, 0); break; } break; @@ -2510,12 +2534,12 @@ bool codegen(jitdata *jd) break; case TYPE_FLT: d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1); - x86_64_movss_membase32_reg(cd, s1, disp, d); + emit_movss_membase32_reg(cd, s1, disp, d); emit_store(jd, iptr, iptr->dst, d); break; case TYPE_DBL: d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1); - x86_64_movsd_membase32_reg(cd, s1, disp, d); + emit_movsd_membase32_reg(cd, s1, disp, d); emit_store(jd, iptr, iptr->dst, d); break; } @@ -2560,10 +2584,10 @@ bool codegen(jitdata *jd) M_LST32(s2, s1, disp); break; case TYPE_FLT: - x86_64_movss_reg_membase32(cd, s2, s1, disp); + emit_movss_reg_membase32(cd, s2, s1, disp); break; case TYPE_DBL: - x86_64_movsd_reg_membase32(cd, s2, s1, disp); + emit_movsd_reg_membase32(cd, s2, s1, disp); break; } break; @@ -2698,145 +2722,152 @@ bool codegen(jitdata *jd) case ICMD_IFEQ: /* ..., value ==> ... */ /* op1 = target JavaVM pc, val.i = constant */ - x86_64_emit_ifcc(cd, X86_64_CC_E, src, iptr); + emit_ifcc(cd, CC_E, src, iptr); break; case ICMD_IFLT: /* ..., value ==> ... */ /* op1 = target JavaVM pc, val.i = constant */ - x86_64_emit_ifcc(cd, X86_64_CC_L, src, iptr); +#if RISC_STYLE + s1 = emit_load_s1(jd, iptr, src, REG_ITMP1); + M_ICMP_IMM(iptr->val.i, s1); + M_BLT(0); + codegen_addreference(cd, (basicblock *) iptr->target); +#else + emit_ifcc(cd, CC_L, src, iptr); +#endif break; case ICMD_IFLE: /* ..., value ==> ... */ /* op1 = target JavaVM pc, val.i = constant */ - x86_64_emit_ifcc(cd, X86_64_CC_LE, src, iptr); + emit_ifcc(cd, CC_LE, src, iptr); break; case ICMD_IFNE: /* ..., value ==> ... */ /* op1 = target JavaVM pc, val.i = constant */ - x86_64_emit_ifcc(cd, X86_64_CC_NE, src, iptr); + emit_ifcc(cd, CC_NE, src, iptr); break; case ICMD_IFGT: /* ..., value ==> ... */ /* op1 = target JavaVM pc, val.i = constant */ - x86_64_emit_ifcc(cd, X86_64_CC_G, src, iptr); + emit_ifcc(cd, CC_G, src, iptr); break; case ICMD_IFGE: /* ..., value ==> ... */ /* op1 = target JavaVM pc, val.i = constant */ - x86_64_emit_ifcc(cd, X86_64_CC_GE, src, iptr); + emit_ifcc(cd, CC_GE, src, iptr); break; case ICMD_IF_LEQ: /* ..., value ==> ... */ /* op1 = target JavaVM pc, val.l = constant */ - x86_64_emit_if_lcc(cd, X86_64_CC_E, src, iptr); + emit_if_lcc(cd, CC_E, src, iptr); break; case ICMD_IF_LLT: /* ..., value ==> ... */ /* op1 = target JavaVM pc, val.l = constant */ - x86_64_emit_if_lcc(cd, X86_64_CC_L, src, iptr); + emit_if_lcc(cd, CC_L, src, iptr); break; case ICMD_IF_LLE: /* ..., value ==> ... */ /* op1 = target JavaVM pc, val.l = constant */ - x86_64_emit_if_lcc(cd, X86_64_CC_LE, src, iptr); + emit_if_lcc(cd, CC_LE, src, iptr); break; case ICMD_IF_LNE: /* ..., value ==> ... */ /* op1 = target JavaVM pc, val.l = constant */ - x86_64_emit_if_lcc(cd, X86_64_CC_NE, src, iptr); + emit_if_lcc(cd, CC_NE, src, iptr); break; case ICMD_IF_LGT: /* ..., value ==> ... */ /* op1 = target JavaVM pc, val.l = constant */ - x86_64_emit_if_lcc(cd, X86_64_CC_G, src, iptr); + emit_if_lcc(cd, CC_G, src, iptr); break; case ICMD_IF_LGE: /* ..., value ==> ... */ /* op1 = target JavaVM pc, val.l = constant */ - x86_64_emit_if_lcc(cd, X86_64_CC_GE, src, iptr); + emit_if_lcc(cd, CC_GE, src, iptr); break; case ICMD_IF_ICMPEQ: /* ..., value, value ==> ... */ /* op1 = target JavaVM pc */ - x86_64_emit_if_icmpcc(cd, X86_64_CC_E, src, iptr); + emit_if_icmpcc(cd, CC_E, src, iptr); break; case ICMD_IF_LCMPEQ: /* ..., value, value ==> ... */ case ICMD_IF_ACMPEQ: /* op1 = target JavaVM pc */ - x86_64_emit_if_lcmpcc(cd, X86_64_CC_E, src, iptr); + emit_if_lcmpcc(cd, CC_E, src, iptr); break; case ICMD_IF_ICMPNE: /* ..., value, value ==> ... */ /* op1 = target JavaVM pc */ - x86_64_emit_if_icmpcc(cd, X86_64_CC_NE, src, iptr); + emit_if_icmpcc(cd, CC_NE, src, iptr); break; case ICMD_IF_LCMPNE: /* ..., value, value ==> ... */ case ICMD_IF_ACMPNE: /* op1 = target JavaVM pc */ - x86_64_emit_if_lcmpcc(cd, X86_64_CC_NE, src, iptr); + emit_if_lcmpcc(cd, CC_NE, src, iptr); break; case ICMD_IF_ICMPLT: /* ..., value, value ==> ... */ /* op1 = target JavaVM pc */ - x86_64_emit_if_icmpcc(cd, X86_64_CC_L, src, iptr); + emit_if_icmpcc(cd, CC_L, src, iptr); break; case ICMD_IF_LCMPLT: /* ..., value, value ==> ... */ /* op1 = target JavaVM pc */ - x86_64_emit_if_lcmpcc(cd, X86_64_CC_L, src, iptr); + emit_if_lcmpcc(cd, CC_L, src, iptr); break; case ICMD_IF_ICMPGT: /* ..., value, value ==> ... */ /* op1 = target JavaVM pc */ - x86_64_emit_if_icmpcc(cd, X86_64_CC_G, src, iptr); + emit_if_icmpcc(cd, CC_G, src, iptr); break; case ICMD_IF_LCMPGT: /* ..., value, value ==> ... */ /* op1 = target JavaVM pc */ - x86_64_emit_if_lcmpcc(cd, X86_64_CC_G, src, iptr); + emit_if_lcmpcc(cd, CC_G, src, iptr); break; case ICMD_IF_ICMPLE: /* ..., value, value ==> ... */ /* op1 = target JavaVM pc */ - x86_64_emit_if_icmpcc(cd, X86_64_CC_LE, src, iptr); + emit_if_icmpcc(cd, CC_LE, src, iptr); break; case ICMD_IF_LCMPLE: /* ..., value, value ==> ... */ /* op1 = target JavaVM pc */ - x86_64_emit_if_lcmpcc(cd, X86_64_CC_LE, src, iptr); + emit_if_lcmpcc(cd, CC_LE, src, iptr); break; case ICMD_IF_ICMPGE: /* ..., value, value ==> ... */ /* op1 = target JavaVM pc */ - x86_64_emit_if_icmpcc(cd, X86_64_CC_GE, src, iptr); + emit_if_icmpcc(cd, CC_GE, src, iptr); break; case ICMD_IF_LCMPGE: /* ..., value, value ==> ... */ /* op1 = target JavaVM pc */ - x86_64_emit_if_lcmpcc(cd, X86_64_CC_GE, src, iptr); + emit_if_lcmpcc(cd, CC_GE, src, iptr); break; /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST */ @@ -2941,23 +2972,23 @@ nowperformreturn: /* generate call trace */ if (opt_verbosecall) { - x86_64_alu_imm_reg(cd, X86_64_SUB, 2 * 8, REG_SP); + emit_alu_imm_reg(cd, ALU_SUB, 2 * 8, REG_SP); - x86_64_mov_reg_membase(cd, REG_RESULT, REG_SP, 0 * 8); - x86_64_movq_reg_membase(cd, REG_FRESULT, REG_SP, 1 * 8); + emit_mov_reg_membase(cd, REG_RESULT, REG_SP, 0 * 8); + emit_movq_reg_membase(cd, REG_FRESULT, REG_SP, 1 * 8); - x86_64_mov_imm_reg(cd, (u8) m, rd->argintregs[0]); - x86_64_mov_reg_reg(cd, REG_RESULT, rd->argintregs[1]); + emit_mov_imm_reg(cd, (u8) m, rd->argintregs[0]); + emit_mov_reg_reg(cd, REG_RESULT, rd->argintregs[1]); M_FLTMOVE(REG_FRESULT, rd->argfltregs[0]); M_FLTMOVE(REG_FRESULT, rd->argfltregs[1]); M_MOV_IMM(builtin_displaymethodstop, REG_ITMP1); M_CALL(REG_ITMP1); - x86_64_mov_membase_reg(cd, REG_SP, 0 * 8, REG_RESULT); - x86_64_movq_membase_reg(cd, REG_SP, 1 * 8, REG_FRESULT); + emit_mov_membase_reg(cd, REG_SP, 0 * 8, REG_RESULT); + emit_movq_membase_reg(cd, REG_SP, 1 * 8, REG_FRESULT); - x86_64_alu_imm_reg(cd, X86_64_ADD, 2 * 8, REG_SP); + emit_alu_imm_reg(cd, ALU_ADD, 2 * 8, REG_SP); } #endif /* !defined(NDEBUG) */ @@ -3033,13 +3064,13 @@ nowperformreturn: s1 = emit_load_s1(jd, iptr, src, REG_ITMP1); M_INTMOVE(s1, REG_ITMP1); if (l != 0) { - x86_64_alul_imm_reg(cd, X86_64_SUB, l, REG_ITMP1); + emit_alul_imm_reg(cd, ALU_SUB, l, REG_ITMP1); } i = i - l + 1; /* range check */ - x86_64_alul_imm_reg(cd, X86_64_CMP, i - 1, REG_ITMP1); - x86_64_jcc(cd, X86_64_CC_A, 0); + emit_alul_imm_reg(cd, ALU_CMP, i - 1, REG_ITMP1); + emit_jcc(cd, CC_A, 0); codegen_addreference(cd, (basicblock *) tptr[0]); @@ -3058,8 +3089,8 @@ nowperformreturn: M_MOV_IMM(0, REG_ITMP2); dseg_adddata(cd); - x86_64_mov_memindex_reg(cd, -(cd->dseglen), REG_ITMP2, REG_ITMP1, 3, REG_ITMP1); - x86_64_jmp_reg(cd, REG_ITMP1); + emit_mov_memindex_reg(cd, -(cd->dseglen), REG_ITMP2, REG_ITMP1, 3, REG_ITMP1); + emit_jmp_reg(cd, REG_ITMP1); } break; @@ -3082,12 +3113,12 @@ nowperformreturn: ++tptr; val = s4ptr[0]; - x86_64_alul_imm_reg(cd, X86_64_CMP, val, s1); - x86_64_jcc(cd, X86_64_CC_E, 0); + emit_alul_imm_reg(cd, ALU_CMP, val, s1); + emit_jcc(cd, CC_E, 0); codegen_addreference(cd, (basicblock *) tptr[0]); } - x86_64_jmp_imm(cd, 0); + emit_jmp_imm(cd, 0); tptr = (void **) iptr->target; codegen_addreference(cd, (basicblock *) tptr[0]); @@ -3180,7 +3211,7 @@ gen_method: /* gen_nullptr_check(rd->argintregs[0]); */ /* access memory for hardware nullptr */ -/* x86_64_mov_membase_reg(cd, rd->argintregs[0], 0, REG_ITMP2); */ +/* emit_mov_membase_reg(cd, rd->argintregs[0], 0, REG_ITMP2); */ /* fall through */ @@ -3406,7 +3437,7 @@ gen_method: } } - x86_64_movl_membase32_reg(cd, REG_ITMP2, + emit_movl_membase32_reg(cd, REG_ITMP2, OFFSET(vftbl_t, interfacetablelength), REG_ITMP3); /* XXX TWISTI: should this be int arithmetic? */ @@ -3414,7 +3445,7 @@ gen_method: M_TEST(REG_ITMP3); M_BLE(0); codegen_add_classcastexception_ref(cd); - x86_64_mov_membase32_reg(cd, REG_ITMP2, + emit_mov_membase32_reg(cd, REG_ITMP2, OFFSET(vftbl_t, interfacetable[0]) - superindex * sizeof(methodptr*), REG_ITMP3); @@ -3450,23 +3481,23 @@ gen_method: #if defined(USE_THREADS) && defined(NATIVE_THREADS) codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase); #endif - x86_64_movl_membase32_reg(cd, REG_ITMP2, + emit_movl_membase32_reg(cd, REG_ITMP2, OFFSET(vftbl_t, baseval), REG_ITMP2); /* if (s1 != REG_ITMP1) { */ - /* x86_64_movl_membase_reg(cd, REG_ITMP3, */ + /* emit_movl_membase_reg(cd, REG_ITMP3, */ /* OFFSET(vftbl_t, baseval), */ /* REG_ITMP1); */ - /* x86_64_movl_membase_reg(cd, REG_ITMP3, */ + /* emit_movl_membase_reg(cd, REG_ITMP3, */ /* OFFSET(vftbl_t, diffval), */ /* REG_ITMP3); */ /* #if defined(USE_THREADS) && defined(NATIVE_THREADS) */ /* codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase); */ /* #endif */ - /* x86_64_alu_reg_reg(cd, X86_64_SUB, REG_ITMP1, REG_ITMP2); */ + /* emit_alu_reg_reg(cd, ALU_SUB, REG_ITMP1, REG_ITMP2); */ /* } else { */ - x86_64_movl_membase32_reg(cd, REG_ITMP3, + emit_movl_membase32_reg(cd, REG_ITMP3, OFFSET(vftbl_t, baseval), REG_ITMP3); M_LSUB(REG_ITMP3, REG_ITMP2); @@ -3583,13 +3614,13 @@ gen_method: if (!super) s3 += (opt_showdisassemble ? 5 : 0); - x86_64_alu_reg_reg(cd, X86_64_XOR, d, d); + emit_alu_reg_reg(cd, ALU_XOR, d, d); /* if class is not resolved, check which code to call */ if (!super) { - x86_64_test_reg_reg(cd, s1, s1); - x86_64_jcc(cd, X86_64_CC_Z, (6 + (opt_showdisassemble ? 5 : 0) + + emit_test_reg_reg(cd, s1, s1); + emit_jcc(cd, CC_Z, (6 + (opt_showdisassemble ? 5 : 0) + 7 + 6 + s2 + 5 + s3)); codegen_addpatchref(cd, PATCHER_checkcast_instanceof_flags, @@ -3599,20 +3630,20 @@ gen_method: M_NOP; M_NOP; M_NOP; M_NOP; M_NOP; } - x86_64_movl_imm_reg(cd, 0, REG_ITMP3); /* super->flags */ - x86_64_alul_imm_reg(cd, X86_64_AND, ACC_INTERFACE, REG_ITMP3); - x86_64_jcc(cd, X86_64_CC_Z, s2 + 5); + emit_movl_imm_reg(cd, 0, REG_ITMP3); /* super->flags */ + emit_alul_imm_reg(cd, ALU_AND, ACC_INTERFACE, REG_ITMP3); + emit_jcc(cd, CC_Z, s2 + 5); } /* interface instanceof code */ if (!super || (super->flags & ACC_INTERFACE)) { if (super) { - x86_64_test_reg_reg(cd, s1, s1); - x86_64_jcc(cd, X86_64_CC_Z, s2); + emit_test_reg_reg(cd, s1, s1); + emit_jcc(cd, CC_Z, s2); } - x86_64_mov_membase_reg(cd, s1, + emit_mov_membase_reg(cd, s1, OFFSET(java_objectheader, vftbl), REG_ITMP1); if (!super) { @@ -3625,35 +3656,35 @@ gen_method: } } - x86_64_movl_membase32_reg(cd, REG_ITMP1, + emit_movl_membase32_reg(cd, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength), REG_ITMP3); - x86_64_alu_imm32_reg(cd, X86_64_SUB, superindex, REG_ITMP3); - x86_64_test_reg_reg(cd, REG_ITMP3, REG_ITMP3); + emit_alu_imm32_reg(cd, ALU_SUB, superindex, REG_ITMP3); + emit_test_reg_reg(cd, REG_ITMP3, REG_ITMP3); a = 3 + 4 /* mov_membase32_reg */ + 3 /* test */ + 4 /* setcc */; - x86_64_jcc(cd, X86_64_CC_LE, a); - x86_64_mov_membase32_reg(cd, REG_ITMP1, + emit_jcc(cd, CC_LE, a); + emit_mov_membase32_reg(cd, REG_ITMP1, OFFSET(vftbl_t, interfacetable[0]) - superindex * sizeof(methodptr*), REG_ITMP1); - x86_64_test_reg_reg(cd, REG_ITMP1, REG_ITMP1); - x86_64_setcc_reg(cd, X86_64_CC_NE, d); + emit_test_reg_reg(cd, REG_ITMP1, REG_ITMP1); + emit_setcc_reg(cd, CC_NE, d); if (!super) - x86_64_jmp_imm(cd, s3); + emit_jmp_imm(cd, s3); } /* class instanceof code */ if (!super || !(super->flags & ACC_INTERFACE)) { if (super) { - x86_64_test_reg_reg(cd, s1, s1); - x86_64_jcc(cd, X86_64_CC_E, s3); + emit_test_reg_reg(cd, s1, s1); + emit_jcc(cd, CC_E, s3); } - x86_64_mov_membase_reg(cd, s1, + emit_mov_membase_reg(cd, s1, OFFSET(java_objectheader, vftbl), REG_ITMP1); @@ -3666,26 +3697,26 @@ gen_method: } } - x86_64_mov_imm_reg(cd, (ptrint) supervftbl, REG_ITMP2); + emit_mov_imm_reg(cd, (ptrint) supervftbl, REG_ITMP2); #if defined(USE_THREADS) && defined(NATIVE_THREADS) codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase); #endif - x86_64_movl_membase_reg(cd, REG_ITMP1, + emit_movl_membase_reg(cd, REG_ITMP1, OFFSET(vftbl_t, baseval), REG_ITMP1); - x86_64_movl_membase_reg(cd, REG_ITMP2, + emit_movl_membase_reg(cd, REG_ITMP2, OFFSET(vftbl_t, diffval), REG_ITMP3); - x86_64_movl_membase_reg(cd, REG_ITMP2, + emit_movl_membase_reg(cd, REG_ITMP2, OFFSET(vftbl_t, baseval), REG_ITMP2); #if defined(USE_THREADS) && defined(NATIVE_THREADS) codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase); #endif - x86_64_alu_reg_reg(cd, X86_64_SUB, REG_ITMP2, REG_ITMP1); - x86_64_alu_reg_reg(cd, X86_64_XOR, d, d); /* may be REG_ITMP2 */ - x86_64_alu_reg_reg(cd, X86_64_CMP, REG_ITMP3, REG_ITMP1); - x86_64_setcc_reg(cd, X86_64_CC_BE, d); + emit_alu_reg_reg(cd, ALU_SUB, REG_ITMP2, REG_ITMP1); + emit_alu_reg_reg(cd, ALU_XOR, d, d); /* may be REG_ITMP2 */ + emit_alu_reg_reg(cd, ALU_CMP, REG_ITMP3, REG_ITMP1); + emit_setcc_reg(cd, CC_BE, d); } emit_store(jd, iptr, iptr->dst, d); } @@ -3774,7 +3805,7 @@ gen_method: M_FLTMOVE(s1, rd->interfaces[len][s2].regoff); } else { - x86_64_movq_reg_membase(cd, s1, REG_SP, rd->interfaces[len][s2].regoff * 8); + emit_movq_reg_membase(cd, s1, REG_SP, rd->interfaces[len][s2].regoff * 8); } } else { @@ -3783,7 +3814,7 @@ gen_method: M_INTMOVE(s1, rd->interfaces[len][s2].regoff); } else { - x86_64_mov_reg_membase(cd, s1, REG_SP, rd->interfaces[len][s2].regoff * 8); + emit_mov_reg_membase(cd, s1, REG_SP, rd->interfaces[len][s2].regoff * 8); } } } @@ -3850,7 +3881,7 @@ gen_method: } else { savedmcodeptr = cd->mcodeptr; - x86_64_lea_membase_reg(cd, RIP, -(((ptrint) cd->mcodeptr + 7) - (ptrint) cd->mcodebase), rd->argintregs[0]); + emit_lea_membase_reg(cd, RIP, -(((ptrint) cd->mcodeptr + 7) - (ptrint) cd->mcodebase), rd->argintregs[0]); M_MOV(REG_SP, rd->argintregs[1]); M_ALD(rd->argintregs[2], REG_SP, stackframesize * 8); @@ -3898,7 +3929,7 @@ gen_method: (void) dseg_addaddress(cd, get_dummyLR()); /* monitorPtr */ a = dseg_addaddress(cd, NULL); /* vftbl */ - x86_64_lea_membase_reg(cd, RIP, -(((ptrint) cd->mcodeptr + 7) - (ptrint) cd->mcodebase) + a, REG_ITMP3); + emit_lea_membase_reg(cd, RIP, -(((ptrint) cd->mcodeptr + 7) - (ptrint) cd->mcodebase) + a, REG_ITMP3); M_PUSH(REG_ITMP3); #else M_PUSH_IMM(0); @@ -4108,7 +4139,7 @@ u1 *createnativestub(functionptr f, jitdata *jd, methoddesc *nmd) for (s1 = INT_ARG_CNT - 2; s1 >= i; s1--) M_MOV(rd->argintregs[s1], rd->argintregs[s1 + 1]); - x86_64_movd_freg_reg(cd, rd->argfltregs[j], rd->argintregs[i]); + emit_movd_freg_reg(cd, rd->argfltregs[j], rd->argintregs[i]); j++; } } @@ -4160,7 +4191,7 @@ u1 *createnativestub(functionptr f, jitdata *jd, methoddesc *nmd) /* create dynamic stack info */ M_ALEA(REG_SP, stackframesize * 8, rd->argintregs[0]); - x86_64_lea_membase_reg(cd, RIP, -(((ptrint) cd->mcodeptr + 7) - (ptrint) cd->mcodebase), rd->argintregs[1]); + emit_lea_membase_reg(cd, RIP, -(((ptrint) cd->mcodeptr + 7) - (ptrint) cd->mcodebase), rd->argintregs[1]); M_ALEA(REG_SP, stackframesize * 8 + SIZEOF_VOID_P, rd->argintregs[2]); M_ALD(rd->argintregs[3], REG_SP, stackframesize * 8); M_MOV_IMM(codegen_start_native_call, REG_ITMP1); @@ -4358,7 +4389,7 @@ u1 *createnativestub(functionptr f, jitdata *jd, methoddesc *nmd) (void) dseg_addaddress(cd, get_dummyLR()); /* monitorPtr */ disp = dseg_addaddress(cd, NULL); /* vftbl */ - x86_64_lea_membase_reg(cd, RIP, -(((ptrint) cd->mcodeptr + 7) - (ptrint) cd->mcodebase) + disp, REG_ITMP3); + emit_lea_membase_reg(cd, RIP, -(((ptrint) cd->mcodeptr + 7) - (ptrint) cd->mcodebase) + disp, REG_ITMP3); M_PUSH(REG_ITMP3); #else M_PUSH_IMM(0); diff --git a/src/vm/jit/x86_64/codegen.h b/src/vm/jit/x86_64/codegen.h index ebf79d2f3..65b94d3c6 100644 --- a/src/vm/jit/x86_64/codegen.h +++ b/src/vm/jit/x86_64/codegen.h @@ -29,7 +29,7 @@ Changes: - $Id: codegen.h 4826 2006-04-24 16:06:16Z twisti $ + $Id: codegen.h 4853 2006-04-27 12:33:20Z twisti $ */ @@ -51,217 +51,6 @@ #define PATCHER_CALL_SIZE 5 /* size in bytes of a patcher call */ -/* macros to create code ******************************************************/ - -/* immediate data union */ - -typedef union { - s4 i; - s8 l; - float f; - double d; - void *a; - u1 b[8]; -} x86_64_imm_buf; - - -/* opcodes for alu instructions */ - -typedef enum { - X86_64_ADD = 0, - X86_64_OR = 1, - X86_64_ADC = 2, - X86_64_SBB = 3, - X86_64_AND = 4, - X86_64_SUB = 5, - X86_64_XOR = 6, - X86_64_CMP = 7, - X86_64_NALU -} X86_64_ALU_Opcode; - - -typedef enum { - X86_64_ROL = 0, - X86_64_ROR = 1, - X86_64_RCL = 2, - X86_64_RCR = 3, - X86_64_SHL = 4, - X86_64_SHR = 5, - X86_64_SAR = 7, - X86_64_NSHIFT = 8 -} X86_64_Shift_Opcode; - - -typedef enum { - X86_64_CC_O = 0, - X86_64_CC_NO = 1, - X86_64_CC_B = 2, X86_64_CC_C = 2, X86_64_CC_NAE = 2, - X86_64_CC_BE = 6, X86_64_CC_NA = 6, - X86_64_CC_AE = 3, X86_64_CC_NB = 3, X86_64_CC_NC = 3, - X86_64_CC_E = 4, X86_64_CC_Z = 4, - X86_64_CC_NE = 5, X86_64_CC_NZ = 5, - X86_64_CC_A = 7, X86_64_CC_NBE = 7, - X86_64_CC_S = 8, X86_64_CC_LZ = 8, - X86_64_CC_NS = 9, X86_64_CC_GEZ = 9, - X86_64_CC_P = 0x0a, X86_64_CC_PE = 0x0a, - X86_64_CC_NP = 0x0b, X86_64_CC_PO = 0x0b, - X86_64_CC_L = 0x0c, X86_64_CC_NGE = 0x0c, - X86_64_CC_GE = 0x0d, X86_64_CC_NL = 0x0d, - X86_64_CC_LE = 0x0e, X86_64_CC_NG = 0x0e, - X86_64_CC_G = 0x0f, X86_64_CC_NLE = 0x0f, - X86_64_NCC -} X86_64_CC; - - -#define IS_IMM8(imm) \ - (((long) (imm) >= -128) && ((long) (imm) <= 127)) - - -#define IS_IMM32(imm) \ - (((long) (imm) >= (-2147483647-1)) && ((long) (imm) <= 2147483647)) - - -/* modrm and stuff */ - -#define x86_64_address_byte(mod,reg,rm) \ - *(cd->mcodeptr++) = ((((mod) & 0x03) << 6) | (((reg) & 0x07) << 3) | ((rm) & 0x07)); - - -#define x86_64_emit_reg(reg,rm) \ - x86_64_address_byte(3,(reg),(rm)); - - -#define x86_64_emit_rex(size,reg,index,rm) \ - if (((size) == 1) || ((reg) > 7) || ((index) > 7) || ((rm) > 7)) { \ - *(cd->mcodeptr++) = (0x40 | (((size) & 0x01) << 3) | ((((reg) >> 3) & 0x01) << 2) | ((((index) >> 3) & 0x01) << 1) | (((rm) >> 3) & 0x01)); \ - } - - -#define x86_64_emit_byte_rex(reg,index,rm) \ - *(cd->mcodeptr++) = (0x40 | ((((reg) >> 3) & 0x01) << 2) | ((((index) >> 3) & 0x01) << 1) | (((rm) >> 3) & 0x01)); - - -#define x86_64_emit_mem(r,disp) \ - do { \ - x86_64_address_byte(0,(r),5); \ - x86_64_emit_imm32((disp)); \ - } while (0) - - -#define x86_64_emit_membase(basereg,disp,dreg) \ - do { \ - if ((basereg) == REG_SP || (basereg) == R12) { \ - if ((disp) == 0) { \ - x86_64_address_byte(0,(dreg),REG_SP); \ - x86_64_address_byte(0,REG_SP,REG_SP); \ - } else if (IS_IMM8((disp))) { \ - x86_64_address_byte(1,(dreg),REG_SP); \ - x86_64_address_byte(0,REG_SP,REG_SP); \ - x86_64_emit_imm8((disp)); \ - } else { \ - x86_64_address_byte(2,(dreg),REG_SP); \ - x86_64_address_byte(0,REG_SP,REG_SP); \ - x86_64_emit_imm32((disp)); \ - } \ - break; \ - } \ - if ((disp) == 0 && (basereg) != RBP && (basereg) != R13) { \ - x86_64_address_byte(0,(dreg),(basereg)); \ - break; \ - } \ - \ - if ((basereg) == RIP) { \ - x86_64_address_byte(0,(dreg),RBP); \ - x86_64_emit_imm32((disp)); \ - break; \ - } \ - \ - if (IS_IMM8((disp))) { \ - x86_64_address_byte(1,(dreg),(basereg)); \ - x86_64_emit_imm8((disp)); \ - } else { \ - x86_64_address_byte(2,(dreg),(basereg)); \ - x86_64_emit_imm32((disp)); \ - } \ - } while (0) - - -#define x86_64_emit_membase32(basereg,disp,dreg) \ - do { \ - if ((basereg) == REG_SP || (basereg) == R12) { \ - x86_64_address_byte(2,(dreg),REG_SP); \ - x86_64_address_byte(0,REG_SP,REG_SP); \ - x86_64_emit_imm32((disp)); \ - } else {\ - x86_64_address_byte(2,(dreg),(basereg)); \ - x86_64_emit_imm32((disp)); \ - } \ - } while (0) - - -#define x86_64_emit_memindex(reg,disp,basereg,indexreg,scale) \ - do { \ - if ((basereg) == -1) { \ - x86_64_address_byte(0,(reg),4); \ - x86_64_address_byte((scale),(indexreg),5); \ - x86_64_emit_imm32((disp)); \ - \ - } else if ((disp) == 0 && (basereg) != RBP && (basereg) != R13) { \ - x86_64_address_byte(0,(reg),4); \ - x86_64_address_byte((scale),(indexreg),(basereg)); \ - \ - } else if (IS_IMM8((disp))) { \ - x86_64_address_byte(1,(reg),4); \ - x86_64_address_byte((scale),(indexreg),(basereg)); \ - x86_64_emit_imm8 ((disp)); \ - \ - } else { \ - x86_64_address_byte(2,(reg),4); \ - x86_64_address_byte((scale),(indexreg),(basereg)); \ - x86_64_emit_imm32((disp)); \ - } \ - } while (0) - - -#define x86_64_emit_imm8(imm) \ - *(cd->mcodeptr++) = (u1) ((imm) & 0xff); - - -#define x86_64_emit_imm16(imm) \ - do { \ - x86_64_imm_buf imb; \ - imb.i = (s4) (imm); \ - *(cd->mcodeptr++) = imb.b[0]; \ - *(cd->mcodeptr++) = imb.b[1]; \ - } while (0) - - -#define x86_64_emit_imm32(imm) \ - do { \ - x86_64_imm_buf imb; \ - imb.i = (s4) (imm); \ - *(cd->mcodeptr++) = imb.b[0]; \ - *(cd->mcodeptr++) = imb.b[1]; \ - *(cd->mcodeptr++) = imb.b[2]; \ - *(cd->mcodeptr++) = imb.b[3]; \ - } while (0) - - -#define x86_64_emit_imm64(imm) \ - do { \ - x86_64_imm_buf imb; \ - imb.l = (s8) (imm); \ - *(cd->mcodeptr++) = imb.b[0]; \ - *(cd->mcodeptr++) = imb.b[1]; \ - *(cd->mcodeptr++) = imb.b[2]; \ - *(cd->mcodeptr++) = imb.b[3]; \ - *(cd->mcodeptr++) = imb.b[4]; \ - *(cd->mcodeptr++) = imb.b[5]; \ - *(cd->mcodeptr++) = imb.b[6]; \ - *(cd->mcodeptr++) = imb.b[7]; \ - } while (0) - - /* additional functions and macros to generate code ***************************/ #define CALCOFFSETBYTES(var, reg, val) \ @@ -371,42 +160,45 @@ typedef enum { /* macros to create code ******************************************************/ -#define M_MOV(a,b) x86_64_mov_reg_reg(cd, (a), (b)) -#define M_MOV_IMM(a,b) x86_64_mov_imm_reg(cd, (u8) (a), (b)) +#define M_MOV(a,b) emit_mov_reg_reg(cd, (a), (b)) +#define M_MOV_IMM(a,b) emit_mov_imm_reg(cd, (u8) (a), (b)) + +#define M_FMOV(a,b) emit_movq_reg_reg(cd, (a), (b)) -#define M_FMOV(a,b) x86_64_movq_reg_reg(cd, (a), (b)) +#define M_IMOV_IMM(a,b) emit_movl_imm_reg(cd, (u4) (a), (b)) -#define M_IMOV_IMM(a,b) x86_64_movl_imm_reg(cd, (u4) (a), (b)) +#define M_ILD(a,b,disp) emit_movl_membase_reg(cd, (b), (disp), (a)) +#define M_LLD(a,b,disp) emit_mov_membase_reg(cd, (b), (disp), (a)) -#define M_ILD(a,b,disp) x86_64_movl_membase_reg(cd, (b), (disp), (a)) -#define M_LLD(a,b,disp) x86_64_mov_membase_reg(cd, (b), (disp), (a)) +#define M_ILD32(a,b,disp) emit_movl_membase32_reg(cd, (b), (disp), (a)) +#define M_LLD32(a,b,disp) emit_mov_membase32_reg(cd, (b), (disp), (a)) -#define M_ILD32(a,b,disp) x86_64_movl_membase32_reg(cd, (b), (disp), (a)) -#define M_LLD32(a,b,disp) x86_64_mov_membase32_reg(cd, (b), (disp), (a)) +#define M_IST(a,b,disp) emit_movl_reg_membase(cd, (a), (b), (disp)) +#define M_LST(a,b,disp) emit_mov_reg_membase(cd, (a), (b), (disp)) -#define M_IST(a,b,disp) x86_64_movl_reg_membase(cd, (a), (b), (disp)) -#define M_LST(a,b,disp) x86_64_mov_reg_membase(cd, (a), (b), (disp)) +#define M_IST_IMM(a,b,disp) emit_movl_imm_membase(cd, (a), (b), (disp)) +#define M_LST_IMM32(a,b,disp) emit_mov_imm_membase(cd, (a), (b), (disp)) -#define M_IST_IMM(a,b,disp) x86_64_movl_imm_membase(cd, (a), (b), (disp)) -#define M_LST_IMM32(a,b,disp) x86_64_mov_imm_membase(cd, (a), (b), (disp)) +#define M_IST32(a,b,disp) emit_movl_reg_membase32(cd, (a), (b), (disp)) +#define M_LST32(a,b,disp) emit_mov_reg_membase32(cd, (a), (b), (disp)) -#define M_IST32(a,b,disp) x86_64_movl_reg_membase32(cd, (a), (b), (disp)) -#define M_LST32(a,b,disp) x86_64_mov_reg_membase32(cd, (a), (b), (disp)) +#define M_IST32_IMM(a,b,disp) emit_movl_imm_membase32(cd, (a), (b), (disp)) +#define M_LST32_IMM32(a,b,disp) emit_mov_imm_membase32(cd, (a), (b), (disp)) -#define M_IST32_IMM(a,b,disp) x86_64_movl_imm_membase32(cd, (a), (b), (disp)) -#define M_LST32_IMM32(a,b,disp) x86_64_mov_imm_membase32(cd, (a), (b), (disp)) +#define M_IADD(a,b) emit_alul_reg_reg(cd, ALU_ADD, (a), (b)) +#define M_IADD_IMM(a,b) emit_alul_reg_reg(cd, ALU_ADD, (a), (b)) -#define M_LADD(a,b) x86_64_alu_reg_reg(cd, X86_64_ADD, (a), (b)) -#define M_LADD_IMM(a,b) x86_64_alu_imm_reg(cd, X86_64_ADD, (a), (b)) -#define M_LSUB(a,b) x86_64_alu_reg_reg(cd, X86_64_SUB, (a), (b)) -#define M_LSUB_IMM(a,b) x86_64_alu_imm_reg(cd, X86_64_SUB, (a), (b)) +#define M_LADD(a,b) emit_alu_reg_reg(cd, ALU_ADD, (a), (b)) +#define M_LADD_IMM(a,b) emit_alu_imm_reg(cd, ALU_ADD, (a), (b)) +#define M_LSUB(a,b) emit_alu_reg_reg(cd, ALU_SUB, (a), (b)) +#define M_LSUB_IMM(a,b) emit_alu_imm_reg(cd, ALU_SUB, (a), (b)) -#define M_IINC_MEMBASE(a,b) x86_64_incl_membase(cd, (a), (b)) +#define M_IINC_MEMBASE(a,b) emit_incl_membase(cd, (a), (b)) -#define M_IADD_MEMBASE(a,b,c) x86_64_alul_reg_membase(cd, X86_64_ADD, (a), (b), (c)) -#define M_IADC_MEMBASE(a,b,c) x86_64_alul_reg_membase(cd, X86_64_ADC, (a), (b), (c)) -#define M_ISUB_MEMBASE(a,b,c) x86_64_alul_reg_membase(cd, X86_64_SUB, (a), (b), (c)) -#define M_ISBB_MEMBASE(a,b,c) x86_64_alul_reg_membase(cd, X86_64_SBB, (a), (b), (c)) +#define M_IADD_MEMBASE(a,b,c) emit_alul_reg_membase(cd, ALU_ADD, (a), (b), (c)) +#define M_IADC_MEMBASE(a,b,c) emit_alul_reg_membase(cd, ALU_ADC, (a), (b), (c)) +#define M_ISUB_MEMBASE(a,b,c) emit_alul_reg_membase(cd, ALU_SUB, (a), (b), (c)) +#define M_ISBB_MEMBASE(a,b,c) emit_alul_reg_membase(cd, ALU_SBB, (a), (b), (c)) #define M_ALD(a,b,disp) M_LLD(a,b,disp) #define M_ALD32(a,b,disp) M_LLD32(a,b,disp) @@ -418,88 +210,101 @@ typedef enum { #define M_AADD_IMM(a,b) M_LADD_IMM(a,b) #define M_ASUB_IMM(a,b) M_LSUB_IMM(a,b) -#define M_LADD_IMM32(a,b) x86_64_alu_imm32_reg(cd, X86_64_ADD, (a), (b)) +#define M_LADD_IMM32(a,b) emit_alu_imm32_reg(cd, ALU_ADD, (a), (b)) #define M_AADD_IMM32(a,b) M_LADD_IMM32(a,b) -#define M_LSUB_IMM32(a,b) x86_64_alu_imm32_reg(cd, X86_64_SUB, (a), (b)) +#define M_LSUB_IMM32(a,b) emit_alu_imm32_reg(cd, ALU_SUB, (a), (b)) -#define M_ILEA(a,b,c) x86_64_leal_membase_reg(cd, (a), (b), (c)) -#define M_LLEA(a,b,c) x86_64_lea_membase_reg(cd, (a), (b), (c)) +#define M_ILEA(a,b,c) emit_leal_membase_reg(cd, (a), (b), (c)) +#define M_LLEA(a,b,c) emit_lea_membase_reg(cd, (a), (b), (c)) #define M_ALEA(a,b,c) M_LLEA(a,b,c) -#define M_INEG(a) x86_64_negl_reg(cd, (a)) -#define M_LNEG(a) x86_64_neg_reg(cd, (a)) +#define M_INEG(a) emit_negl_reg(cd, (a)) +#define M_LNEG(a) emit_neg_reg(cd, (a)) + +#define M_INEG_MEMBASE(a,b) emit_negl_membase(cd, (a), (b)) +#define M_LNEG_MEMBASE(a,b) emit_neg_membase(cd, (a), (b)) + +#define M_AND(a,b) emit_alu_reg_reg(cd, ALU_AND, (a), (b)) +#define M_XOR(a,b) emit_alu_reg_reg(cd, ALU_XOR, (a), (b)) + +#define M_IAND(a,b) emit_alul_reg_reg(cd, ALU_AND, (a), (b)) +#define M_IAND_IMM(a,b) emit_alul_imm_reg(cd, ALU_AND, (a), (b)) +#define M_IXOR(a,b) emit_alul_reg_reg(cd, ALU_XOR, (a), (b)) + +#define M_BSEXT(a,b) emit_movsbq_reg_reg(cd, (a), (b)) +#define M_SSEXT(a,b) emit_movswq_reg_reg(cd, (a), (b)) +#define M_ISEXT(a,b) emit_movslq_reg_reg(cd, (a), (b)) -#define M_INEG_MEMBASE(a,b) x86_64_negl_membase(cd, (a), (b)) -#define M_LNEG_MEMBASE(a,b) x86_64_neg_membase(cd, (a), (b)) +#define M_CZEXT(a,b) emit_movzwq_reg_reg(cd, (a), (b)) -#define M_AND(a,b) x86_64_alu_reg_reg(cd, X86_64_AND, (a), (b)) -#define M_XOR(a,b) x86_64_alu_reg_reg(cd, X86_64_XOR, (a), (b)) +#define M_BSEXT_MEMBASE(a,disp,b) emit_movsbq_membase_reg(cd, (a), (disp), (b)) +#define M_SSEXT_MEMBASE(a,disp,b) emit_movswq_membase_reg(cd, (a), (disp), (b)) +#define M_ISEXT_MEMBASE(a,disp,b) emit_movslq_membase_reg(cd, (a), (disp), (b)) -#define M_IAND(a,b) x86_64_alul_reg_reg(cd, X86_64_AND, (a), (b)) -#define M_IAND_IMM(a,b) x86_64_alul_imm_reg(cd, X86_64_AND, (a), (b)) -#define M_IXOR(a,b) x86_64_alul_reg_reg(cd, X86_64_XOR, (a), (b)) +#define M_CZEXT_MEMBASE(a,disp,b) emit_movzwq_membase_reg(cd, (a), (disp), (b)) -#define M_TEST(a) x86_64_test_reg_reg(cd, (a), (a)) -#define M_ITEST(a) x86_64_testl_reg_reg(cd, (a), (a)) +#define M_TEST(a) emit_test_reg_reg(cd, (a), (a)) +#define M_ITEST(a) emit_testl_reg_reg(cd, (a), (a)) -#define M_CMP(a,b) x86_64_alu_reg_reg(cd, X86_64_CMP, (a), (b)) -#define M_CMP_IMM(a,b) x86_64_alu_imm_reg(cd, X86_64_CMP, (a), (b)) -#define M_CMP_IMM_MEMBASE(a,b,c) x86_64_alu_imm_membase(cd, X86_64_CMP, (a), (b), (c)) -#define M_CMP_MEMBASE(a,b,c) x86_64_alu_membase_reg(cd, X86_64_CMP, (a), (b), (c)) +#define M_CMP(a,b) emit_alu_reg_reg(cd, ALU_CMP, (a), (b)) +#define M_CMP_IMM(a,b) emit_alu_imm_reg(cd, ALU_CMP, (a), (b)) +#define M_CMP_IMM_MEMBASE(a,b,c) emit_alu_imm_membase(cd, ALU_CMP, (a), (b), (c)) +#define M_CMP_MEMBASE(a,b,c) emit_alu_membase_reg(cd, ALU_CMP, (a), (b), (c)) -#define M_ICMP(a,b) x86_64_alul_reg_reg(cd, X86_64_CMP, (a), (b)) -#define M_ICMP_IMM(a,b) x86_64_alul_imm_reg(cd, X86_64_CMP, (a), (b)) -#define M_ICMP_IMM_MEMBASE(a,b,c) x86_64_alul_imm_membase(cd, X86_64_CMP, (a), (b), (c)) +#define M_ICMP(a,b) emit_alul_reg_reg(cd, ALU_CMP, (a), (b)) +#define M_ICMP_IMM(a,b) emit_alul_imm_reg(cd, ALU_CMP, (a), (b)) +#define M_ICMP_IMM_MEMBASE(a,b,c) emit_alul_imm_membase(cd, ALU_CMP, (a), (b), (c)) -#define M_BEQ(disp) x86_64_jcc(cd, X86_64_CC_E, (disp)) -#define M_BNE(disp) x86_64_jcc(cd, X86_64_CC_NE, (disp)) -#define M_BLE(disp) x86_64_jcc(cd, X86_64_CC_LE, (disp)) -#define M_BAE(disp) x86_64_jcc(cd, X86_64_CC_AE, (disp)) -#define M_BA(disp) x86_64_jcc(cd, X86_64_CC_A, (disp)) +#define M_BEQ(disp) emit_jcc(cd, CC_E, (disp)) +#define M_BNE(disp) emit_jcc(cd, CC_NE, (disp)) +#define M_BLT(disp) emit_jcc(cd, CC_L, (disp)) +#define M_BLE(disp) emit_jcc(cd, CC_LE, (disp)) +#define M_BAE(disp) emit_jcc(cd, CC_AE, (disp)) +#define M_BA(disp) emit_jcc(cd, CC_A, (disp)) -#define M_CMOVEQ(a,b) x86_64_cmovcc_reg_reg(cd, X86_64_CC_E, (a), (b)) -#define M_CMOVNE(a,b) x86_64_cmovcc_reg_reg(cd, X86_64_CC_NE, (a), (b)) -#define M_CMOVLT(a,b) x86_64_cmovcc_reg_reg(cd, X86_64_CC_L, (a), (b)) -#define M_CMOVLE(a,b) x86_64_cmovcc_reg_reg(cd, X86_64_CC_LE, (a), (b)) -#define M_CMOVGE(a,b) x86_64_cmovcc_reg_reg(cd, X86_64_CC_GE, (a), (b)) -#define M_CMOVGT(a,b) x86_64_cmovcc_reg_reg(cd, X86_64_CC_G, (a), (b)) +#define M_CMOVEQ(a,b) emit_cmovcc_reg_reg(cd, CC_E, (a), (b)) +#define M_CMOVNE(a,b) emit_cmovcc_reg_reg(cd, CC_NE, (a), (b)) +#define M_CMOVLT(a,b) emit_cmovcc_reg_reg(cd, CC_L, (a), (b)) +#define M_CMOVLE(a,b) emit_cmovcc_reg_reg(cd, CC_LE, (a), (b)) +#define M_CMOVGE(a,b) emit_cmovcc_reg_reg(cd, CC_GE, (a), (b)) +#define M_CMOVGT(a,b) emit_cmovcc_reg_reg(cd, CC_G, (a), (b)) -#define M_CMOVEQ_MEMBASE(a,b,c) x86_64_cmovcc_reg_membase(cd, X86_64_CC_E, (a), (b)) -#define M_CMOVNE_MEMBASE(a,b,c) x86_64_cmovcc_reg_membase(cd, X86_64_CC_NE, (a), (b)) -#define M_CMOVLT_MEMBASE(a,b,c) x86_64_cmovcc_reg_membase(cd, X86_64_CC_L, (a), (b)) -#define M_CMOVLE_MEMBASE(a,b,c) x86_64_cmovcc_reg_membase(cd, X86_64_CC_LE, (a), (b)) -#define M_CMOVGE_MEMBASE(a,b,c) x86_64_cmovcc_reg_membase(cd, X86_64_CC_GE, (a), (b)) -#define M_CMOVGT_MEMBASE(a,b,c) x86_64_cmovcc_reg_membase(cd, X86_64_CC_G, (a), (b)) +#define M_CMOVEQ_MEMBASE(a,b,c) emit_cmovcc_reg_membase(cd, CC_E, (a), (b)) +#define M_CMOVNE_MEMBASE(a,b,c) emit_cmovcc_reg_membase(cd, CC_NE, (a), (b)) +#define M_CMOVLT_MEMBASE(a,b,c) emit_cmovcc_reg_membase(cd, CC_L, (a), (b)) +#define M_CMOVLE_MEMBASE(a,b,c) emit_cmovcc_reg_membase(cd, CC_LE, (a), (b)) +#define M_CMOVGE_MEMBASE(a,b,c) emit_cmovcc_reg_membase(cd, CC_GE, (a), (b)) +#define M_CMOVGT_MEMBASE(a,b,c) emit_cmovcc_reg_membase(cd, CC_G, (a), (b)) -#define M_CMOVB(a,b) x86_64_cmovcc_reg_reg(cd, X86_64_CC_B, (a), (b)) -#define M_CMOVA(a,b) x86_64_cmovcc_reg_reg(cd, X86_64_CC_A, (a), (b)) -#define M_CMOVP(a,b) x86_64_cmovcc_reg_reg(cd, X86_64_CC_P, (a), (b)) +#define M_CMOVB(a,b) emit_cmovcc_reg_reg(cd, CC_B, (a), (b)) +#define M_CMOVA(a,b) emit_cmovcc_reg_reg(cd, CC_A, (a), (b)) +#define M_CMOVP(a,b) emit_cmovcc_reg_reg(cd, CC_P, (a), (b)) -#define M_PUSH(a) x86_64_push_reg(cd, (a)) -#define M_PUSH_IMM(a) x86_64_push_imm(cd, (a)) -#define M_POP(a) x86_64_pop_reg(cd, (a)) +#define M_PUSH(a) emit_push_reg(cd, (a)) +#define M_PUSH_IMM(a) emit_push_imm(cd, (a)) +#define M_POP(a) emit_pop_reg(cd, (a)) -#define M_JMP(a) x86_64_jmp_reg(cd, (a)) -#define M_JMP_IMM(a) x86_64_jmp_imm(cd, (a)) -#define M_CALL(a) x86_64_call_reg(cd, (a)) -#define M_CALL_IMM(a) x86_64_call_imm(cd, (a)) -#define M_RET x86_64_ret(cd) +#define M_JMP(a) emit_jmp_reg(cd, (a)) +#define M_JMP_IMM(a) emit_jmp_imm(cd, (a)) +#define M_CALL(a) emit_call_reg(cd, (a)) +#define M_CALL_IMM(a) emit_call_imm(cd, (a)) +#define M_RET emit_ret(cd) -#define M_NOP x86_64_nop(cd) +#define M_NOP emit_nop(cd) #define M_CLR(a) M_XOR(a,a) #if 0 -#define M_FLD(a,b,c) x86_64_movlps_membase_reg(cd, (a), (b), (c)) -#define M_DLD(a,b,c) x86_64_movlpd_membase_reg(cd, (a), (b), (c)) +#define M_FLD(a,b,c) emit_movlps_membase_reg(cd, (a), (b), (c)) +#define M_DLD(a,b,c) emit_movlpd_membase_reg(cd, (a), (b), (c)) -#define M_FST(a,b,c) x86_64_movlps_reg_membase(cd, (a), (b), (c)) -#define M_DST(a,b,c) x86_64_movlpd_reg_membase(cd, (a), (b), (c)) +#define M_FST(a,b,c) emit_movlps_reg_membase(cd, (a), (b), (c)) +#define M_DST(a,b,c) emit_movlpd_reg_membase(cd, (a), (b), (c)) #endif -#define M_DLD(a,b,disp) x86_64_movq_membase_reg(cd, (b), (disp), (a)) -#define M_DST(a,b,disp) x86_64_movq_reg_membase(cd, (a), (b), (disp)) +#define M_DLD(a,b,disp) emit_movq_membase_reg(cd, (b), (disp), (a)) +#define M_DST(a,b,disp) emit_movq_reg_membase(cd, (a), (b), (disp)) /* system instructions ********************************************************/ diff --git a/src/vm/jit/x86_64/emit.c b/src/vm/jit/x86_64/emit.c index 976016339..b2e9b94ae 100644 --- a/src/vm/jit/x86_64/emit.c +++ b/src/vm/jit/x86_64/emit.c @@ -28,7 +28,7 @@ Changes: - $Id: emit.c 4828 2006-04-24 16:24:49Z twisti $ + $Id: emit.c 4853 2006-04-27 12:33:20Z twisti $ */ @@ -278,9 +278,9 @@ void emit_cmovxx(codegendata *cd, instruction *iptr, s4 s, s4 d) } -/* code generation functions */ +/* code generation functions **************************************************/ -void x86_64_emit_ialu(codegendata *cd, s4 alu_op, stackptr src, instruction *iptr) +void emit_ialu(codegendata *cd, s4 alu_op, stackptr src, instruction *iptr) { s4 s1 = src->prev->regoff; s4 s2 = src->regoff; @@ -289,71 +289,71 @@ void x86_64_emit_ialu(codegendata *cd, s4 alu_op, stackptr src, instruction *ipt if (iptr->dst->flags & INMEMORY) { if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { if (s2 == d) { - x86_64_movl_membase_reg(cd, REG_SP, s1 * 8, REG_ITMP1); - x86_64_alul_reg_membase(cd, alu_op, REG_ITMP1, REG_SP, d * 8); + emit_movl_membase_reg(cd, REG_SP, s1 * 8, REG_ITMP1); + emit_alul_reg_membase(cd, alu_op, REG_ITMP1, REG_SP, d * 8); } else if (s1 == d) { - x86_64_movl_membase_reg(cd, REG_SP, s2 * 8, REG_ITMP1); - x86_64_alul_reg_membase(cd, alu_op, REG_ITMP1, REG_SP, d * 8); + emit_movl_membase_reg(cd, REG_SP, s2 * 8, REG_ITMP1); + emit_alul_reg_membase(cd, alu_op, REG_ITMP1, REG_SP, d * 8); } else { - x86_64_movl_membase_reg(cd, REG_SP, s1 * 8, REG_ITMP1); - x86_64_alul_membase_reg(cd, alu_op, REG_SP, s2 * 8, REG_ITMP1); - x86_64_movl_reg_membase(cd, REG_ITMP1, REG_SP, d * 8); + emit_movl_membase_reg(cd, REG_SP, s1 * 8, REG_ITMP1); + emit_alul_membase_reg(cd, alu_op, REG_SP, s2 * 8, REG_ITMP1); + emit_movl_reg_membase(cd, REG_ITMP1, REG_SP, d * 8); } } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { if (s2 == d) { - x86_64_alul_reg_membase(cd, alu_op, s1, REG_SP, d * 8); + emit_alul_reg_membase(cd, alu_op, s1, REG_SP, d * 8); } else { - x86_64_movl_membase_reg(cd, REG_SP, s2 * 8, REG_ITMP1); - x86_64_alul_reg_reg(cd, alu_op, s1, REG_ITMP1); - x86_64_movl_reg_membase(cd, REG_ITMP1, REG_SP, d * 8); + emit_movl_membase_reg(cd, REG_SP, s2 * 8, REG_ITMP1); + emit_alul_reg_reg(cd, alu_op, s1, REG_ITMP1); + emit_movl_reg_membase(cd, REG_ITMP1, REG_SP, d * 8); } } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { if (s1 == d) { - x86_64_alul_reg_membase(cd, alu_op, s2, REG_SP, d * 8); + emit_alul_reg_membase(cd, alu_op, s2, REG_SP, d * 8); } else { - x86_64_movl_membase_reg(cd, REG_SP, s1 * 8, REG_ITMP1); - x86_64_alul_reg_reg(cd, alu_op, s2, REG_ITMP1); - x86_64_movl_reg_membase(cd, REG_ITMP1, REG_SP, d * 8); + emit_movl_membase_reg(cd, REG_SP, s1 * 8, REG_ITMP1); + emit_alul_reg_reg(cd, alu_op, s2, REG_ITMP1); + emit_movl_reg_membase(cd, REG_ITMP1, REG_SP, d * 8); } } else { - x86_64_movl_reg_membase(cd, s1, REG_SP, d * 8); - x86_64_alul_reg_membase(cd, alu_op, s2, REG_SP, d * 8); + emit_movl_reg_membase(cd, s1, REG_SP, d * 8); + emit_alul_reg_membase(cd, alu_op, s2, REG_SP, d * 8); } } else { if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - x86_64_movl_membase_reg(cd, REG_SP, s1 * 8, d); - x86_64_alul_membase_reg(cd, alu_op, REG_SP, s2 * 8, d); + emit_movl_membase_reg(cd, REG_SP, s1 * 8, d); + emit_alul_membase_reg(cd, alu_op, REG_SP, s2 * 8, d); } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { M_INTMOVE(s1, d); - x86_64_alul_membase_reg(cd, alu_op, REG_SP, s2 * 8, d); + emit_alul_membase_reg(cd, alu_op, REG_SP, s2 * 8, d); } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { M_INTMOVE(s2, d); - x86_64_alul_membase_reg(cd, alu_op, REG_SP, s1 * 8, d); + emit_alul_membase_reg(cd, alu_op, REG_SP, s1 * 8, d); } else { if (s2 == d) { - x86_64_alul_reg_reg(cd, alu_op, s1, d); + emit_alul_reg_reg(cd, alu_op, s1, d); } else { M_INTMOVE(s1, d); - x86_64_alul_reg_reg(cd, alu_op, s2, d); + emit_alul_reg_reg(cd, alu_op, s2, d); } } } } -void x86_64_emit_lalu(codegendata *cd, s4 alu_op, stackptr src, instruction *iptr) +void emit_lalu(codegendata *cd, s4 alu_op, stackptr src, instruction *iptr) { s4 s1 = src->prev->regoff; s4 s2 = src->regoff; @@ -362,71 +362,71 @@ void x86_64_emit_lalu(codegendata *cd, s4 alu_op, stackptr src, instruction *ipt if (iptr->dst->flags & INMEMORY) { if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { if (s2 == d) { - x86_64_mov_membase_reg(cd, REG_SP, s1 * 8, REG_ITMP1); - x86_64_alu_reg_membase(cd, alu_op, REG_ITMP1, REG_SP, d * 8); + emit_mov_membase_reg(cd, REG_SP, s1 * 8, REG_ITMP1); + emit_alu_reg_membase(cd, alu_op, REG_ITMP1, REG_SP, d * 8); } else if (s1 == d) { - x86_64_mov_membase_reg(cd, REG_SP, s2 * 8, REG_ITMP1); - x86_64_alu_reg_membase(cd, alu_op, REG_ITMP1, REG_SP, d * 8); + emit_mov_membase_reg(cd, REG_SP, s2 * 8, REG_ITMP1); + emit_alu_reg_membase(cd, alu_op, REG_ITMP1, REG_SP, d * 8); } else { - x86_64_mov_membase_reg(cd, REG_SP, s1 * 8, REG_ITMP1); - x86_64_alu_membase_reg(cd, alu_op, REG_SP, s2 * 8, REG_ITMP1); - x86_64_mov_reg_membase(cd, REG_ITMP1, REG_SP, d * 8); + emit_mov_membase_reg(cd, REG_SP, s1 * 8, REG_ITMP1); + emit_alu_membase_reg(cd, alu_op, REG_SP, s2 * 8, REG_ITMP1); + emit_mov_reg_membase(cd, REG_ITMP1, REG_SP, d * 8); } } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { if (s2 == d) { - x86_64_alu_reg_membase(cd, alu_op, s1, REG_SP, d * 8); + emit_alu_reg_membase(cd, alu_op, s1, REG_SP, d * 8); } else { - x86_64_mov_membase_reg(cd, REG_SP, s2 * 8, REG_ITMP1); - x86_64_alu_reg_reg(cd, alu_op, s1, REG_ITMP1); - x86_64_mov_reg_membase(cd, REG_ITMP1, REG_SP, d * 8); + emit_mov_membase_reg(cd, REG_SP, s2 * 8, REG_ITMP1); + emit_alu_reg_reg(cd, alu_op, s1, REG_ITMP1); + emit_mov_reg_membase(cd, REG_ITMP1, REG_SP, d * 8); } } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { if (s1 == d) { - x86_64_alu_reg_membase(cd, alu_op, s2, REG_SP, d * 8); + emit_alu_reg_membase(cd, alu_op, s2, REG_SP, d * 8); } else { - x86_64_mov_membase_reg(cd, REG_SP, s1 * 8, REG_ITMP1); - x86_64_alu_reg_reg(cd, alu_op, s2, REG_ITMP1); - x86_64_mov_reg_membase(cd, REG_ITMP1, REG_SP, d * 8); + emit_mov_membase_reg(cd, REG_SP, s1 * 8, REG_ITMP1); + emit_alu_reg_reg(cd, alu_op, s2, REG_ITMP1); + emit_mov_reg_membase(cd, REG_ITMP1, REG_SP, d * 8); } } else { - x86_64_mov_reg_membase(cd, s1, REG_SP, d * 8); - x86_64_alu_reg_membase(cd, alu_op, s2, REG_SP, d * 8); + emit_mov_reg_membase(cd, s1, REG_SP, d * 8); + emit_alu_reg_membase(cd, alu_op, s2, REG_SP, d * 8); } } else { if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - x86_64_mov_membase_reg(cd, REG_SP, s1 * 8, d); - x86_64_alu_membase_reg(cd, alu_op, REG_SP, s2 * 8, d); + emit_mov_membase_reg(cd, REG_SP, s1 * 8, d); + emit_alu_membase_reg(cd, alu_op, REG_SP, s2 * 8, d); } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { M_INTMOVE(s1, d); - x86_64_alu_membase_reg(cd, alu_op, REG_SP, s2 * 8, d); + emit_alu_membase_reg(cd, alu_op, REG_SP, s2 * 8, d); } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { M_INTMOVE(s2, d); - x86_64_alu_membase_reg(cd, alu_op, REG_SP, s1 * 8, d); + emit_alu_membase_reg(cd, alu_op, REG_SP, s1 * 8, d); } else { if (s2 == d) { - x86_64_alu_reg_reg(cd, alu_op, s1, d); + emit_alu_reg_reg(cd, alu_op, s1, d); } else { M_INTMOVE(s1, d); - x86_64_alu_reg_reg(cd, alu_op, s2, d); + emit_alu_reg_reg(cd, alu_op, s2, d); } } } } -void x86_64_emit_ialuconst(codegendata *cd, s4 alu_op, stackptr src, instruction *iptr) +void emit_ialuconst(codegendata *cd, s4 alu_op, stackptr src, instruction *iptr) { s4 s1 = src->regoff; s4 d = iptr->dst->regoff; @@ -434,37 +434,37 @@ void x86_64_emit_ialuconst(codegendata *cd, s4 alu_op, stackptr src, instruction if (iptr->dst->flags & INMEMORY) { if (src->flags & INMEMORY) { if (s1 == d) { - x86_64_alul_imm_membase(cd, alu_op, iptr->val.i, REG_SP, d * 8); + emit_alul_imm_membase(cd, alu_op, iptr->val.i, REG_SP, d * 8); } else { - x86_64_movl_membase_reg(cd, REG_SP, s1 * 8, REG_ITMP1); - x86_64_alul_imm_reg(cd, alu_op, iptr->val.i, REG_ITMP1); - x86_64_movl_reg_membase(cd, REG_ITMP1, REG_SP, d * 8); + emit_movl_membase_reg(cd, REG_SP, s1 * 8, REG_ITMP1); + emit_alul_imm_reg(cd, alu_op, iptr->val.i, REG_ITMP1); + emit_movl_reg_membase(cd, REG_ITMP1, REG_SP, d * 8); } } else { - x86_64_movl_reg_membase(cd, s1, REG_SP, d * 8); - x86_64_alul_imm_membase(cd, alu_op, iptr->val.i, REG_SP, d * 8); + emit_movl_reg_membase(cd, s1, REG_SP, d * 8); + emit_alul_imm_membase(cd, alu_op, iptr->val.i, REG_SP, d * 8); } } else { if (src->flags & INMEMORY) { - x86_64_movl_membase_reg(cd, REG_SP, s1 * 8, d); - x86_64_alul_imm_reg(cd, alu_op, iptr->val.i, d); + emit_movl_membase_reg(cd, REG_SP, s1 * 8, d); + emit_alul_imm_reg(cd, alu_op, iptr->val.i, d); } else { #if 0 M_INTMOVE(s1, d); - x86_64_alul_imm_reg(cd, alu_op, iptr->val.i, d); + emit_alul_imm_reg(cd, alu_op, iptr->val.i, d); #else /* lea addition optimization */ - if ((alu_op == X86_64_ADD) && (s1 != d)) { + if ((alu_op == ALU_ADD) && (s1 != d)) { M_ILEA(s1, iptr->val.i, d); } else { M_INTMOVE(s1, d); - x86_64_alul_imm_reg(cd, alu_op, iptr->val.i, d); + emit_alul_imm_reg(cd, alu_op, iptr->val.i, d); } #endif } @@ -472,7 +472,7 @@ void x86_64_emit_ialuconst(codegendata *cd, s4 alu_op, stackptr src, instruction } -void x86_64_emit_laluconst(codegendata *cd, s4 alu_op, stackptr src, instruction *iptr) +void emit_laluconst(codegendata *cd, s4 alu_op, stackptr src, instruction *iptr) { s4 s1 = src->regoff; s4 d = iptr->dst->regoff; @@ -481,82 +481,82 @@ void x86_64_emit_laluconst(codegendata *cd, s4 alu_op, stackptr src, instruction if (src->flags & INMEMORY) { if (s1 == d) { if (IS_IMM32(iptr->val.l)) { - x86_64_alu_imm_membase(cd, alu_op, iptr->val.l, REG_SP, d * 8); + emit_alu_imm_membase(cd, alu_op, iptr->val.l, REG_SP, d * 8); } else { - x86_64_mov_imm_reg(cd, iptr->val.l, REG_ITMP1); - x86_64_alu_reg_membase(cd, alu_op, REG_ITMP1, REG_SP, d * 8); + emit_mov_imm_reg(cd, iptr->val.l, REG_ITMP1); + emit_alu_reg_membase(cd, alu_op, REG_ITMP1, REG_SP, d * 8); } } else { - x86_64_mov_membase_reg(cd, REG_SP, s1 * 8, REG_ITMP1); + emit_mov_membase_reg(cd, REG_SP, s1 * 8, REG_ITMP1); if (IS_IMM32(iptr->val.l)) { - x86_64_alu_imm_reg(cd, alu_op, iptr->val.l, REG_ITMP1); + emit_alu_imm_reg(cd, alu_op, iptr->val.l, REG_ITMP1); } else { - x86_64_mov_imm_reg(cd, iptr->val.l, REG_ITMP2); - x86_64_alu_reg_reg(cd, alu_op, REG_ITMP2, REG_ITMP1); + emit_mov_imm_reg(cd, iptr->val.l, REG_ITMP2); + emit_alu_reg_reg(cd, alu_op, REG_ITMP2, REG_ITMP1); } - x86_64_mov_reg_membase(cd, REG_ITMP1, REG_SP, d * 8); + emit_mov_reg_membase(cd, REG_ITMP1, REG_SP, d * 8); } } else { - x86_64_mov_reg_membase(cd, s1, REG_SP, d * 8); + emit_mov_reg_membase(cd, s1, REG_SP, d * 8); if (IS_IMM32(iptr->val.l)) { - x86_64_alu_imm_membase(cd, alu_op, iptr->val.l, REG_SP, d * 8); + emit_alu_imm_membase(cd, alu_op, iptr->val.l, REG_SP, d * 8); } else { - x86_64_mov_imm_reg(cd, iptr->val.l, REG_ITMP1); - x86_64_alu_reg_membase(cd, alu_op, REG_ITMP1, REG_SP, d * 8); + emit_mov_imm_reg(cd, iptr->val.l, REG_ITMP1); + emit_alu_reg_membase(cd, alu_op, REG_ITMP1, REG_SP, d * 8); } } } else { #if 0 if (src->flags & INMEMORY) { - x86_64_mov_membase_reg(cd, REG_SP, s1 * 8, d); + emit_mov_membase_reg(cd, REG_SP, s1 * 8, d); } else { M_INTMOVE(s1, d); } if (IS_IMM32(iptr->val.l)) { - x86_64_alu_imm_reg(cd, alu_op, iptr->val.l, d); + emit_alu_imm_reg(cd, alu_op, iptr->val.l, d); } else { - x86_64_mov_imm_reg(cd, iptr->val.l, REG_ITMP1); - x86_64_alu_reg_reg(cd, alu_op, REG_ITMP1, d); + emit_mov_imm_reg(cd, iptr->val.l, REG_ITMP1); + emit_alu_reg_reg(cd, alu_op, REG_ITMP1, d); } #else if (src->flags & INMEMORY) { - x86_64_mov_membase_reg(cd, REG_SP, s1 * 8, d); + emit_mov_membase_reg(cd, REG_SP, s1 * 8, d); if (IS_IMM32(iptr->val.l)) { - x86_64_alu_imm_reg(cd, alu_op, iptr->val.l, d); + emit_alu_imm_reg(cd, alu_op, iptr->val.l, d); } else { - x86_64_mov_imm_reg(cd, iptr->val.l, REG_ITMP1); - x86_64_alu_reg_reg(cd, alu_op, REG_ITMP1, d); + emit_mov_imm_reg(cd, iptr->val.l, REG_ITMP1); + emit_alu_reg_reg(cd, alu_op, REG_ITMP1, d); } } else { if (IS_IMM32(iptr->val.l)) { /* lea addition optimization */ - if ((alu_op == X86_64_ADD) && (s1 != d)) { + if ((alu_op == ALU_ADD) && (s1 != d)) { M_LLEA(s1, iptr->val.l, d); } else { M_INTMOVE(s1, d); - x86_64_alu_imm_reg(cd, alu_op, iptr->val.l, d); + emit_alu_imm_reg(cd, alu_op, iptr->val.l, d); } } else { M_INTMOVE(s1, d); - x86_64_mov_imm_reg(cd, iptr->val.l, REG_ITMP1); - x86_64_alu_reg_reg(cd, alu_op, REG_ITMP1, d); + emit_mov_imm_reg(cd, iptr->val.l, REG_ITMP1); + emit_alu_reg_reg(cd, alu_op, REG_ITMP1, d); } } #endif @@ -564,7 +564,7 @@ void x86_64_emit_laluconst(codegendata *cd, s4 alu_op, stackptr src, instruction } -void x86_64_emit_ishift(codegendata *cd, s4 shift_op, stackptr src, instruction *iptr) +void emit_ishift(codegendata *cd, s4 shift_op, stackptr src, instruction *iptr) { s4 s1 = src->prev->regoff; s4 s2 = src->regoff; @@ -577,12 +577,12 @@ void x86_64_emit_ishift(codegendata *cd, s4 shift_op, stackptr src, instruction if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { if (s1 == d) { M_ILD(RCX, REG_SP, s2 * 8); - x86_64_shiftl_membase(cd, shift_op, REG_SP, d * 8); + emit_shiftl_membase(cd, shift_op, REG_SP, d * 8); } else { M_ILD(RCX, REG_SP, s2 * 8); M_ILD(REG_ITMP2, REG_SP, s1 * 8); - x86_64_shiftl_reg(cd, shift_op, REG_ITMP2); + emit_shiftl_reg(cd, shift_op, REG_ITMP2); M_IST(REG_ITMP2, REG_SP, d * 8); } @@ -604,17 +604,17 @@ void x86_64_emit_ishift(codegendata *cd, s4 shift_op, stackptr src, instruction M_IST(s1, REG_SP, d * 8); } - x86_64_shiftl_membase(cd, shift_op, REG_SP, d * 8); + emit_shiftl_membase(cd, shift_op, REG_SP, d * 8); } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { if (s1 == d) { M_INTMOVE(s2, RCX); - x86_64_shiftl_membase(cd, shift_op, REG_SP, d * 8); + emit_shiftl_membase(cd, shift_op, REG_SP, d * 8); } else { M_INTMOVE(s2, RCX); M_ILD(REG_ITMP2, REG_SP, s1 * 8); - x86_64_shiftl_reg(cd, shift_op, REG_ITMP2); + emit_shiftl_reg(cd, shift_op, REG_ITMP2); M_IST(REG_ITMP2, REG_SP, d * 8); } @@ -622,7 +622,7 @@ void x86_64_emit_ishift(codegendata *cd, s4 shift_op, stackptr src, instruction /* s1 may be equal to RCX */ M_IST(s1, REG_SP, d * 8); M_INTMOVE(s2, RCX); - x86_64_shiftl_membase(cd, shift_op, REG_SP, d * 8); + emit_shiftl_membase(cd, shift_op, REG_SP, d * 8); } M_INTMOVE(REG_ITMP1, RCX); /* restore RCX */ @@ -636,18 +636,18 @@ void x86_64_emit_ishift(codegendata *cd, s4 shift_op, stackptr src, instruction if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { M_ILD(RCX, REG_SP, s2 * 8); M_ILD(d, REG_SP, s1 * 8); - x86_64_shiftl_reg(cd, shift_op, d); + emit_shiftl_reg(cd, shift_op, d); } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { /* s1 may be equal to RCX */ M_INTMOVE(s1, d); M_ILD(RCX, REG_SP, s2 * 8); - x86_64_shiftl_reg(cd, shift_op, d); + emit_shiftl_reg(cd, shift_op, d); } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { M_INTMOVE(s2, RCX); M_ILD(d, REG_SP, s1 * 8); - x86_64_shiftl_reg(cd, shift_op, d); + emit_shiftl_reg(cd, shift_op, d); } else { /* s1 may be equal to RCX */ @@ -669,7 +669,7 @@ void x86_64_emit_ishift(codegendata *cd, s4 shift_op, stackptr src, instruction M_INTMOVE(s2, RCX); M_INTMOVE(s1, d); } - x86_64_shiftl_reg(cd, shift_op, d); + emit_shiftl_reg(cd, shift_op, d); } if (d_old == RCX) @@ -680,7 +680,7 @@ void x86_64_emit_ishift(codegendata *cd, s4 shift_op, stackptr src, instruction } -void x86_64_emit_lshift(codegendata *cd, s4 shift_op, stackptr src, instruction *iptr) +void emit_lshift(codegendata *cd, s4 shift_op, stackptr src, instruction *iptr) { s4 s1 = src->prev->regoff; s4 s2 = src->regoff; @@ -693,12 +693,12 @@ void x86_64_emit_lshift(codegendata *cd, s4 shift_op, stackptr src, instruction if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { if (s1 == d) { M_ILD(RCX, REG_SP, s2 * 8); - x86_64_shift_membase(cd, shift_op, REG_SP, d * 8); + emit_shift_membase(cd, shift_op, REG_SP, d * 8); } else { M_ILD(RCX, REG_SP, s2 * 8); M_LLD(REG_ITMP2, REG_SP, s1 * 8); - x86_64_shift_reg(cd, shift_op, REG_ITMP2); + emit_shift_reg(cd, shift_op, REG_ITMP2); M_LST(REG_ITMP2, REG_SP, d * 8); } @@ -720,17 +720,17 @@ void x86_64_emit_lshift(codegendata *cd, s4 shift_op, stackptr src, instruction M_LST(s1, REG_SP, d * 8); } - x86_64_shift_membase(cd, shift_op, REG_SP, d * 8); + emit_shift_membase(cd, shift_op, REG_SP, d * 8); } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { if (s1 == d) { M_INTMOVE(s2, RCX); - x86_64_shift_membase(cd, shift_op, REG_SP, d * 8); + emit_shift_membase(cd, shift_op, REG_SP, d * 8); } else { M_INTMOVE(s2, RCX); M_LLD(REG_ITMP2, REG_SP, s1 * 8); - x86_64_shift_reg(cd, shift_op, REG_ITMP2); + emit_shift_reg(cd, shift_op, REG_ITMP2); M_LST(REG_ITMP2, REG_SP, d * 8); } @@ -738,7 +738,7 @@ void x86_64_emit_lshift(codegendata *cd, s4 shift_op, stackptr src, instruction /* s1 may be equal to RCX */ M_LST(s1, REG_SP, d * 8); M_INTMOVE(s2, RCX); - x86_64_shift_membase(cd, shift_op, REG_SP, d * 8); + emit_shift_membase(cd, shift_op, REG_SP, d * 8); } M_INTMOVE(REG_ITMP1, RCX); /* restore RCX */ @@ -752,18 +752,18 @@ void x86_64_emit_lshift(codegendata *cd, s4 shift_op, stackptr src, instruction if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { M_ILD(RCX, REG_SP, s2 * 8); M_LLD(d, REG_SP, s1 * 8); - x86_64_shift_reg(cd, shift_op, d); + emit_shift_reg(cd, shift_op, d); } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { /* s1 may be equal to RCX */ M_INTMOVE(s1, d); M_ILD(RCX, REG_SP, s2 * 8); - x86_64_shift_reg(cd, shift_op, d); + emit_shift_reg(cd, shift_op, d); } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { M_INTMOVE(s2, RCX); M_LLD(d, REG_SP, s1 * 8); - x86_64_shift_reg(cd, shift_op, d); + emit_shift_reg(cd, shift_op, d); } else { /* s1 may be equal to RCX */ @@ -785,7 +785,7 @@ void x86_64_emit_lshift(codegendata *cd, s4 shift_op, stackptr src, instruction M_INTMOVE(s2, RCX); M_INTMOVE(s1, d); } - x86_64_shift_reg(cd, shift_op, d); + emit_shift_reg(cd, shift_op, d); } if (d_old == RCX) @@ -796,67 +796,67 @@ void x86_64_emit_lshift(codegendata *cd, s4 shift_op, stackptr src, instruction } -void x86_64_emit_ishiftconst(codegendata *cd, s4 shift_op, stackptr src, instruction *iptr) +void emit_ishiftconst(codegendata *cd, s4 shift_op, stackptr src, instruction *iptr) { s4 s1 = src->regoff; s4 d = iptr->dst->regoff; if ((src->flags & INMEMORY) && (iptr->dst->flags & INMEMORY)) { if (s1 == d) { - x86_64_shiftl_imm_membase(cd, shift_op, iptr->val.i, REG_SP, d * 8); + emit_shiftl_imm_membase(cd, shift_op, iptr->val.i, REG_SP, d * 8); } else { - x86_64_movl_membase_reg(cd, REG_SP, s1 * 8, REG_ITMP1); - x86_64_shiftl_imm_reg(cd, shift_op, iptr->val.i, REG_ITMP1); - x86_64_movl_reg_membase(cd, REG_ITMP1, REG_SP, d * 8); + emit_movl_membase_reg(cd, REG_SP, s1 * 8, REG_ITMP1); + emit_shiftl_imm_reg(cd, shift_op, iptr->val.i, REG_ITMP1); + emit_movl_reg_membase(cd, REG_ITMP1, REG_SP, d * 8); } } else if ((src->flags & INMEMORY) && !(iptr->dst->flags & INMEMORY)) { - x86_64_movl_membase_reg(cd, REG_SP, s1 * 8, d); - x86_64_shiftl_imm_reg(cd, shift_op, iptr->val.i, d); + emit_movl_membase_reg(cd, REG_SP, s1 * 8, d); + emit_shiftl_imm_reg(cd, shift_op, iptr->val.i, d); } else if (!(src->flags & INMEMORY) && (iptr->dst->flags & INMEMORY)) { - x86_64_movl_reg_membase(cd, s1, REG_SP, d * 8); - x86_64_shiftl_imm_membase(cd, shift_op, iptr->val.i, REG_SP, d * 8); + emit_movl_reg_membase(cd, s1, REG_SP, d * 8); + emit_shiftl_imm_membase(cd, shift_op, iptr->val.i, REG_SP, d * 8); } else { M_INTMOVE(s1, d); - x86_64_shiftl_imm_reg(cd, shift_op, iptr->val.i, d); + emit_shiftl_imm_reg(cd, shift_op, iptr->val.i, d); } } -void x86_64_emit_lshiftconst(codegendata *cd, s4 shift_op, stackptr src, instruction *iptr) +void emit_lshiftconst(codegendata *cd, s4 shift_op, stackptr src, instruction *iptr) { s4 s1 = src->regoff; s4 d = iptr->dst->regoff; if ((src->flags & INMEMORY) && (iptr->dst->flags & INMEMORY)) { if (s1 == d) { - x86_64_shift_imm_membase(cd, shift_op, iptr->val.i, REG_SP, d * 8); + emit_shift_imm_membase(cd, shift_op, iptr->val.i, REG_SP, d * 8); } else { - x86_64_mov_membase_reg(cd, REG_SP, s1 * 8, REG_ITMP1); - x86_64_shift_imm_reg(cd, shift_op, iptr->val.i, REG_ITMP1); - x86_64_mov_reg_membase(cd, REG_ITMP1, REG_SP, d * 8); + emit_mov_membase_reg(cd, REG_SP, s1 * 8, REG_ITMP1); + emit_shift_imm_reg(cd, shift_op, iptr->val.i, REG_ITMP1); + emit_mov_reg_membase(cd, REG_ITMP1, REG_SP, d * 8); } } else if ((src->flags & INMEMORY) && !(iptr->dst->flags & INMEMORY)) { - x86_64_mov_membase_reg(cd, REG_SP, s1 * 8, d); - x86_64_shift_imm_reg(cd, shift_op, iptr->val.i, d); + emit_mov_membase_reg(cd, REG_SP, s1 * 8, d); + emit_shift_imm_reg(cd, shift_op, iptr->val.i, d); } else if (!(src->flags & INMEMORY) && (iptr->dst->flags & INMEMORY)) { - x86_64_mov_reg_membase(cd, s1, REG_SP, d * 8); - x86_64_shift_imm_membase(cd, shift_op, iptr->val.i, REG_SP, d * 8); + emit_mov_reg_membase(cd, s1, REG_SP, d * 8); + emit_shift_imm_membase(cd, shift_op, iptr->val.i, REG_SP, d * 8); } else { M_INTMOVE(s1, d); - x86_64_shift_imm_reg(cd, shift_op, iptr->val.i, d); + emit_shift_imm_reg(cd, shift_op, iptr->val.i, d); } } -void x86_64_emit_ifcc(codegendata *cd, s4 if_op, stackptr src, instruction *iptr) +void emit_ifcc(codegendata *cd, s4 if_op, stackptr src, instruction *iptr) { if (src->flags & INMEMORY) M_ICMP_IMM_MEMBASE(iptr->val.i, REG_SP, src->regoff * 8); @@ -871,40 +871,40 @@ void x86_64_emit_ifcc(codegendata *cd, s4 if_op, stackptr src, instruction *iptr don't generate the actual branch. */ if ((iptr->opc & ICMD_CONDITION_MASK) == 0) { - x86_64_jcc(cd, if_op, 0); + emit_jcc(cd, if_op, 0); codegen_addreference(cd, (basicblock *) iptr->target); } } -void x86_64_emit_if_lcc(codegendata *cd, s4 if_op, stackptr src, instruction *iptr) +void emit_if_lcc(codegendata *cd, s4 if_op, stackptr src, instruction *iptr) { s4 s1 = src->regoff; if (src->flags & INMEMORY) { if (IS_IMM32(iptr->val.l)) { - x86_64_alu_imm_membase(cd, X86_64_CMP, iptr->val.l, REG_SP, s1 * 8); + emit_alu_imm_membase(cd, ALU_CMP, iptr->val.l, REG_SP, s1 * 8); } else { - x86_64_mov_imm_reg(cd, iptr->val.l, REG_ITMP1); - x86_64_alu_reg_membase(cd, X86_64_CMP, REG_ITMP1, REG_SP, s1 * 8); + emit_mov_imm_reg(cd, iptr->val.l, REG_ITMP1); + emit_alu_reg_membase(cd, ALU_CMP, REG_ITMP1, REG_SP, s1 * 8); } } else { if (iptr->val.l == 0) { - x86_64_test_reg_reg(cd, s1, s1); + emit_test_reg_reg(cd, s1, s1); } else { if (IS_IMM32(iptr->val.l)) { - x86_64_alu_imm_reg(cd, X86_64_CMP, iptr->val.l, s1); + emit_alu_imm_reg(cd, ALU_CMP, iptr->val.l, s1); } else { - x86_64_mov_imm_reg(cd, iptr->val.l, REG_ITMP1); - x86_64_alu_reg_reg(cd, X86_64_CMP, REG_ITMP1, s1); + emit_mov_imm_reg(cd, iptr->val.l, REG_ITMP1); + emit_alu_reg_reg(cd, ALU_CMP, REG_ITMP1, s1); } } } - x86_64_jcc(cd, if_op, 0); + emit_jcc(cd, if_op, 0); codegen_addreference(cd, (basicblock *) iptr->target); } @@ -915,24 +915,24 @@ void x86_64_emit_if_lcc(codegendata *cd, s4 if_op, stackptr src, instruction *ip *******************************************************************************/ -void x86_64_emit_if_icmpcc(codegendata *cd, s4 if_op, stackptr src, +void emit_if_icmpcc(codegendata *cd, s4 if_op, stackptr src, instruction *iptr) { s4 s1 = src->prev->regoff; s4 s2 = src->regoff; if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - x86_64_movl_membase_reg(cd, REG_SP, s2 * 8, REG_ITMP1); - x86_64_alul_reg_membase(cd, X86_64_CMP, REG_ITMP1, REG_SP, s1 * 8); + emit_movl_membase_reg(cd, REG_SP, s2 * 8, REG_ITMP1); + emit_alul_reg_membase(cd, ALU_CMP, REG_ITMP1, REG_SP, s1 * 8); } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { - x86_64_alul_membase_reg(cd, X86_64_CMP, REG_SP, s2 * 8, s1); + emit_alul_membase_reg(cd, ALU_CMP, REG_SP, s2 * 8, s1); } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - x86_64_alul_reg_membase(cd, X86_64_CMP, s2, REG_SP, s1 * 8); + emit_alul_reg_membase(cd, ALU_CMP, s2, REG_SP, s1 * 8); } else { - x86_64_alul_reg_reg(cd, X86_64_CMP, s2, s1); + emit_alul_reg_reg(cd, ALU_CMP, s2, s1); } @@ -940,62 +940,64 @@ void x86_64_emit_if_icmpcc(codegendata *cd, s4 if_op, stackptr src, don't generate the actual branch. */ if ((iptr->opc & ICMD_CONDITION_MASK) == 0) { - x86_64_jcc(cd, if_op, 0); + emit_jcc(cd, if_op, 0); codegen_addreference(cd, (basicblock *) iptr->target); } } -void x86_64_emit_if_lcmpcc(codegendata *cd, s4 if_op, stackptr src, instruction *iptr) +void emit_if_lcmpcc(codegendata *cd, s4 if_op, stackptr src, instruction *iptr) { s4 s1 = src->prev->regoff; s4 s2 = src->regoff; if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - x86_64_mov_membase_reg(cd, REG_SP, s2 * 8, REG_ITMP1); - x86_64_alu_reg_membase(cd, X86_64_CMP, REG_ITMP1, REG_SP, s1 * 8); + emit_mov_membase_reg(cd, REG_SP, s2 * 8, REG_ITMP1); + emit_alu_reg_membase(cd, ALU_CMP, REG_ITMP1, REG_SP, s1 * 8); } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { - x86_64_alu_membase_reg(cd, X86_64_CMP, REG_SP, s2 * 8, s1); + emit_alu_membase_reg(cd, ALU_CMP, REG_SP, s2 * 8, s1); } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - x86_64_alu_reg_membase(cd, X86_64_CMP, s2, REG_SP, s1 * 8); + emit_alu_reg_membase(cd, ALU_CMP, s2, REG_SP, s1 * 8); } else { - x86_64_alu_reg_reg(cd, X86_64_CMP, s2, s1); + emit_alu_reg_reg(cd, ALU_CMP, s2, s1); } - x86_64_jcc(cd, if_op, 0); + emit_jcc(cd, if_op, 0); codegen_addreference(cd, (basicblock *) iptr->target); } /* low-level code emitter functions *******************************************/ -void x86_64_mov_reg_reg(codegendata *cd, s8 reg, s8 dreg) { - x86_64_emit_rex(1,(reg),0,(dreg)); +void emit_mov_reg_reg(codegendata *cd, s8 reg, s8 dreg) +{ + emit_rex(1,(reg),0,(dreg)); *(cd->mcodeptr++) = 0x89; - x86_64_emit_reg((reg),(dreg)); + emit_reg((reg),(dreg)); } -void x86_64_mov_imm_reg(codegendata *cd, s8 imm, s8 reg) { - x86_64_emit_rex(1,0,0,(reg)); +void emit_mov_imm_reg(codegendata *cd, s8 imm, s8 reg) +{ + emit_rex(1,0,0,(reg)); *(cd->mcodeptr++) = 0xb8 + ((reg) & 0x07); - x86_64_emit_imm64((imm)); + emit_imm64((imm)); } -void x86_64_movl_imm_reg(codegendata *cd, s8 imm, s8 reg) { - x86_64_emit_rex(0,0,0,(reg)); +void emit_movl_imm_reg(codegendata *cd, s8 imm, s8 reg) { + emit_rex(0,0,0,(reg)); *(cd->mcodeptr++) = 0xb8 + ((reg) & 0x07); - x86_64_emit_imm32((imm)); + emit_imm32((imm)); } -void x86_64_mov_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg) { - x86_64_emit_rex(1,(reg),0,(basereg)); +void emit_mov_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg) { + emit_rex(1,(reg),0,(basereg)); *(cd->mcodeptr++) = 0x8b; - x86_64_emit_membase((basereg),(disp),(reg)); + emit_membase((basereg),(disp),(reg)); } @@ -1003,425 +1005,427 @@ void x86_64_mov_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg) { * this one is for INVOKEVIRTUAL/INVOKEINTERFACE to have a * constant membase immediate length of 32bit */ -void x86_64_mov_membase32_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg) { - x86_64_emit_rex(1,(reg),0,(basereg)); +void emit_mov_membase32_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg) { + emit_rex(1,(reg),0,(basereg)); *(cd->mcodeptr++) = 0x8b; - x86_64_emit_membase32((basereg),(disp),(reg)); + emit_membase32((basereg),(disp),(reg)); } -void x86_64_movl_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg) +void emit_movl_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg) { - x86_64_emit_rex(0,(reg),0,(basereg)); + emit_rex(0,(reg),0,(basereg)); *(cd->mcodeptr++) = 0x8b; - x86_64_emit_membase((basereg),(disp),(reg)); + emit_membase((basereg),(disp),(reg)); } /* ATTENTION: Always emit a REX byte, because the instruction size can be smaller when all register indexes are smaller than 7. */ -void x86_64_movl_membase32_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg) +void emit_movl_membase32_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg) { - x86_64_emit_byte_rex((reg),0,(basereg)); + emit_byte_rex((reg),0,(basereg)); *(cd->mcodeptr++) = 0x8b; - x86_64_emit_membase32((basereg),(disp),(reg)); + emit_membase32((basereg),(disp),(reg)); } -void x86_64_mov_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp) { - x86_64_emit_rex(1,(reg),0,(basereg)); +void emit_mov_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp) { + emit_rex(1,(reg),0,(basereg)); *(cd->mcodeptr++) = 0x89; - x86_64_emit_membase((basereg),(disp),(reg)); + emit_membase((basereg),(disp),(reg)); } -void x86_64_mov_reg_membase32(codegendata *cd, s8 reg, s8 basereg, s8 disp) { - x86_64_emit_rex(1,(reg),0,(basereg)); +void emit_mov_reg_membase32(codegendata *cd, s8 reg, s8 basereg, s8 disp) { + emit_rex(1,(reg),0,(basereg)); *(cd->mcodeptr++) = 0x89; - x86_64_emit_membase32((basereg),(disp),(reg)); + emit_membase32((basereg),(disp),(reg)); } -void x86_64_movl_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp) { - x86_64_emit_rex(0,(reg),0,(basereg)); +void emit_movl_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp) { + emit_rex(0,(reg),0,(basereg)); *(cd->mcodeptr++) = 0x89; - x86_64_emit_membase((basereg),(disp),(reg)); + emit_membase((basereg),(disp),(reg)); } /* Always emit a REX byte, because the instruction size can be smaller when */ /* all register indexes are smaller than 7. */ -void x86_64_movl_reg_membase32(codegendata *cd, s8 reg, s8 basereg, s8 disp) { - x86_64_emit_byte_rex((reg),0,(basereg)); +void emit_movl_reg_membase32(codegendata *cd, s8 reg, s8 basereg, s8 disp) { + emit_byte_rex((reg),0,(basereg)); *(cd->mcodeptr++) = 0x89; - x86_64_emit_membase32((basereg),(disp),(reg)); + emit_membase32((basereg),(disp),(reg)); } -void x86_64_mov_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg) { - x86_64_emit_rex(1,(reg),(indexreg),(basereg)); +void emit_mov_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg) { + emit_rex(1,(reg),(indexreg),(basereg)); *(cd->mcodeptr++) = 0x8b; - x86_64_emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); + emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); } -void x86_64_movl_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg) { - x86_64_emit_rex(0,(reg),(indexreg),(basereg)); +void emit_movl_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg) { + emit_rex(0,(reg),(indexreg),(basereg)); *(cd->mcodeptr++) = 0x8b; - x86_64_emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); + emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); } -void x86_64_mov_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale) { - x86_64_emit_rex(1,(reg),(indexreg),(basereg)); +void emit_mov_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale) { + emit_rex(1,(reg),(indexreg),(basereg)); *(cd->mcodeptr++) = 0x89; - x86_64_emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); + emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); } -void x86_64_movl_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale) { - x86_64_emit_rex(0,(reg),(indexreg),(basereg)); +void emit_movl_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale) { + emit_rex(0,(reg),(indexreg),(basereg)); *(cd->mcodeptr++) = 0x89; - x86_64_emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); + emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); } -void x86_64_movw_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale) { +void emit_movw_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale) { *(cd->mcodeptr++) = 0x66; - x86_64_emit_rex(0,(reg),(indexreg),(basereg)); + emit_rex(0,(reg),(indexreg),(basereg)); *(cd->mcodeptr++) = 0x89; - x86_64_emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); + emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); } -void x86_64_movb_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale) { - x86_64_emit_byte_rex((reg),(indexreg),(basereg)); +void emit_movb_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale) { + emit_byte_rex((reg),(indexreg),(basereg)); *(cd->mcodeptr++) = 0x88; - x86_64_emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); + emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); } -void x86_64_mov_imm_membase(codegendata *cd, s8 imm, s8 basereg, s8 disp) { - x86_64_emit_rex(1,0,0,(basereg)); +void emit_mov_imm_membase(codegendata *cd, s8 imm, s8 basereg, s8 disp) { + emit_rex(1,0,0,(basereg)); *(cd->mcodeptr++) = 0xc7; - x86_64_emit_membase((basereg),(disp),0); - x86_64_emit_imm32((imm)); + emit_membase((basereg),(disp),0); + emit_imm32((imm)); } -void x86_64_mov_imm_membase32(codegendata *cd, s8 imm, s8 basereg, s8 disp) { - x86_64_emit_rex(1,0,0,(basereg)); +void emit_mov_imm_membase32(codegendata *cd, s8 imm, s8 basereg, s8 disp) { + emit_rex(1,0,0,(basereg)); *(cd->mcodeptr++) = 0xc7; - x86_64_emit_membase32((basereg),(disp),0); - x86_64_emit_imm32((imm)); + emit_membase32((basereg),(disp),0); + emit_imm32((imm)); } -void x86_64_movl_imm_membase(codegendata *cd, s8 imm, s8 basereg, s8 disp) { - x86_64_emit_rex(0,0,0,(basereg)); +void emit_movl_imm_membase(codegendata *cd, s8 imm, s8 basereg, s8 disp) { + emit_rex(0,0,0,(basereg)); *(cd->mcodeptr++) = 0xc7; - x86_64_emit_membase((basereg),(disp),0); - x86_64_emit_imm32((imm)); + emit_membase((basereg),(disp),0); + emit_imm32((imm)); } /* Always emit a REX byte, because the instruction size can be smaller when */ /* all register indexes are smaller than 7. */ -void x86_64_movl_imm_membase32(codegendata *cd, s8 imm, s8 basereg, s8 disp) { - x86_64_emit_byte_rex(0,0,(basereg)); +void emit_movl_imm_membase32(codegendata *cd, s8 imm, s8 basereg, s8 disp) { + emit_byte_rex(0,0,(basereg)); *(cd->mcodeptr++) = 0xc7; - x86_64_emit_membase32((basereg),(disp),0); - x86_64_emit_imm32((imm)); + emit_membase32((basereg),(disp),0); + emit_imm32((imm)); } -void x86_64_movsbq_reg_reg(codegendata *cd, s8 reg, s8 dreg) { - x86_64_emit_rex(1,(dreg),0,(reg)); +void emit_movsbq_reg_reg(codegendata *cd, s8 reg, s8 dreg) { + emit_rex(1,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0xbe; /* XXX: why do reg and dreg have to be exchanged */ - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_movsbq_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { - x86_64_emit_rex(1,(dreg),0,(basereg)); +void emit_movsbq_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { + emit_rex(1,(dreg),0,(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0xbe; - x86_64_emit_membase((basereg),(disp),(dreg)); + emit_membase((basereg),(disp),(dreg)); } -void x86_64_movswq_reg_reg(codegendata *cd, s8 reg, s8 dreg) { - x86_64_emit_rex(1,(dreg),0,(reg)); +void emit_movswq_reg_reg(codegendata *cd, s8 reg, s8 dreg) { + emit_rex(1,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0xbf; /* XXX: why do reg and dreg have to be exchanged */ - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_movswq_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { - x86_64_emit_rex(1,(dreg),0,(basereg)); +void emit_movswq_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { + emit_rex(1,(dreg),0,(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0xbf; - x86_64_emit_membase((basereg),(disp),(dreg)); + emit_membase((basereg),(disp),(dreg)); } -void x86_64_movslq_reg_reg(codegendata *cd, s8 reg, s8 dreg) { - x86_64_emit_rex(1,(dreg),0,(reg)); +void emit_movslq_reg_reg(codegendata *cd, s8 reg, s8 dreg) { + emit_rex(1,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x63; /* XXX: why do reg and dreg have to be exchanged */ - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_movslq_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { - x86_64_emit_rex(1,(dreg),0,(basereg)); +void emit_movslq_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { + emit_rex(1,(dreg),0,(basereg)); *(cd->mcodeptr++) = 0x63; - x86_64_emit_membase((basereg),(disp),(dreg)); + emit_membase((basereg),(disp),(dreg)); } -void x86_64_movzwq_reg_reg(codegendata *cd, s8 reg, s8 dreg) { - x86_64_emit_rex(1,(dreg),0,(reg)); +void emit_movzwq_reg_reg(codegendata *cd, s8 reg, s8 dreg) { + emit_rex(1,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0xb7; /* XXX: why do reg and dreg have to be exchanged */ - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_movzwq_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { - x86_64_emit_rex(1,(dreg),0,(basereg)); +void emit_movzwq_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { + emit_rex(1,(dreg),0,(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0xb7; - x86_64_emit_membase((basereg),(disp),(dreg)); + emit_membase((basereg),(disp),(dreg)); } -void x86_64_movswq_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg) { - x86_64_emit_rex(1,(reg),(indexreg),(basereg)); +void emit_movswq_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg) { + emit_rex(1,(reg),(indexreg),(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0xbf; - x86_64_emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); + emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); } -void x86_64_movsbq_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg) { - x86_64_emit_rex(1,(reg),(indexreg),(basereg)); +void emit_movsbq_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg) { + emit_rex(1,(reg),(indexreg),(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0xbe; - x86_64_emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); + emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); } -void x86_64_movzwq_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg) { - x86_64_emit_rex(1,(reg),(indexreg),(basereg)); +void emit_movzwq_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg) { + emit_rex(1,(reg),(indexreg),(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0xb7; - x86_64_emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); + emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); } -void x86_64_mov_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale) +void emit_mov_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale) { - x86_64_emit_rex(1,0,(indexreg),(basereg)); + emit_rex(1,0,(indexreg),(basereg)); *(cd->mcodeptr++) = 0xc7; - x86_64_emit_memindex(0,(disp),(basereg),(indexreg),(scale)); - x86_64_emit_imm32((imm)); + emit_memindex(0,(disp),(basereg),(indexreg),(scale)); + emit_imm32((imm)); } -void x86_64_movl_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale) +void emit_movl_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale) { - x86_64_emit_rex(0,0,(indexreg),(basereg)); + emit_rex(0,0,(indexreg),(basereg)); *(cd->mcodeptr++) = 0xc7; - x86_64_emit_memindex(0,(disp),(basereg),(indexreg),(scale)); - x86_64_emit_imm32((imm)); + emit_memindex(0,(disp),(basereg),(indexreg),(scale)); + emit_imm32((imm)); } -void x86_64_movw_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale) +void emit_movw_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale) { *(cd->mcodeptr++) = 0x66; - x86_64_emit_rex(0,0,(indexreg),(basereg)); + emit_rex(0,0,(indexreg),(basereg)); *(cd->mcodeptr++) = 0xc7; - x86_64_emit_memindex(0,(disp),(basereg),(indexreg),(scale)); - x86_64_emit_imm16((imm)); + emit_memindex(0,(disp),(basereg),(indexreg),(scale)); + emit_imm16((imm)); } -void x86_64_movb_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale) +void emit_movb_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale) { - x86_64_emit_rex(0,0,(indexreg),(basereg)); + emit_rex(0,0,(indexreg),(basereg)); *(cd->mcodeptr++) = 0xc6; - x86_64_emit_memindex(0,(disp),(basereg),(indexreg),(scale)); - x86_64_emit_imm8((imm)); + emit_memindex(0,(disp),(basereg),(indexreg),(scale)); + emit_imm8((imm)); } /* * alu operations */ -void x86_64_alu_reg_reg(codegendata *cd, s8 opc, s8 reg, s8 dreg) { - x86_64_emit_rex(1,(reg),0,(dreg)); +void emit_alu_reg_reg(codegendata *cd, s8 opc, s8 reg, s8 dreg) +{ + emit_rex(1,(reg),0,(dreg)); *(cd->mcodeptr++) = (((opc)) << 3) + 1; - x86_64_emit_reg((reg),(dreg)); + emit_reg((reg),(dreg)); } -void x86_64_alul_reg_reg(codegendata *cd, s8 opc, s8 reg, s8 dreg) { - x86_64_emit_rex(0,(reg),0,(dreg)); +void emit_alul_reg_reg(codegendata *cd, s8 opc, s8 reg, s8 dreg) +{ + emit_rex(0,(reg),0,(dreg)); *(cd->mcodeptr++) = (((opc)) << 3) + 1; - x86_64_emit_reg((reg),(dreg)); + emit_reg((reg),(dreg)); } -void x86_64_alu_reg_membase(codegendata *cd, s8 opc, s8 reg, s8 basereg, s8 disp) { - x86_64_emit_rex(1,(reg),0,(basereg)); +void emit_alu_reg_membase(codegendata *cd, s8 opc, s8 reg, s8 basereg, s8 disp) { + emit_rex(1,(reg),0,(basereg)); *(cd->mcodeptr++) = (((opc)) << 3) + 1; - x86_64_emit_membase((basereg),(disp),(reg)); + emit_membase((basereg),(disp),(reg)); } -void x86_64_alul_reg_membase(codegendata *cd, s8 opc, s8 reg, s8 basereg, s8 disp) { - x86_64_emit_rex(0,(reg),0,(basereg)); +void emit_alul_reg_membase(codegendata *cd, s8 opc, s8 reg, s8 basereg, s8 disp) { + emit_rex(0,(reg),0,(basereg)); *(cd->mcodeptr++) = (((opc)) << 3) + 1; - x86_64_emit_membase((basereg),(disp),(reg)); + emit_membase((basereg),(disp),(reg)); } -void x86_64_alu_membase_reg(codegendata *cd, s8 opc, s8 basereg, s8 disp, s8 reg) { - x86_64_emit_rex(1,(reg),0,(basereg)); +void emit_alu_membase_reg(codegendata *cd, s8 opc, s8 basereg, s8 disp, s8 reg) { + emit_rex(1,(reg),0,(basereg)); *(cd->mcodeptr++) = (((opc)) << 3) + 3; - x86_64_emit_membase((basereg),(disp),(reg)); + emit_membase((basereg),(disp),(reg)); } -void x86_64_alul_membase_reg(codegendata *cd, s8 opc, s8 basereg, s8 disp, s8 reg) { - x86_64_emit_rex(0,(reg),0,(basereg)); +void emit_alul_membase_reg(codegendata *cd, s8 opc, s8 basereg, s8 disp, s8 reg) { + emit_rex(0,(reg),0,(basereg)); *(cd->mcodeptr++) = (((opc)) << 3) + 3; - x86_64_emit_membase((basereg),(disp),(reg)); + emit_membase((basereg),(disp),(reg)); } -void x86_64_alu_imm_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg) { +void emit_alu_imm_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg) { if (IS_IMM8(imm)) { - x86_64_emit_rex(1,0,0,(dreg)); + emit_rex(1,0,0,(dreg)); *(cd->mcodeptr++) = 0x83; - x86_64_emit_reg((opc),(dreg)); - x86_64_emit_imm8((imm)); + emit_reg((opc),(dreg)); + emit_imm8((imm)); } else { - x86_64_emit_rex(1,0,0,(dreg)); + emit_rex(1,0,0,(dreg)); *(cd->mcodeptr++) = 0x81; - x86_64_emit_reg((opc),(dreg)); - x86_64_emit_imm32((imm)); + emit_reg((opc),(dreg)); + emit_imm32((imm)); } } -void x86_64_alu_imm32_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg) { - x86_64_emit_rex(1,0,0,(dreg)); +void emit_alu_imm32_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg) { + emit_rex(1,0,0,(dreg)); *(cd->mcodeptr++) = 0x81; - x86_64_emit_reg((opc),(dreg)); - x86_64_emit_imm32((imm)); + emit_reg((opc),(dreg)); + emit_imm32((imm)); } -void x86_64_alul_imm_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg) { +void emit_alul_imm_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg) { if (IS_IMM8(imm)) { - x86_64_emit_rex(0,0,0,(dreg)); + emit_rex(0,0,0,(dreg)); *(cd->mcodeptr++) = 0x83; - x86_64_emit_reg((opc),(dreg)); - x86_64_emit_imm8((imm)); + emit_reg((opc),(dreg)); + emit_imm8((imm)); } else { - x86_64_emit_rex(0,0,0,(dreg)); + emit_rex(0,0,0,(dreg)); *(cd->mcodeptr++) = 0x81; - x86_64_emit_reg((opc),(dreg)); - x86_64_emit_imm32((imm)); + emit_reg((opc),(dreg)); + emit_imm32((imm)); } } -void x86_64_alu_imm_membase(codegendata *cd, s8 opc, s8 imm, s8 basereg, s8 disp) { +void emit_alu_imm_membase(codegendata *cd, s8 opc, s8 imm, s8 basereg, s8 disp) { if (IS_IMM8(imm)) { - x86_64_emit_rex(1,(basereg),0,0); + emit_rex(1,(basereg),0,0); *(cd->mcodeptr++) = 0x83; - x86_64_emit_membase((basereg),(disp),(opc)); - x86_64_emit_imm8((imm)); + emit_membase((basereg),(disp),(opc)); + emit_imm8((imm)); } else { - x86_64_emit_rex(1,(basereg),0,0); + emit_rex(1,(basereg),0,0); *(cd->mcodeptr++) = 0x81; - x86_64_emit_membase((basereg),(disp),(opc)); - x86_64_emit_imm32((imm)); + emit_membase((basereg),(disp),(opc)); + emit_imm32((imm)); } } -void x86_64_alul_imm_membase(codegendata *cd, s8 opc, s8 imm, s8 basereg, s8 disp) { +void emit_alul_imm_membase(codegendata *cd, s8 opc, s8 imm, s8 basereg, s8 disp) { if (IS_IMM8(imm)) { - x86_64_emit_rex(0,(basereg),0,0); + emit_rex(0,(basereg),0,0); *(cd->mcodeptr++) = 0x83; - x86_64_emit_membase((basereg),(disp),(opc)); - x86_64_emit_imm8((imm)); + emit_membase((basereg),(disp),(opc)); + emit_imm8((imm)); } else { - x86_64_emit_rex(0,(basereg),0,0); + emit_rex(0,(basereg),0,0); *(cd->mcodeptr++) = 0x81; - x86_64_emit_membase((basereg),(disp),(opc)); - x86_64_emit_imm32((imm)); + emit_membase((basereg),(disp),(opc)); + emit_imm32((imm)); } } -void x86_64_test_reg_reg(codegendata *cd, s8 reg, s8 dreg) { - x86_64_emit_rex(1,(reg),0,(dreg)); +void emit_test_reg_reg(codegendata *cd, s8 reg, s8 dreg) { + emit_rex(1,(reg),0,(dreg)); *(cd->mcodeptr++) = 0x85; - x86_64_emit_reg((reg),(dreg)); + emit_reg((reg),(dreg)); } -void x86_64_testl_reg_reg(codegendata *cd, s8 reg, s8 dreg) { - x86_64_emit_rex(0,(reg),0,(dreg)); +void emit_testl_reg_reg(codegendata *cd, s8 reg, s8 dreg) { + emit_rex(0,(reg),0,(dreg)); *(cd->mcodeptr++) = 0x85; - x86_64_emit_reg((reg),(dreg)); + emit_reg((reg),(dreg)); } -void x86_64_test_imm_reg(codegendata *cd, s8 imm, s8 reg) { +void emit_test_imm_reg(codegendata *cd, s8 imm, s8 reg) { *(cd->mcodeptr++) = 0xf7; - x86_64_emit_reg(0,(reg)); - x86_64_emit_imm32((imm)); + emit_reg(0,(reg)); + emit_imm32((imm)); } -void x86_64_testw_imm_reg(codegendata *cd, s8 imm, s8 reg) { +void emit_testw_imm_reg(codegendata *cd, s8 imm, s8 reg) { *(cd->mcodeptr++) = 0x66; *(cd->mcodeptr++) = 0xf7; - x86_64_emit_reg(0,(reg)); - x86_64_emit_imm16((imm)); + emit_reg(0,(reg)); + emit_imm16((imm)); } -void x86_64_testb_imm_reg(codegendata *cd, s8 imm, s8 reg) { +void emit_testb_imm_reg(codegendata *cd, s8 imm, s8 reg) { *(cd->mcodeptr++) = 0xf6; - x86_64_emit_reg(0,(reg)); - x86_64_emit_imm8((imm)); + emit_reg(0,(reg)); + emit_imm8((imm)); } -void x86_64_lea_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg) { - x86_64_emit_rex(1,(reg),0,(basereg)); +void emit_lea_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg) { + emit_rex(1,(reg),0,(basereg)); *(cd->mcodeptr++) = 0x8d; - x86_64_emit_membase((basereg),(disp),(reg)); + emit_membase((basereg),(disp),(reg)); } -void x86_64_leal_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg) { - x86_64_emit_rex(0,(reg),0,(basereg)); +void emit_leal_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg) { + emit_rex(0,(reg),0,(basereg)); *(cd->mcodeptr++) = 0x8d; - x86_64_emit_membase((basereg),(disp),(reg)); + emit_membase((basereg),(disp),(reg)); } @@ -1429,201 +1433,201 @@ void x86_64_leal_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg) { /* * inc, dec operations */ -void x86_64_inc_reg(codegendata *cd, s8 reg) { - x86_64_emit_rex(1,0,0,(reg)); +void emit_inc_reg(codegendata *cd, s8 reg) { + emit_rex(1,0,0,(reg)); *(cd->mcodeptr++) = 0xff; - x86_64_emit_reg(0,(reg)); + emit_reg(0,(reg)); } -void x86_64_incl_reg(codegendata *cd, s8 reg) { - x86_64_emit_rex(0,0,0,(reg)); +void emit_incl_reg(codegendata *cd, s8 reg) { + emit_rex(0,0,0,(reg)); *(cd->mcodeptr++) = 0xff; - x86_64_emit_reg(0,(reg)); + emit_reg(0,(reg)); } -void x86_64_inc_membase(codegendata *cd, s8 basereg, s8 disp) +void emit_inc_membase(codegendata *cd, s8 basereg, s8 disp) { - x86_64_emit_rex(1,0,0,(basereg)); + emit_rex(1,0,0,(basereg)); *(cd->mcodeptr++) = 0xff; - x86_64_emit_membase((basereg),(disp),0); + emit_membase((basereg),(disp),0); } -void x86_64_incl_membase(codegendata *cd, s8 basereg, s8 disp) +void emit_incl_membase(codegendata *cd, s8 basereg, s8 disp) { - x86_64_emit_rex(0,0,0,(basereg)); + emit_rex(0,0,0,(basereg)); *(cd->mcodeptr++) = 0xff; - x86_64_emit_membase((basereg),(disp),0); + emit_membase((basereg),(disp),0); } -void x86_64_dec_reg(codegendata *cd, s8 reg) { - x86_64_emit_rex(1,0,0,(reg)); +void emit_dec_reg(codegendata *cd, s8 reg) { + emit_rex(1,0,0,(reg)); *(cd->mcodeptr++) = 0xff; - x86_64_emit_reg(1,(reg)); + emit_reg(1,(reg)); } -void x86_64_decl_reg(codegendata *cd, s8 reg) { - x86_64_emit_rex(0,0,0,(reg)); +void emit_decl_reg(codegendata *cd, s8 reg) { + emit_rex(0,0,0,(reg)); *(cd->mcodeptr++) = 0xff; - x86_64_emit_reg(1,(reg)); + emit_reg(1,(reg)); } -void x86_64_dec_membase(codegendata *cd, s8 basereg, s8 disp) { - x86_64_emit_rex(1,(basereg),0,0); +void emit_dec_membase(codegendata *cd, s8 basereg, s8 disp) { + emit_rex(1,(basereg),0,0); *(cd->mcodeptr++) = 0xff; - x86_64_emit_membase((basereg),(disp),1); + emit_membase((basereg),(disp),1); } -void x86_64_decl_membase(codegendata *cd, s8 basereg, s8 disp) { - x86_64_emit_rex(0,(basereg),0,0); +void emit_decl_membase(codegendata *cd, s8 basereg, s8 disp) { + emit_rex(0,(basereg),0,0); *(cd->mcodeptr++) = 0xff; - x86_64_emit_membase((basereg),(disp),1); + emit_membase((basereg),(disp),1); } -void x86_64_cltd(codegendata *cd) { +void emit_cltd(codegendata *cd) { *(cd->mcodeptr++) = 0x99; } -void x86_64_cqto(codegendata *cd) { - x86_64_emit_rex(1,0,0,0); +void emit_cqto(codegendata *cd) { + emit_rex(1,0,0,0); *(cd->mcodeptr++) = 0x99; } -void x86_64_imul_reg_reg(codegendata *cd, s8 reg, s8 dreg) { - x86_64_emit_rex(1,(dreg),0,(reg)); +void emit_imul_reg_reg(codegendata *cd, s8 reg, s8 dreg) { + emit_rex(1,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0xaf; - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_imull_reg_reg(codegendata *cd, s8 reg, s8 dreg) { - x86_64_emit_rex(0,(dreg),0,(reg)); +void emit_imull_reg_reg(codegendata *cd, s8 reg, s8 dreg) { + emit_rex(0,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0xaf; - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_imul_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { - x86_64_emit_rex(1,(dreg),0,(basereg)); +void emit_imul_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { + emit_rex(1,(dreg),0,(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0xaf; - x86_64_emit_membase((basereg),(disp),(dreg)); + emit_membase((basereg),(disp),(dreg)); } -void x86_64_imull_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { - x86_64_emit_rex(0,(dreg),0,(basereg)); +void emit_imull_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { + emit_rex(0,(dreg),0,(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0xaf; - x86_64_emit_membase((basereg),(disp),(dreg)); + emit_membase((basereg),(disp),(dreg)); } -void x86_64_imul_imm_reg(codegendata *cd, s8 imm, s8 dreg) { +void emit_imul_imm_reg(codegendata *cd, s8 imm, s8 dreg) { if (IS_IMM8((imm))) { - x86_64_emit_rex(1,0,0,(dreg)); + emit_rex(1,0,0,(dreg)); *(cd->mcodeptr++) = 0x6b; - x86_64_emit_reg(0,(dreg)); - x86_64_emit_imm8((imm)); + emit_reg(0,(dreg)); + emit_imm8((imm)); } else { - x86_64_emit_rex(1,0,0,(dreg)); + emit_rex(1,0,0,(dreg)); *(cd->mcodeptr++) = 0x69; - x86_64_emit_reg(0,(dreg)); - x86_64_emit_imm32((imm)); + emit_reg(0,(dreg)); + emit_imm32((imm)); } } -void x86_64_imul_imm_reg_reg(codegendata *cd, s8 imm, s8 reg, s8 dreg) { +void emit_imul_imm_reg_reg(codegendata *cd, s8 imm, s8 reg, s8 dreg) { if (IS_IMM8((imm))) { - x86_64_emit_rex(1,(dreg),0,(reg)); + emit_rex(1,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x6b; - x86_64_emit_reg((dreg),(reg)); - x86_64_emit_imm8((imm)); + emit_reg((dreg),(reg)); + emit_imm8((imm)); } else { - x86_64_emit_rex(1,(dreg),0,(reg)); + emit_rex(1,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x69; - x86_64_emit_reg((dreg),(reg)); - x86_64_emit_imm32((imm)); + emit_reg((dreg),(reg)); + emit_imm32((imm)); } } -void x86_64_imull_imm_reg_reg(codegendata *cd, s8 imm, s8 reg, s8 dreg) { +void emit_imull_imm_reg_reg(codegendata *cd, s8 imm, s8 reg, s8 dreg) { if (IS_IMM8((imm))) { - x86_64_emit_rex(0,(dreg),0,(reg)); + emit_rex(0,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x6b; - x86_64_emit_reg((dreg),(reg)); - x86_64_emit_imm8((imm)); + emit_reg((dreg),(reg)); + emit_imm8((imm)); } else { - x86_64_emit_rex(0,(dreg),0,(reg)); + emit_rex(0,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x69; - x86_64_emit_reg((dreg),(reg)); - x86_64_emit_imm32((imm)); + emit_reg((dreg),(reg)); + emit_imm32((imm)); } } -void x86_64_imul_imm_membase_reg(codegendata *cd, s8 imm, s8 basereg, s8 disp, s8 dreg) { +void emit_imul_imm_membase_reg(codegendata *cd, s8 imm, s8 basereg, s8 disp, s8 dreg) { if (IS_IMM8((imm))) { - x86_64_emit_rex(1,(dreg),0,(basereg)); + emit_rex(1,(dreg),0,(basereg)); *(cd->mcodeptr++) = 0x6b; - x86_64_emit_membase((basereg),(disp),(dreg)); - x86_64_emit_imm8((imm)); + emit_membase((basereg),(disp),(dreg)); + emit_imm8((imm)); } else { - x86_64_emit_rex(1,(dreg),0,(basereg)); + emit_rex(1,(dreg),0,(basereg)); *(cd->mcodeptr++) = 0x69; - x86_64_emit_membase((basereg),(disp),(dreg)); - x86_64_emit_imm32((imm)); + emit_membase((basereg),(disp),(dreg)); + emit_imm32((imm)); } } -void x86_64_imull_imm_membase_reg(codegendata *cd, s8 imm, s8 basereg, s8 disp, s8 dreg) { +void emit_imull_imm_membase_reg(codegendata *cd, s8 imm, s8 basereg, s8 disp, s8 dreg) { if (IS_IMM8((imm))) { - x86_64_emit_rex(0,(dreg),0,(basereg)); + emit_rex(0,(dreg),0,(basereg)); *(cd->mcodeptr++) = 0x6b; - x86_64_emit_membase((basereg),(disp),(dreg)); - x86_64_emit_imm8((imm)); + emit_membase((basereg),(disp),(dreg)); + emit_imm8((imm)); } else { - x86_64_emit_rex(0,(dreg),0,(basereg)); + emit_rex(0,(dreg),0,(basereg)); *(cd->mcodeptr++) = 0x69; - x86_64_emit_membase((basereg),(disp),(dreg)); - x86_64_emit_imm32((imm)); + emit_membase((basereg),(disp),(dreg)); + emit_imm32((imm)); } } -void x86_64_idiv_reg(codegendata *cd, s8 reg) { - x86_64_emit_rex(1,0,0,(reg)); +void emit_idiv_reg(codegendata *cd, s8 reg) { + emit_rex(1,0,0,(reg)); *(cd->mcodeptr++) = 0xf7; - x86_64_emit_reg(7,(reg)); + emit_reg(7,(reg)); } -void x86_64_idivl_reg(codegendata *cd, s8 reg) { - x86_64_emit_rex(0,0,0,(reg)); +void emit_idivl_reg(codegendata *cd, s8 reg) { + emit_rex(0,0,0,(reg)); *(cd->mcodeptr++) = 0xf7; - x86_64_emit_reg(7,(reg)); + emit_reg(7,(reg)); } -void x86_64_ret(codegendata *cd) { +void emit_ret(codegendata *cd) { *(cd->mcodeptr++) = 0xc3; } @@ -1632,86 +1636,86 @@ void x86_64_ret(codegendata *cd) { /* * shift ops */ -void x86_64_shift_reg(codegendata *cd, s8 opc, s8 reg) { - x86_64_emit_rex(1,0,0,(reg)); +void emit_shift_reg(codegendata *cd, s8 opc, s8 reg) { + emit_rex(1,0,0,(reg)); *(cd->mcodeptr++) = 0xd3; - x86_64_emit_reg((opc),(reg)); + emit_reg((opc),(reg)); } -void x86_64_shiftl_reg(codegendata *cd, s8 opc, s8 reg) { - x86_64_emit_rex(0,0,0,(reg)); +void emit_shiftl_reg(codegendata *cd, s8 opc, s8 reg) { + emit_rex(0,0,0,(reg)); *(cd->mcodeptr++) = 0xd3; - x86_64_emit_reg((opc),(reg)); + emit_reg((opc),(reg)); } -void x86_64_shift_membase(codegendata *cd, s8 opc, s8 basereg, s8 disp) { - x86_64_emit_rex(1,0,0,(basereg)); +void emit_shift_membase(codegendata *cd, s8 opc, s8 basereg, s8 disp) { + emit_rex(1,0,0,(basereg)); *(cd->mcodeptr++) = 0xd3; - x86_64_emit_membase((basereg),(disp),(opc)); + emit_membase((basereg),(disp),(opc)); } -void x86_64_shiftl_membase(codegendata *cd, s8 opc, s8 basereg, s8 disp) { - x86_64_emit_rex(0,0,0,(basereg)); +void emit_shiftl_membase(codegendata *cd, s8 opc, s8 basereg, s8 disp) { + emit_rex(0,0,0,(basereg)); *(cd->mcodeptr++) = 0xd3; - x86_64_emit_membase((basereg),(disp),(opc)); + emit_membase((basereg),(disp),(opc)); } -void x86_64_shift_imm_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg) { +void emit_shift_imm_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg) { if ((imm) == 1) { - x86_64_emit_rex(1,0,0,(dreg)); + emit_rex(1,0,0,(dreg)); *(cd->mcodeptr++) = 0xd1; - x86_64_emit_reg((opc),(dreg)); + emit_reg((opc),(dreg)); } else { - x86_64_emit_rex(1,0,0,(dreg)); + emit_rex(1,0,0,(dreg)); *(cd->mcodeptr++) = 0xc1; - x86_64_emit_reg((opc),(dreg)); - x86_64_emit_imm8((imm)); + emit_reg((opc),(dreg)); + emit_imm8((imm)); } } -void x86_64_shiftl_imm_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg) { +void emit_shiftl_imm_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg) { if ((imm) == 1) { - x86_64_emit_rex(0,0,0,(dreg)); + emit_rex(0,0,0,(dreg)); *(cd->mcodeptr++) = 0xd1; - x86_64_emit_reg((opc),(dreg)); + emit_reg((opc),(dreg)); } else { - x86_64_emit_rex(0,0,0,(dreg)); + emit_rex(0,0,0,(dreg)); *(cd->mcodeptr++) = 0xc1; - x86_64_emit_reg((opc),(dreg)); - x86_64_emit_imm8((imm)); + emit_reg((opc),(dreg)); + emit_imm8((imm)); } } -void x86_64_shift_imm_membase(codegendata *cd, s8 opc, s8 imm, s8 basereg, s8 disp) { +void emit_shift_imm_membase(codegendata *cd, s8 opc, s8 imm, s8 basereg, s8 disp) { if ((imm) == 1) { - x86_64_emit_rex(1,0,0,(basereg)); + emit_rex(1,0,0,(basereg)); *(cd->mcodeptr++) = 0xd1; - x86_64_emit_membase((basereg),(disp),(opc)); + emit_membase((basereg),(disp),(opc)); } else { - x86_64_emit_rex(1,0,0,(basereg)); + emit_rex(1,0,0,(basereg)); *(cd->mcodeptr++) = 0xc1; - x86_64_emit_membase((basereg),(disp),(opc)); - x86_64_emit_imm8((imm)); + emit_membase((basereg),(disp),(opc)); + emit_imm8((imm)); } } -void x86_64_shiftl_imm_membase(codegendata *cd, s8 opc, s8 imm, s8 basereg, s8 disp) { +void emit_shiftl_imm_membase(codegendata *cd, s8 opc, s8 imm, s8 basereg, s8 disp) { if ((imm) == 1) { - x86_64_emit_rex(0,0,0,(basereg)); + emit_rex(0,0,0,(basereg)); *(cd->mcodeptr++) = 0xd1; - x86_64_emit_membase((basereg),(disp),(opc)); + emit_membase((basereg),(disp),(opc)); } else { - x86_64_emit_rex(0,0,0,(basereg)); + emit_rex(0,0,0,(basereg)); *(cd->mcodeptr++) = 0xc1; - x86_64_emit_membase((basereg),(disp),(opc)); - x86_64_emit_imm8((imm)); + emit_membase((basereg),(disp),(opc)); + emit_imm8((imm)); } } @@ -1720,23 +1724,23 @@ void x86_64_shiftl_imm_membase(codegendata *cd, s8 opc, s8 imm, s8 basereg, s8 d /* * jump operations */ -void x86_64_jmp_imm(codegendata *cd, s8 imm) { +void emit_jmp_imm(codegendata *cd, s8 imm) { *(cd->mcodeptr++) = 0xe9; - x86_64_emit_imm32((imm)); + emit_imm32((imm)); } -void x86_64_jmp_reg(codegendata *cd, s8 reg) { - x86_64_emit_rex(0,0,0,(reg)); +void emit_jmp_reg(codegendata *cd, s8 reg) { + emit_rex(0,0,0,(reg)); *(cd->mcodeptr++) = 0xff; - x86_64_emit_reg(4,(reg)); + emit_reg(4,(reg)); } -void x86_64_jcc(codegendata *cd, s8 opc, s8 imm) { +void emit_jcc(codegendata *cd, s8 opc, s8 imm) { *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = (0x80 + (opc)); - x86_64_emit_imm32((imm)); + emit_imm32((imm)); } @@ -1746,96 +1750,96 @@ void x86_64_jcc(codegendata *cd, s8 opc, s8 imm) { */ /* we need the rex byte to get all low bytes */ -void x86_64_setcc_reg(codegendata *cd, s8 opc, s8 reg) { +void emit_setcc_reg(codegendata *cd, s8 opc, s8 reg) { *(cd->mcodeptr++) = (0x40 | (((reg) >> 3) & 0x01)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = (0x90 + (opc)); - x86_64_emit_reg(0,(reg)); + emit_reg(0,(reg)); } /* we need the rex byte to get all low bytes */ -void x86_64_setcc_membase(codegendata *cd, s8 opc, s8 basereg, s8 disp) { +void emit_setcc_membase(codegendata *cd, s8 opc, s8 basereg, s8 disp) { *(cd->mcodeptr++) = (0x40 | (((basereg) >> 3) & 0x01)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = (0x90 + (opc)); - x86_64_emit_membase((basereg),(disp),0); + emit_membase((basereg),(disp),0); } -void x86_64_cmovcc_reg_reg(codegendata *cd, s8 opc, s8 reg, s8 dreg) +void emit_cmovcc_reg_reg(codegendata *cd, s8 opc, s8 reg, s8 dreg) { - x86_64_emit_rex(1,(dreg),0,(reg)); + emit_rex(1,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = (0x40 + (opc)); - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_cmovccl_reg_reg(codegendata *cd, s8 opc, s8 reg, s8 dreg) +void emit_cmovccl_reg_reg(codegendata *cd, s8 opc, s8 reg, s8 dreg) { - x86_64_emit_rex(0,(dreg),0,(reg)); + emit_rex(0,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = (0x40 + (opc)); - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_neg_reg(codegendata *cd, s8 reg) { - x86_64_emit_rex(1,0,0,(reg)); +void emit_neg_reg(codegendata *cd, s8 reg) { + emit_rex(1,0,0,(reg)); *(cd->mcodeptr++) = 0xf7; - x86_64_emit_reg(3,(reg)); + emit_reg(3,(reg)); } -void x86_64_negl_reg(codegendata *cd, s8 reg) { - x86_64_emit_rex(0,0,0,(reg)); +void emit_negl_reg(codegendata *cd, s8 reg) { + emit_rex(0,0,0,(reg)); *(cd->mcodeptr++) = 0xf7; - x86_64_emit_reg(3,(reg)); + emit_reg(3,(reg)); } -void x86_64_neg_membase(codegendata *cd, s8 basereg, s8 disp) { - x86_64_emit_rex(1,0,0,(basereg)); +void emit_neg_membase(codegendata *cd, s8 basereg, s8 disp) { + emit_rex(1,0,0,(basereg)); *(cd->mcodeptr++) = 0xf7; - x86_64_emit_membase((basereg),(disp),3); + emit_membase((basereg),(disp),3); } -void x86_64_negl_membase(codegendata *cd, s8 basereg, s8 disp) { - x86_64_emit_rex(0,0,0,(basereg)); +void emit_negl_membase(codegendata *cd, s8 basereg, s8 disp) { + emit_rex(0,0,0,(basereg)); *(cd->mcodeptr++) = 0xf7; - x86_64_emit_membase((basereg),(disp),3); + emit_membase((basereg),(disp),3); } -void x86_64_push_reg(codegendata *cd, s8 reg) { - x86_64_emit_rex(0,0,0,(reg)); +void emit_push_reg(codegendata *cd, s8 reg) { + emit_rex(0,0,0,(reg)); *(cd->mcodeptr++) = 0x50 + (0x07 & (reg)); } -void x86_64_push_imm(codegendata *cd, s8 imm) { +void emit_push_imm(codegendata *cd, s8 imm) { *(cd->mcodeptr++) = 0x68; - x86_64_emit_imm32((imm)); + emit_imm32((imm)); } -void x86_64_pop_reg(codegendata *cd, s8 reg) { - x86_64_emit_rex(0,0,0,(reg)); +void emit_pop_reg(codegendata *cd, s8 reg) { + emit_rex(0,0,0,(reg)); *(cd->mcodeptr++) = 0x58 + (0x07 & (reg)); } -void x86_64_xchg_reg_reg(codegendata *cd, s8 reg, s8 dreg) { - x86_64_emit_rex(1,(reg),0,(dreg)); +void emit_xchg_reg_reg(codegendata *cd, s8 reg, s8 dreg) { + emit_rex(1,(reg),0,(dreg)); *(cd->mcodeptr++) = 0x87; - x86_64_emit_reg((reg),(dreg)); + emit_reg((reg),(dreg)); } -void x86_64_nop(codegendata *cd) { +void emit_nop(codegendata *cd) { *(cd->mcodeptr++) = 0x90; } @@ -1844,23 +1848,23 @@ void x86_64_nop(codegendata *cd) { /* * call instructions */ -void x86_64_call_reg(codegendata *cd, s8 reg) { - x86_64_emit_rex(1,0,0,(reg)); +void emit_call_reg(codegendata *cd, s8 reg) { + emit_rex(1,0,0,(reg)); *(cd->mcodeptr++) = 0xff; - x86_64_emit_reg(2,(reg)); + emit_reg(2,(reg)); } -void x86_64_call_imm(codegendata *cd, s8 imm) { +void emit_call_imm(codegendata *cd, s8 imm) { *(cd->mcodeptr++) = 0xe8; - x86_64_emit_imm32((imm)); + emit_imm32((imm)); } -void x86_64_call_mem(codegendata *cd, ptrint mem) +void emit_call_mem(codegendata *cd, ptrint mem) { *(cd->mcodeptr++) = 0xff; - x86_64_emit_mem(2,(mem)); + emit_mem(2,(mem)); } @@ -1868,457 +1872,457 @@ void x86_64_call_mem(codegendata *cd, ptrint mem) /* * floating point instructions (SSE2) */ -void x86_64_addsd_reg_reg(codegendata *cd, s8 reg, s8 dreg) { +void emit_addsd_reg_reg(codegendata *cd, s8 reg, s8 dreg) { *(cd->mcodeptr++) = 0xf2; - x86_64_emit_rex(0,(dreg),0,(reg)); + emit_rex(0,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x58; - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_addss_reg_reg(codegendata *cd, s8 reg, s8 dreg) { +void emit_addss_reg_reg(codegendata *cd, s8 reg, s8 dreg) { *(cd->mcodeptr++) = 0xf3; - x86_64_emit_rex(0,(dreg),0,(reg)); + emit_rex(0,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x58; - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_cvtsi2ssq_reg_reg(codegendata *cd, s8 reg, s8 dreg) { +void emit_cvtsi2ssq_reg_reg(codegendata *cd, s8 reg, s8 dreg) { *(cd->mcodeptr++) = 0xf3; - x86_64_emit_rex(1,(dreg),0,(reg)); + emit_rex(1,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x2a; - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_cvtsi2ss_reg_reg(codegendata *cd, s8 reg, s8 dreg) { +void emit_cvtsi2ss_reg_reg(codegendata *cd, s8 reg, s8 dreg) { *(cd->mcodeptr++) = 0xf3; - x86_64_emit_rex(0,(dreg),0,(reg)); + emit_rex(0,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x2a; - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_cvtsi2sdq_reg_reg(codegendata *cd, s8 reg, s8 dreg) { +void emit_cvtsi2sdq_reg_reg(codegendata *cd, s8 reg, s8 dreg) { *(cd->mcodeptr++) = 0xf2; - x86_64_emit_rex(1,(dreg),0,(reg)); + emit_rex(1,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x2a; - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_cvtsi2sd_reg_reg(codegendata *cd, s8 reg, s8 dreg) { +void emit_cvtsi2sd_reg_reg(codegendata *cd, s8 reg, s8 dreg) { *(cd->mcodeptr++) = 0xf2; - x86_64_emit_rex(0,(dreg),0,(reg)); + emit_rex(0,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x2a; - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_cvtss2sd_reg_reg(codegendata *cd, s8 reg, s8 dreg) { +void emit_cvtss2sd_reg_reg(codegendata *cd, s8 reg, s8 dreg) { *(cd->mcodeptr++) = 0xf3; - x86_64_emit_rex(0,(dreg),0,(reg)); + emit_rex(0,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x5a; - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_cvtsd2ss_reg_reg(codegendata *cd, s8 reg, s8 dreg) { +void emit_cvtsd2ss_reg_reg(codegendata *cd, s8 reg, s8 dreg) { *(cd->mcodeptr++) = 0xf2; - x86_64_emit_rex(0,(dreg),0,(reg)); + emit_rex(0,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x5a; - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_cvttss2siq_reg_reg(codegendata *cd, s8 reg, s8 dreg) { +void emit_cvttss2siq_reg_reg(codegendata *cd, s8 reg, s8 dreg) { *(cd->mcodeptr++) = 0xf3; - x86_64_emit_rex(1,(dreg),0,(reg)); + emit_rex(1,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x2c; - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_cvttss2si_reg_reg(codegendata *cd, s8 reg, s8 dreg) { +void emit_cvttss2si_reg_reg(codegendata *cd, s8 reg, s8 dreg) { *(cd->mcodeptr++) = 0xf3; - x86_64_emit_rex(0,(dreg),0,(reg)); + emit_rex(0,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x2c; - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_cvttsd2siq_reg_reg(codegendata *cd, s8 reg, s8 dreg) { +void emit_cvttsd2siq_reg_reg(codegendata *cd, s8 reg, s8 dreg) { *(cd->mcodeptr++) = 0xf2; - x86_64_emit_rex(1,(dreg),0,(reg)); + emit_rex(1,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x2c; - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_cvttsd2si_reg_reg(codegendata *cd, s8 reg, s8 dreg) { +void emit_cvttsd2si_reg_reg(codegendata *cd, s8 reg, s8 dreg) { *(cd->mcodeptr++) = 0xf2; - x86_64_emit_rex(0,(dreg),0,(reg)); + emit_rex(0,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x2c; - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_divss_reg_reg(codegendata *cd, s8 reg, s8 dreg) { +void emit_divss_reg_reg(codegendata *cd, s8 reg, s8 dreg) { *(cd->mcodeptr++) = 0xf3; - x86_64_emit_rex(0,(dreg),0,(reg)); + emit_rex(0,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x5e; - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_divsd_reg_reg(codegendata *cd, s8 reg, s8 dreg) { +void emit_divsd_reg_reg(codegendata *cd, s8 reg, s8 dreg) { *(cd->mcodeptr++) = 0xf2; - x86_64_emit_rex(0,(dreg),0,(reg)); + emit_rex(0,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x5e; - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_movd_reg_freg(codegendata *cd, s8 reg, s8 freg) { +void emit_movd_reg_freg(codegendata *cd, s8 reg, s8 freg) { *(cd->mcodeptr++) = 0x66; - x86_64_emit_rex(1,(freg),0,(reg)); + emit_rex(1,(freg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x6e; - x86_64_emit_reg((freg),(reg)); + emit_reg((freg),(reg)); } -void x86_64_movd_freg_reg(codegendata *cd, s8 freg, s8 reg) { +void emit_movd_freg_reg(codegendata *cd, s8 freg, s8 reg) { *(cd->mcodeptr++) = 0x66; - x86_64_emit_rex(1,(freg),0,(reg)); + emit_rex(1,(freg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x7e; - x86_64_emit_reg((freg),(reg)); + emit_reg((freg),(reg)); } -void x86_64_movd_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp) { +void emit_movd_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp) { *(cd->mcodeptr++) = 0x66; - x86_64_emit_rex(0,(reg),0,(basereg)); + emit_rex(0,(reg),0,(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x7e; - x86_64_emit_membase((basereg),(disp),(reg)); + emit_membase((basereg),(disp),(reg)); } -void x86_64_movd_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale) { +void emit_movd_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale) { *(cd->mcodeptr++) = 0x66; - x86_64_emit_rex(0,(reg),(indexreg),(basereg)); + emit_rex(0,(reg),(indexreg),(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x7e; - x86_64_emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); + emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); } -void x86_64_movd_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { +void emit_movd_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { *(cd->mcodeptr++) = 0x66; - x86_64_emit_rex(1,(dreg),0,(basereg)); + emit_rex(1,(dreg),0,(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x6e; - x86_64_emit_membase((basereg),(disp),(dreg)); + emit_membase((basereg),(disp),(dreg)); } -void x86_64_movdl_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { +void emit_movdl_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { *(cd->mcodeptr++) = 0x66; - x86_64_emit_rex(0,(dreg),0,(basereg)); + emit_rex(0,(dreg),0,(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x6e; - x86_64_emit_membase((basereg),(disp),(dreg)); + emit_membase((basereg),(disp),(dreg)); } -void x86_64_movd_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 dreg) { +void emit_movd_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 dreg) { *(cd->mcodeptr++) = 0x66; - x86_64_emit_rex(0,(dreg),(indexreg),(basereg)); + emit_rex(0,(dreg),(indexreg),(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x6e; - x86_64_emit_memindex((dreg),(disp),(basereg),(indexreg),(scale)); + emit_memindex((dreg),(disp),(basereg),(indexreg),(scale)); } -void x86_64_movq_reg_reg(codegendata *cd, s8 reg, s8 dreg) { +void emit_movq_reg_reg(codegendata *cd, s8 reg, s8 dreg) { *(cd->mcodeptr++) = 0xf3; - x86_64_emit_rex(0,(dreg),0,(reg)); + emit_rex(0,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x7e; - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_movq_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp) { +void emit_movq_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp) { *(cd->mcodeptr++) = 0x66; - x86_64_emit_rex(0,(reg),0,(basereg)); + emit_rex(0,(reg),0,(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0xd6; - x86_64_emit_membase((basereg),(disp),(reg)); + emit_membase((basereg),(disp),(reg)); } -void x86_64_movq_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { +void emit_movq_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { *(cd->mcodeptr++) = 0xf3; - x86_64_emit_rex(0,(dreg),0,(basereg)); + emit_rex(0,(dreg),0,(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x7e; - x86_64_emit_membase((basereg),(disp),(dreg)); + emit_membase((basereg),(disp),(dreg)); } -void x86_64_movss_reg_reg(codegendata *cd, s8 reg, s8 dreg) { +void emit_movss_reg_reg(codegendata *cd, s8 reg, s8 dreg) { *(cd->mcodeptr++) = 0xf3; - x86_64_emit_rex(0,(reg),0,(dreg)); + emit_rex(0,(reg),0,(dreg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x10; - x86_64_emit_reg((reg),(dreg)); + emit_reg((reg),(dreg)); } -void x86_64_movsd_reg_reg(codegendata *cd, s8 reg, s8 dreg) { +void emit_movsd_reg_reg(codegendata *cd, s8 reg, s8 dreg) { *(cd->mcodeptr++) = 0xf2; - x86_64_emit_rex(0,(reg),0,(dreg)); + emit_rex(0,(reg),0,(dreg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x10; - x86_64_emit_reg((reg),(dreg)); + emit_reg((reg),(dreg)); } -void x86_64_movss_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp) { +void emit_movss_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp) { *(cd->mcodeptr++) = 0xf3; - x86_64_emit_rex(0,(reg),0,(basereg)); + emit_rex(0,(reg),0,(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x11; - x86_64_emit_membase((basereg),(disp),(reg)); + emit_membase((basereg),(disp),(reg)); } /* Always emit a REX byte, because the instruction size can be smaller when */ /* all register indexes are smaller than 7. */ -void x86_64_movss_reg_membase32(codegendata *cd, s8 reg, s8 basereg, s8 disp) { +void emit_movss_reg_membase32(codegendata *cd, s8 reg, s8 basereg, s8 disp) { *(cd->mcodeptr++) = 0xf3; - x86_64_emit_byte_rex((reg),0,(basereg)); + emit_byte_rex((reg),0,(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x11; - x86_64_emit_membase32((basereg),(disp),(reg)); + emit_membase32((basereg),(disp),(reg)); } -void x86_64_movsd_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp) { +void emit_movsd_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp) { *(cd->mcodeptr++) = 0xf2; - x86_64_emit_rex(0,(reg),0,(basereg)); + emit_rex(0,(reg),0,(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x11; - x86_64_emit_membase((basereg),(disp),(reg)); + emit_membase((basereg),(disp),(reg)); } /* Always emit a REX byte, because the instruction size can be smaller when */ /* all register indexes are smaller than 7. */ -void x86_64_movsd_reg_membase32(codegendata *cd, s8 reg, s8 basereg, s8 disp) { +void emit_movsd_reg_membase32(codegendata *cd, s8 reg, s8 basereg, s8 disp) { *(cd->mcodeptr++) = 0xf2; - x86_64_emit_byte_rex((reg),0,(basereg)); + emit_byte_rex((reg),0,(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x11; - x86_64_emit_membase32((basereg),(disp),(reg)); + emit_membase32((basereg),(disp),(reg)); } -void x86_64_movss_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { +void emit_movss_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { *(cd->mcodeptr++) = 0xf3; - x86_64_emit_rex(0,(dreg),0,(basereg)); + emit_rex(0,(dreg),0,(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x10; - x86_64_emit_membase((basereg),(disp),(dreg)); + emit_membase((basereg),(disp),(dreg)); } /* Always emit a REX byte, because the instruction size can be smaller when */ /* all register indexes are smaller than 7. */ -void x86_64_movss_membase32_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { +void emit_movss_membase32_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { *(cd->mcodeptr++) = 0xf3; - x86_64_emit_byte_rex((dreg),0,(basereg)); + emit_byte_rex((dreg),0,(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x10; - x86_64_emit_membase32((basereg),(disp),(dreg)); + emit_membase32((basereg),(disp),(dreg)); } -void x86_64_movlps_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { - x86_64_emit_rex(0,(dreg),0,(basereg)); +void emit_movlps_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { + emit_rex(0,(dreg),0,(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x12; - x86_64_emit_membase((basereg),(disp),(dreg)); + emit_membase((basereg),(disp),(dreg)); } -void x86_64_movsd_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { +void emit_movsd_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { *(cd->mcodeptr++) = 0xf2; - x86_64_emit_rex(0,(dreg),0,(basereg)); + emit_rex(0,(dreg),0,(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x10; - x86_64_emit_membase((basereg),(disp),(dreg)); + emit_membase((basereg),(disp),(dreg)); } /* Always emit a REX byte, because the instruction size can be smaller when */ /* all register indexes are smaller than 7. */ -void x86_64_movsd_membase32_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { +void emit_movsd_membase32_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { *(cd->mcodeptr++) = 0xf2; - x86_64_emit_byte_rex((dreg),0,(basereg)); + emit_byte_rex((dreg),0,(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x10; - x86_64_emit_membase32((basereg),(disp),(dreg)); + emit_membase32((basereg),(disp),(dreg)); } -void x86_64_movlpd_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { +void emit_movlpd_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { *(cd->mcodeptr++) = 0x66; - x86_64_emit_rex(0,(dreg),0,(basereg)); + emit_rex(0,(dreg),0,(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x12; - x86_64_emit_membase((basereg),(disp),(dreg)); + emit_membase((basereg),(disp),(dreg)); } -void x86_64_movss_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale) { +void emit_movss_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale) { *(cd->mcodeptr++) = 0xf3; - x86_64_emit_rex(0,(reg),(indexreg),(basereg)); + emit_rex(0,(reg),(indexreg),(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x11; - x86_64_emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); + emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); } -void x86_64_movsd_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale) { +void emit_movsd_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale) { *(cd->mcodeptr++) = 0xf2; - x86_64_emit_rex(0,(reg),(indexreg),(basereg)); + emit_rex(0,(reg),(indexreg),(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x11; - x86_64_emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); + emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); } -void x86_64_movss_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 dreg) { +void emit_movss_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 dreg) { *(cd->mcodeptr++) = 0xf3; - x86_64_emit_rex(0,(dreg),(indexreg),(basereg)); + emit_rex(0,(dreg),(indexreg),(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x10; - x86_64_emit_memindex((dreg),(disp),(basereg),(indexreg),(scale)); + emit_memindex((dreg),(disp),(basereg),(indexreg),(scale)); } -void x86_64_movsd_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 dreg) { +void emit_movsd_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 dreg) { *(cd->mcodeptr++) = 0xf2; - x86_64_emit_rex(0,(dreg),(indexreg),(basereg)); + emit_rex(0,(dreg),(indexreg),(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x10; - x86_64_emit_memindex((dreg),(disp),(basereg),(indexreg),(scale)); + emit_memindex((dreg),(disp),(basereg),(indexreg),(scale)); } -void x86_64_mulss_reg_reg(codegendata *cd, s8 reg, s8 dreg) { +void emit_mulss_reg_reg(codegendata *cd, s8 reg, s8 dreg) { *(cd->mcodeptr++) = 0xf3; - x86_64_emit_rex(0,(dreg),0,(reg)); + emit_rex(0,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x59; - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_mulsd_reg_reg(codegendata *cd, s8 reg, s8 dreg) { +void emit_mulsd_reg_reg(codegendata *cd, s8 reg, s8 dreg) { *(cd->mcodeptr++) = 0xf2; - x86_64_emit_rex(0,(dreg),0,(reg)); + emit_rex(0,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x59; - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_subss_reg_reg(codegendata *cd, s8 reg, s8 dreg) { +void emit_subss_reg_reg(codegendata *cd, s8 reg, s8 dreg) { *(cd->mcodeptr++) = 0xf3; - x86_64_emit_rex(0,(dreg),0,(reg)); + emit_rex(0,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x5c; - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_subsd_reg_reg(codegendata *cd, s8 reg, s8 dreg) { +void emit_subsd_reg_reg(codegendata *cd, s8 reg, s8 dreg) { *(cd->mcodeptr++) = 0xf2; - x86_64_emit_rex(0,(dreg),0,(reg)); + emit_rex(0,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x5c; - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_ucomiss_reg_reg(codegendata *cd, s8 reg, s8 dreg) { - x86_64_emit_rex(0,(dreg),0,(reg)); +void emit_ucomiss_reg_reg(codegendata *cd, s8 reg, s8 dreg) { + emit_rex(0,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x2e; - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_ucomisd_reg_reg(codegendata *cd, s8 reg, s8 dreg) { +void emit_ucomisd_reg_reg(codegendata *cd, s8 reg, s8 dreg) { *(cd->mcodeptr++) = 0x66; - x86_64_emit_rex(0,(dreg),0,(reg)); + emit_rex(0,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x2e; - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_xorps_reg_reg(codegendata *cd, s8 reg, s8 dreg) { - x86_64_emit_rex(0,(dreg),0,(reg)); +void emit_xorps_reg_reg(codegendata *cd, s8 reg, s8 dreg) { + emit_rex(0,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x57; - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_xorps_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { - x86_64_emit_rex(0,(dreg),0,(basereg)); +void emit_xorps_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { + emit_rex(0,(dreg),0,(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x57; - x86_64_emit_membase((basereg),(disp),(dreg)); + emit_membase((basereg),(disp),(dreg)); } -void x86_64_xorpd_reg_reg(codegendata *cd, s8 reg, s8 dreg) { +void emit_xorpd_reg_reg(codegendata *cd, s8 reg, s8 dreg) { *(cd->mcodeptr++) = 0x66; - x86_64_emit_rex(0,(dreg),0,(reg)); + emit_rex(0,(dreg),0,(reg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x57; - x86_64_emit_reg((dreg),(reg)); + emit_reg((dreg),(reg)); } -void x86_64_xorpd_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { +void emit_xorpd_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg) { *(cd->mcodeptr++) = 0x66; - x86_64_emit_rex(0,(dreg),0,(basereg)); + emit_rex(0,(dreg),0,(basereg)); *(cd->mcodeptr++) = 0x0f; *(cd->mcodeptr++) = 0x57; - x86_64_emit_membase((basereg),(disp),(dreg)); + emit_membase((basereg),(disp),(dreg)); } diff --git a/src/vm/jit/x86_64/md-emit.h b/src/vm/jit/x86_64/md-emit.h index 41fccc86b..202ddb786 100644 --- a/src/vm/jit/x86_64/md-emit.h +++ b/src/vm/jit/x86_64/md-emit.h @@ -28,7 +28,7 @@ Changes: - $Id: md-emit.h 4791 2006-04-18 21:16:36Z twisti $ + $Id: md-emit.h 4853 2006-04-27 12:33:20Z twisti $ */ @@ -39,6 +39,224 @@ #include "vm/types.h" +/* macros to create code ******************************************************/ + +/* immediate data union */ + +typedef union { + s4 i; + s8 l; + float f; + double d; + void *a; + u1 b[8]; +} imm_buf; + + +/* opcodes for alu instructions */ + +#define ALU_ADD 0 +#define ALU_OR 1 +#define ALU_ADC 2 +#define ALU_SBB 3 +#define ALU_AND 4 +#define ALU_SUB 5 +#define ALU_XOR 6 +#define ALU_CMP 7 + + +#define SHIFT_ROL 0 +#define SHIFT_ROR 1 +#define SHIFT_RCL 2 +#define SHIFT_RCR 3 +#define SHIFT_SHL 4 +#define SHIFT_SHR 5 +#define SHIFT_SAR 7 + + +#define CC_O 0 +#define CC_NO 1 +#define CC_B 2 +#define CC_C 2 +#define CC_NAE 2 +#define CC_AE 3 +#define CC_NB 3 +#define CC_NC 3 +#define CC_E 4 +#define CC_Z 4 +#define CC_NE 5 +#define CC_NZ 5 +#define CC_BE 6 +#define CC_NA 6 +#define CC_A 7 +#define CC_NBE 7 +#define CC_S 8 +#define CC_LZ 8 +#define CC_NS 9 +#define CC_GEZ 9 +#define CC_P 0x0a +#define CC_PE 0x0a +#define CC_NP 0x0b +#define CC_PO 0x0b +#define CC_L 0x0c +#define CC_NGE 0x0c +#define CC_GE 0x0d +#define CC_NL 0x0d +#define CC_LE 0x0e +#define CC_NG 0x0e +#define CC_G 0x0f +#define CC_NLE 0x0f + + +#define IS_IMM8(imm) \ + (((long) (imm) >= -128) && ((long) (imm) <= 127)) + + +#define IS_IMM32(imm) \ + (((long) (imm) >= (-2147483647-1)) && ((long) (imm) <= 2147483647)) + + +/* modrm and stuff */ + +#define emit_address_byte(mod,reg,rm) \ + *(cd->mcodeptr++) = ((((mod) & 0x03) << 6) | (((reg) & 0x07) << 3) | ((rm) & 0x07)); + + +#define emit_reg(reg,rm) \ + emit_address_byte(3,(reg),(rm)); + + +#define emit_rex(size,reg,index,rm) \ + if (((size) == 1) || ((reg) > 7) || ((index) > 7) || ((rm) > 7)) { \ + *(cd->mcodeptr++) = (0x40 | (((size) & 0x01) << 3) | ((((reg) >> 3) & 0x01) << 2) | ((((index) >> 3) & 0x01) << 1) | (((rm) >> 3) & 0x01)); \ + } + + +#define emit_byte_rex(reg,index,rm) \ + *(cd->mcodeptr++) = (0x40 | ((((reg) >> 3) & 0x01) << 2) | ((((index) >> 3) & 0x01) << 1) | (((rm) >> 3) & 0x01)); + + +#define emit_mem(r,disp) \ + do { \ + emit_address_byte(0,(r),5); \ + emit_imm32((disp)); \ + } while (0) + + +#define emit_membase(basereg,disp,dreg) \ + do { \ + if ((basereg) == REG_SP || (basereg) == R12) { \ + if ((disp) == 0) { \ + emit_address_byte(0,(dreg),REG_SP); \ + emit_address_byte(0,REG_SP,REG_SP); \ + } else if (IS_IMM8((disp))) { \ + emit_address_byte(1,(dreg),REG_SP); \ + emit_address_byte(0,REG_SP,REG_SP); \ + emit_imm8((disp)); \ + } else { \ + emit_address_byte(2,(dreg),REG_SP); \ + emit_address_byte(0,REG_SP,REG_SP); \ + emit_imm32((disp)); \ + } \ + break; \ + } \ + if ((disp) == 0 && (basereg) != RBP && (basereg) != R13) { \ + emit_address_byte(0,(dreg),(basereg)); \ + break; \ + } \ + \ + if ((basereg) == RIP) { \ + emit_address_byte(0,(dreg),RBP); \ + emit_imm32((disp)); \ + break; \ + } \ + \ + if (IS_IMM8((disp))) { \ + emit_address_byte(1,(dreg),(basereg)); \ + emit_imm8((disp)); \ + } else { \ + emit_address_byte(2,(dreg),(basereg)); \ + emit_imm32((disp)); \ + } \ + } while (0) + + +#define emit_membase32(basereg,disp,dreg) \ + do { \ + if ((basereg) == REG_SP || (basereg) == R12) { \ + emit_address_byte(2,(dreg),REG_SP); \ + emit_address_byte(0,REG_SP,REG_SP); \ + emit_imm32((disp)); \ + } else {\ + emit_address_byte(2,(dreg),(basereg)); \ + emit_imm32((disp)); \ + } \ + } while (0) + + +#define emit_memindex(reg,disp,basereg,indexreg,scale) \ + do { \ + if ((basereg) == -1) { \ + emit_address_byte(0,(reg),4); \ + emit_address_byte((scale),(indexreg),5); \ + emit_imm32((disp)); \ + \ + } else if ((disp) == 0 && (basereg) != RBP && (basereg) != R13) { \ + emit_address_byte(0,(reg),4); \ + emit_address_byte((scale),(indexreg),(basereg)); \ + \ + } else if (IS_IMM8((disp))) { \ + emit_address_byte(1,(reg),4); \ + emit_address_byte((scale),(indexreg),(basereg)); \ + emit_imm8 ((disp)); \ + \ + } else { \ + emit_address_byte(2,(reg),4); \ + emit_address_byte((scale),(indexreg),(basereg)); \ + emit_imm32((disp)); \ + } \ + } while (0) + + +#define emit_imm8(imm) \ + *(cd->mcodeptr++) = (u1) ((imm) & 0xff); + + +#define emit_imm16(imm) \ + do { \ + imm_buf imb; \ + imb.i = (s4) (imm); \ + *(cd->mcodeptr++) = imb.b[0]; \ + *(cd->mcodeptr++) = imb.b[1]; \ + } while (0) + + +#define emit_imm32(imm) \ + do { \ + imm_buf imb; \ + imb.i = (s4) (imm); \ + *(cd->mcodeptr++) = imb.b[0]; \ + *(cd->mcodeptr++) = imb.b[1]; \ + *(cd->mcodeptr++) = imb.b[2]; \ + *(cd->mcodeptr++) = imb.b[3]; \ + } while (0) + + +#define emit_imm64(imm) \ + do { \ + imm_buf imb; \ + imb.l = (s8) (imm); \ + *(cd->mcodeptr++) = imb.b[0]; \ + *(cd->mcodeptr++) = imb.b[1]; \ + *(cd->mcodeptr++) = imb.b[2]; \ + *(cd->mcodeptr++) = imb.b[3]; \ + *(cd->mcodeptr++) = imb.b[4]; \ + *(cd->mcodeptr++) = imb.b[5]; \ + *(cd->mcodeptr++) = imb.b[6]; \ + *(cd->mcodeptr++) = imb.b[7]; \ + } while (0) + + /* function prototypes ********************************************************/ void emit_cmovxx(codegendata *cd, instruction *iptr, s4 s, s4 d); @@ -46,179 +264,179 @@ void emit_cmovxx(codegendata *cd, instruction *iptr, s4 s, s4 d); /* code generation prototypes */ -void x86_64_emit_ialu(codegendata *cd, s4 alu_op, stackptr src, instruction *iptr); -void x86_64_emit_lalu(codegendata *cd, s4 alu_op, stackptr src, instruction *iptr); -void x86_64_emit_ialuconst(codegendata *cd, s4 alu_op, stackptr src, instruction *iptr); -void x86_64_emit_laluconst(codegendata *cd, s4 alu_op, stackptr src, instruction *iptr); -void x86_64_emit_ishift(codegendata *cd, s4 shift_op, stackptr src, instruction *iptr); -void x86_64_emit_lshift(codegendata *cd, s4 shift_op, stackptr src, instruction *iptr); -void x86_64_emit_ishiftconst(codegendata *cd, s4 shift_op, stackptr src, instruction *iptr); -void x86_64_emit_lshiftconst(codegendata *cd, s4 shift_op, stackptr src, instruction *iptr); -void x86_64_emit_ifcc(codegendata *cd, s4 if_op, stackptr src, instruction *iptr); -void x86_64_emit_if_lcc(codegendata *cd, s4 if_op, stackptr src, instruction *iptr); -void x86_64_emit_if_icmpcc(codegendata *cd, s4 if_op, stackptr src, instruction *iptr); -void x86_64_emit_if_lcmpcc(codegendata *cd, s4 if_op, stackptr src, instruction *iptr); +void emit_ialu(codegendata *cd, s4 alu_op, stackptr src, instruction *iptr); +void emit_lalu(codegendata *cd, s4 alu_op, stackptr src, instruction *iptr); +void emit_ialuconst(codegendata *cd, s4 alu_op, stackptr src, instruction *iptr); +void emit_laluconst(codegendata *cd, s4 alu_op, stackptr src, instruction *iptr); +void emit_ishift(codegendata *cd, s4 shift_op, stackptr src, instruction *iptr); +void emit_lshift(codegendata *cd, s4 shift_op, stackptr src, instruction *iptr); +void emit_ishiftconst(codegendata *cd, s4 shift_op, stackptr src, instruction *iptr); +void emit_lshiftconst(codegendata *cd, s4 shift_op, stackptr src, instruction *iptr); +void emit_ifcc(codegendata *cd, s4 if_op, stackptr src, instruction *iptr); +void emit_if_lcc(codegendata *cd, s4 if_op, stackptr src, instruction *iptr); +void emit_if_icmpcc(codegendata *cd, s4 if_op, stackptr src, instruction *iptr); +void emit_if_lcmpcc(codegendata *cd, s4 if_op, stackptr src, instruction *iptr); /* integer instructions */ -void x86_64_mov_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_mov_imm_reg(codegendata *cd, s8 imm, s8 reg); -void x86_64_movl_imm_reg(codegendata *cd, s8 imm, s8 reg); -void x86_64_mov_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg); -void x86_64_mov_membase32_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg); -void x86_64_movl_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg); -void x86_64_movl_membase32_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg); -void x86_64_mov_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp); -void x86_64_mov_reg_membase32(codegendata *cd, s8 reg, s8 basereg, s8 disp); -void x86_64_movl_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp); -void x86_64_movl_reg_membase32(codegendata *cd, s8 reg, s8 basereg, s8 disp); -void x86_64_mov_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg); -void x86_64_movl_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg); -void x86_64_mov_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale); -void x86_64_movl_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale); -void x86_64_movw_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale); -void x86_64_movb_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale); -void x86_64_mov_imm_membase(codegendata *cd, s8 imm, s8 basereg, s8 disp); -void x86_64_mov_imm_membase32(codegendata *cd, s8 imm, s8 basereg, s8 disp); -void x86_64_movl_imm_membase(codegendata *cd, s8 imm, s8 basereg, s8 disp); -void x86_64_movl_imm_membase32(codegendata *cd, s8 imm, s8 basereg, s8 disp); -void x86_64_movsbq_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_movsbq_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); -void x86_64_movswq_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_movswq_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); -void x86_64_movslq_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_movslq_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); -void x86_64_movzwq_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_movzwq_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); -void x86_64_movswq_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg); -void x86_64_movsbq_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg); -void x86_64_movzwq_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg); -void x86_64_mov_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale); -void x86_64_movl_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale); -void x86_64_movw_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale); -void x86_64_movb_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale); -void x86_64_alu_reg_reg(codegendata *cd, s8 opc, s8 reg, s8 dreg); -void x86_64_alul_reg_reg(codegendata *cd, s8 opc, s8 reg, s8 dreg); -void x86_64_alu_reg_membase(codegendata *cd, s8 opc, s8 reg, s8 basereg, s8 disp); -void x86_64_alul_reg_membase(codegendata *cd, s8 opc, s8 reg, s8 basereg, s8 disp); -void x86_64_alu_membase_reg(codegendata *cd, s8 opc, s8 basereg, s8 disp, s8 reg); -void x86_64_alul_membase_reg(codegendata *cd, s8 opc, s8 basereg, s8 disp, s8 reg); -void x86_64_alu_imm_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg); -void x86_64_alu_imm32_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg); -void x86_64_alul_imm_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg); -void x86_64_alu_imm_membase(codegendata *cd, s8 opc, s8 imm, s8 basereg, s8 disp); -void x86_64_alul_imm_membase(codegendata *cd, s8 opc, s8 imm, s8 basereg, s8 disp); -void x86_64_test_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_testl_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_test_imm_reg(codegendata *cd, s8 imm, s8 reg); -void x86_64_testw_imm_reg(codegendata *cd, s8 imm, s8 reg); -void x86_64_testb_imm_reg(codegendata *cd, s8 imm, s8 reg); -void x86_64_lea_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg); -void x86_64_leal_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg); -void x86_64_inc_reg(codegendata *cd, s8 reg); -void x86_64_incl_reg(codegendata *cd, s8 reg); -void x86_64_inc_membase(codegendata *cd, s8 basereg, s8 disp); -void x86_64_incl_membase(codegendata *cd, s8 basereg, s8 disp); -void x86_64_dec_reg(codegendata *cd, s8 reg); -void x86_64_decl_reg(codegendata *cd, s8 reg); -void x86_64_dec_membase(codegendata *cd, s8 basereg, s8 disp); -void x86_64_decl_membase(codegendata *cd, s8 basereg, s8 disp); -void x86_64_cltd(codegendata *cd); -void x86_64_cqto(codegendata *cd); -void x86_64_imul_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_imull_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_imul_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); -void x86_64_imull_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); -void x86_64_imul_imm_reg(codegendata *cd, s8 imm, s8 dreg); -void x86_64_imul_imm_reg_reg(codegendata *cd, s8 imm,s8 reg, s8 dreg); -void x86_64_imull_imm_reg_reg(codegendata *cd, s8 imm, s8 reg, s8 dreg); -void x86_64_imul_imm_membase_reg(codegendata *cd, s8 imm, s8 basereg, s8 disp, s8 dreg); -void x86_64_imull_imm_membase_reg(codegendata *cd, s8 imm, s8 basereg, s8 disp, s8 dreg); -void x86_64_idiv_reg(codegendata *cd, s8 reg); -void x86_64_idivl_reg(codegendata *cd, s8 reg); -void x86_64_ret(codegendata *cd); -void x86_64_shift_reg(codegendata *cd, s8 opc, s8 reg); -void x86_64_shiftl_reg(codegendata *cd, s8 opc, s8 reg); -void x86_64_shift_membase(codegendata *cd, s8 opc, s8 basereg, s8 disp); -void x86_64_shiftl_membase(codegendata *cd, s8 opc, s8 basereg, s8 disp); -void x86_64_shift_imm_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg); -void x86_64_shiftl_imm_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg); -void x86_64_shift_imm_membase(codegendata *cd, s8 opc, s8 imm, s8 basereg, s8 disp); -void x86_64_shiftl_imm_membase(codegendata *cd, s8 opc, s8 imm, s8 basereg, s8 disp); -void x86_64_jmp_imm(codegendata *cd, s8 imm); -void x86_64_jmp_reg(codegendata *cd, s8 reg); -void x86_64_jcc(codegendata *cd, s8 opc, s8 imm); -void x86_64_setcc_reg(codegendata *cd, s8 opc, s8 reg); -void x86_64_setcc_membase(codegendata *cd, s8 opc, s8 basereg, s8 disp); -void x86_64_cmovcc_reg_reg(codegendata *cd, s8 opc, s8 reg, s8 dreg); -void x86_64_cmovccl_reg_reg(codegendata *cd, s8 opc, s8 reg, s8 dreg); -void x86_64_neg_reg(codegendata *cd, s8 reg); -void x86_64_negl_reg(codegendata *cd, s8 reg); -void x86_64_neg_membase(codegendata *cd, s8 basereg, s8 disp); -void x86_64_negl_membase(codegendata *cd, s8 basereg, s8 disp); -void x86_64_push_reg(codegendata *cd, s8 reg); -void x86_64_push_imm(codegendata *cd, s8 imm); -void x86_64_pop_reg(codegendata *cd, s8 reg); -void x86_64_xchg_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_nop(codegendata *cd); -void x86_64_call_reg(codegendata *cd, s8 reg); -void x86_64_call_imm(codegendata *cd, s8 imm); -void x86_64_call_mem(codegendata *cd, ptrint mem); +void emit_mov_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_mov_imm_reg(codegendata *cd, s8 imm, s8 reg); +void emit_movl_imm_reg(codegendata *cd, s8 imm, s8 reg); +void emit_mov_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg); +void emit_mov_membase32_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg); +void emit_movl_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg); +void emit_movl_membase32_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg); +void emit_mov_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp); +void emit_mov_reg_membase32(codegendata *cd, s8 reg, s8 basereg, s8 disp); +void emit_movl_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp); +void emit_movl_reg_membase32(codegendata *cd, s8 reg, s8 basereg, s8 disp); +void emit_mov_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg); +void emit_movl_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg); +void emit_mov_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale); +void emit_movl_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale); +void emit_movw_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale); +void emit_movb_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale); +void emit_mov_imm_membase(codegendata *cd, s8 imm, s8 basereg, s8 disp); +void emit_mov_imm_membase32(codegendata *cd, s8 imm, s8 basereg, s8 disp); +void emit_movl_imm_membase(codegendata *cd, s8 imm, s8 basereg, s8 disp); +void emit_movl_imm_membase32(codegendata *cd, s8 imm, s8 basereg, s8 disp); +void emit_movsbq_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_movsbq_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); +void emit_movswq_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_movswq_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); +void emit_movslq_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_movslq_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); +void emit_movzwq_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_movzwq_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); +void emit_movswq_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg); +void emit_movsbq_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg); +void emit_movzwq_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg); +void emit_mov_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale); +void emit_movl_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale); +void emit_movw_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale); +void emit_movb_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale); +void emit_alu_reg_reg(codegendata *cd, s8 opc, s8 reg, s8 dreg); +void emit_alul_reg_reg(codegendata *cd, s8 opc, s8 reg, s8 dreg); +void emit_alu_reg_membase(codegendata *cd, s8 opc, s8 reg, s8 basereg, s8 disp); +void emit_alul_reg_membase(codegendata *cd, s8 opc, s8 reg, s8 basereg, s8 disp); +void emit_alu_membase_reg(codegendata *cd, s8 opc, s8 basereg, s8 disp, s8 reg); +void emit_alul_membase_reg(codegendata *cd, s8 opc, s8 basereg, s8 disp, s8 reg); +void emit_alu_imm_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg); +void emit_alu_imm32_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg); +void emit_alul_imm_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg); +void emit_alu_imm_membase(codegendata *cd, s8 opc, s8 imm, s8 basereg, s8 disp); +void emit_alul_imm_membase(codegendata *cd, s8 opc, s8 imm, s8 basereg, s8 disp); +void emit_test_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_testl_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_test_imm_reg(codegendata *cd, s8 imm, s8 reg); +void emit_testw_imm_reg(codegendata *cd, s8 imm, s8 reg); +void emit_testb_imm_reg(codegendata *cd, s8 imm, s8 reg); +void emit_lea_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg); +void emit_leal_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 reg); +void emit_inc_reg(codegendata *cd, s8 reg); +void emit_incl_reg(codegendata *cd, s8 reg); +void emit_inc_membase(codegendata *cd, s8 basereg, s8 disp); +void emit_incl_membase(codegendata *cd, s8 basereg, s8 disp); +void emit_dec_reg(codegendata *cd, s8 reg); +void emit_decl_reg(codegendata *cd, s8 reg); +void emit_dec_membase(codegendata *cd, s8 basereg, s8 disp); +void emit_decl_membase(codegendata *cd, s8 basereg, s8 disp); +void emit_cltd(codegendata *cd); +void emit_cqto(codegendata *cd); +void emit_imul_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_imull_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_imul_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); +void emit_imull_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); +void emit_imul_imm_reg(codegendata *cd, s8 imm, s8 dreg); +void emit_imul_imm_reg_reg(codegendata *cd, s8 imm,s8 reg, s8 dreg); +void emit_imull_imm_reg_reg(codegendata *cd, s8 imm, s8 reg, s8 dreg); +void emit_imul_imm_membase_reg(codegendata *cd, s8 imm, s8 basereg, s8 disp, s8 dreg); +void emit_imull_imm_membase_reg(codegendata *cd, s8 imm, s8 basereg, s8 disp, s8 dreg); +void emit_idiv_reg(codegendata *cd, s8 reg); +void emit_idivl_reg(codegendata *cd, s8 reg); +void emit_ret(codegendata *cd); +void emit_shift_reg(codegendata *cd, s8 opc, s8 reg); +void emit_shiftl_reg(codegendata *cd, s8 opc, s8 reg); +void emit_shift_membase(codegendata *cd, s8 opc, s8 basereg, s8 disp); +void emit_shiftl_membase(codegendata *cd, s8 opc, s8 basereg, s8 disp); +void emit_shift_imm_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg); +void emit_shiftl_imm_reg(codegendata *cd, s8 opc, s8 imm, s8 dreg); +void emit_shift_imm_membase(codegendata *cd, s8 opc, s8 imm, s8 basereg, s8 disp); +void emit_shiftl_imm_membase(codegendata *cd, s8 opc, s8 imm, s8 basereg, s8 disp); +void emit_jmp_imm(codegendata *cd, s8 imm); +void emit_jmp_reg(codegendata *cd, s8 reg); +void emit_jcc(codegendata *cd, s8 opc, s8 imm); +void emit_setcc_reg(codegendata *cd, s8 opc, s8 reg); +void emit_setcc_membase(codegendata *cd, s8 opc, s8 basereg, s8 disp); +void emit_cmovcc_reg_reg(codegendata *cd, s8 opc, s8 reg, s8 dreg); +void emit_cmovccl_reg_reg(codegendata *cd, s8 opc, s8 reg, s8 dreg); +void emit_neg_reg(codegendata *cd, s8 reg); +void emit_negl_reg(codegendata *cd, s8 reg); +void emit_neg_membase(codegendata *cd, s8 basereg, s8 disp); +void emit_negl_membase(codegendata *cd, s8 basereg, s8 disp); +void emit_push_reg(codegendata *cd, s8 reg); +void emit_push_imm(codegendata *cd, s8 imm); +void emit_pop_reg(codegendata *cd, s8 reg); +void emit_xchg_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_nop(codegendata *cd); +void emit_call_reg(codegendata *cd, s8 reg); +void emit_call_imm(codegendata *cd, s8 imm); +void emit_call_mem(codegendata *cd, ptrint mem); /* floating point instructions (SSE2) */ -void x86_64_addsd_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_addss_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_cvtsi2ssq_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_cvtsi2ss_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_cvtsi2sdq_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_cvtsi2sd_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_cvtss2sd_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_cvtsd2ss_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_cvttss2siq_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_cvttss2si_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_cvttsd2siq_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_cvttsd2si_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_divss_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_divsd_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_movd_reg_freg(codegendata *cd, s8 reg, s8 freg); -void x86_64_movd_freg_reg(codegendata *cd, s8 freg, s8 reg); -void x86_64_movd_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp); -void x86_64_movd_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale); -void x86_64_movd_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); -void x86_64_movdl_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); -void x86_64_movd_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 dreg); -void x86_64_movq_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_movq_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp); -void x86_64_movq_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); -void x86_64_movss_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_movsd_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_movss_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp); -void x86_64_movss_reg_membase32(codegendata *cd, s8 reg, s8 basereg, s8 disp); -void x86_64_movsd_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp); -void x86_64_movsd_reg_membase32(codegendata *cd, s8 reg, s8 basereg, s8 disp); -void x86_64_movss_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); -void x86_64_movss_membase32_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); -void x86_64_movlps_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); -void x86_64_movsd_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); -void x86_64_movsd_membase32_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); -void x86_64_movlpd_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); -void x86_64_movss_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale); -void x86_64_movsd_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale); -void x86_64_movss_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 dreg); -void x86_64_movsd_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 dreg); -void x86_64_mulss_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_mulsd_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_subss_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_subsd_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_ucomiss_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_ucomisd_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_xorps_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_xorps_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); -void x86_64_xorpd_reg_reg(codegendata *cd, s8 reg, s8 dreg); -void x86_64_xorpd_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); +void emit_addsd_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_addss_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_cvtsi2ssq_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_cvtsi2ss_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_cvtsi2sdq_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_cvtsi2sd_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_cvtss2sd_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_cvtsd2ss_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_cvttss2siq_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_cvttss2si_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_cvttsd2siq_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_cvttsd2si_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_divss_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_divsd_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_movd_reg_freg(codegendata *cd, s8 reg, s8 freg); +void emit_movd_freg_reg(codegendata *cd, s8 freg, s8 reg); +void emit_movd_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp); +void emit_movd_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale); +void emit_movd_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); +void emit_movdl_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); +void emit_movd_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 dreg); +void emit_movq_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_movq_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp); +void emit_movq_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); +void emit_movss_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_movsd_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_movss_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp); +void emit_movss_reg_membase32(codegendata *cd, s8 reg, s8 basereg, s8 disp); +void emit_movsd_reg_membase(codegendata *cd, s8 reg, s8 basereg, s8 disp); +void emit_movsd_reg_membase32(codegendata *cd, s8 reg, s8 basereg, s8 disp); +void emit_movss_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); +void emit_movss_membase32_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); +void emit_movlps_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); +void emit_movsd_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); +void emit_movsd_membase32_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); +void emit_movlpd_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); +void emit_movss_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale); +void emit_movsd_reg_memindex(codegendata *cd, s8 reg, s8 disp, s8 basereg, s8 indexreg, s8 scale); +void emit_movss_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 dreg); +void emit_movsd_memindex_reg(codegendata *cd, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 dreg); +void emit_mulss_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_mulsd_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_subss_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_subsd_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_ucomiss_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_ucomisd_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_xorps_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_xorps_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); +void emit_xorpd_reg_reg(codegendata *cd, s8 reg, s8 dreg); +void emit_xorpd_membase_reg(codegendata *cd, s8 basereg, s8 disp, s8 dreg); /* system instructions ********************************************************/ -- 2.25.1