From 8e2847c28ef57cf1ee49653dabee6bd3ed1f2525 Mon Sep 17 00:00:00 2001 From: Eric Biederman Date: Sat, 23 Oct 2004 03:00:02 +0000 Subject: [PATCH 1/1] - For now use port 0x80 based delays in for the e7501 memory initialization. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1712 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/tyan/s2735/auto.c | 2 ++ src/northbridge/intel/e7501/raminit.c | 16 +++++++++++++--- 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/src/mainboard/tyan/s2735/auto.c b/src/mainboard/tyan/s2735/auto.c index 0b037142f..091e74f32 100644 --- a/src/mainboard/tyan/s2735/auto.c +++ b/src/mainboard/tyan/s2735/auto.c @@ -14,8 +14,10 @@ #include "ram/ramtest.c" #include "southbridge/intel/i82801er/i82801er_early_smbus.c" #include "northbridge/intel/e7501/raminit.h" +#if 0 #include "cpu/intel/model_f2x/apic_timer.c" #include "lib/delay.c" +#endif #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/intel/e7501/debug.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c" diff --git a/src/northbridge/intel/e7501/raminit.c b/src/northbridge/intel/e7501/raminit.c index 09743ba5f..ef231666e 100644 --- a/src/northbridge/intel/e7501/raminit.c +++ b/src/northbridge/intel/e7501/raminit.c @@ -492,8 +492,11 @@ static void write_8dwords(uint32_t src_addr, uint32_t dst_addr) { } } -//#define SLOW_DOWN_IO inb(0x80); +#if 1 +#define SLOW_DOWN_IO inb(0x80); +#else #define SLOW_DOWN_IO udelay(40); +#endif static void ram_set_rcomp_regs(const struct mem_controller *ctrl) { uint32_t dword; @@ -1978,10 +1981,17 @@ static void mem_err { /* Estimate that SLOW_DOWN_IO takes about 50&76us*/ /* delay for 200us */ +#if 1 +static void do_delay(void) +{ + int i; + for(i = 0; i < 16; i++) { SLOW_DOWN_IO } +} +#define DO_DELAY do_delay(); +#else #define DO_DELAY \ udelay(200); -// for(i=0; i<16;i++) { SLOW_DOWN_IO } - +#endif #define EXTRA_DELAY DO_DELAY -- 2.25.1