From 7a39446ec236b9eeba7454790fc32fc4240d7e42 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Mon, 13 Feb 2012 13:38:27 +0200 Subject: [PATCH 1/1] Intel cpus: Include CAR from socket MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit It was not obvious which CAR was compiled in. Also build would fail if a socket included two models with both having an include for CAR. Change-Id: I000c2e24807c3d99347a43d120333c13fbf91af4 Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/626 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/cpu/intel/model_6ex/Makefile.inc | 1 - src/cpu/intel/socket_LGA771/Makefile.inc | 1 + src/cpu/intel/socket_mFCPGA478/Makefile.inc | 1 + 3 files changed, 2 insertions(+), 1 deletion(-) diff --git a/src/cpu/intel/model_6ex/Makefile.inc b/src/cpu/intel/model_6ex/Makefile.inc index 0053ae788..cc4dc7b8e 100644 --- a/src/cpu/intel/model_6ex/Makefile.inc +++ b/src/cpu/intel/model_6ex/Makefile.inc @@ -1,4 +1,3 @@ driver-y += model_6ex_init.c subdirs-y += ../../x86/name -cpu_incs += $(src)/cpu/intel/model_6ex/cache_as_ram.inc diff --git a/src/cpu/intel/socket_LGA771/Makefile.inc b/src/cpu/intel/socket_LGA771/Makefile.inc index 319430f93..ef520a359 100644 --- a/src/cpu/intel/socket_LGA771/Makefile.inc +++ b/src/cpu/intel/socket_LGA771/Makefile.inc @@ -9,3 +9,4 @@ subdirs-y += ../../x86/smm subdirs-y += ../microcode subdirs-y += ../hyperthreading +cpu_incs += $(src)/cpu/intel/model_6ex/cache_as_ram.inc diff --git a/src/cpu/intel/socket_mFCPGA478/Makefile.inc b/src/cpu/intel/socket_mFCPGA478/Makefile.inc index 74433a278..29973af77 100644 --- a/src/cpu/intel/socket_mFCPGA478/Makefile.inc +++ b/src/cpu/intel/socket_mFCPGA478/Makefile.inc @@ -12,3 +12,4 @@ subdirs-y += ../microcode subdirs-y += ../hyperthreading subdirs-y += ../speedstep +cpu_incs += $(src)/cpu/intel/model_6ex/cache_as_ram.inc -- 2.25.1