From 392aac7b4b3f6613075633c90aa10313434d186e Mon Sep 17 00:00:00 2001 From: tbfg Date: Wed, 11 Apr 2007 16:39:22 +0000 Subject: [PATCH] * src/vm/jit/powerpc64/arch.h (SUPPORT_LONG_SHIFT): Enabled. * src/vm/jit/powerpc64/codegen.c (ICMD_LSHLCONST): Implemented. (ICMD_LSHRCONST): Likewise. (ICMD_LUSHRCONST): Likewise. (ICMD_LSHL): Likewise. (ICMD_LSHR): Likewise. (ICMD_LUSHR): Likewise. (ICMD_IUSHR): Fixed. (ICMD_IUSHRCONST): Fixed. * src/vm/jit/powerpc64/codegen.h (M_SRL): Use 64bit opcode. (M_SRA): Likewise. (M_SRA_IMM): Likewise. (M_SRL_IMM): Likewise. (M_SSL_IMM): Likewise. (M_SSL): Likewise. (M_CLR_HIGH): Added. --- src/vm/jit/powerpc64/arch.h | 4 +-- src/vm/jit/powerpc64/codegen.c | 54 +++++++++++++++++++++++++++++++--- src/vm/jit/powerpc64/codegen.h | 14 +++++---- 3 files changed, 60 insertions(+), 12 deletions(-) diff --git a/src/vm/jit/powerpc64/arch.h b/src/vm/jit/powerpc64/arch.h index 6147447c5..9b8de657a 100644 --- a/src/vm/jit/powerpc64/arch.h +++ b/src/vm/jit/powerpc64/arch.h @@ -22,7 +22,7 @@ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. - $Id: arch.h 7596 2007-03-28 21:05:53Z twisti $ + $Id: arch.h 7687 2007-04-11 16:39:22Z tbfg $ */ @@ -52,7 +52,7 @@ #define SUPPORT_LONG_CMP 1 #define SUPPORT_LONG_CMP_CONST 1 #define SUPPORT_LONG_LOGICAL 1 -#define SUPPORT_LONG_SHIFT 0 /* TODO: implement ICMD_IMULPOW2 and reenable*/ +#define SUPPORT_LONG_SHIFT 1 #define SUPPORT_LONG_MUL 1 #define SUPPORT_LONG_DIV 1 #define SUPPORT_LONG_ICVT 1 diff --git a/src/vm/jit/powerpc64/codegen.c b/src/vm/jit/powerpc64/codegen.c index a31cbd8d1..baa30d413 100644 --- a/src/vm/jit/powerpc64/codegen.c +++ b/src/vm/jit/powerpc64/codegen.c @@ -22,7 +22,7 @@ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. - $Id: codegen.c 7596 2007-03-28 21:05:53Z twisti $ + $Id: codegen.c 7687 2007-04-11 16:39:22Z tbfg $ */ @@ -736,7 +736,7 @@ bool codegen_emit(jitdata *jd) break; case ICMD_IDIVPOW2: /* ..., value ==> ..., value << constant */ - + s1 = emit_load_s1(jd, iptr, REG_ITMP1); d = codegen_reg_of_dst(jd, iptr, REG_ITMP3); M_SRA_IMM(s1, iptr->sx.val.i, d); @@ -790,7 +790,9 @@ bool codegen_emit(jitdata *jd) s2 = emit_load_s2(jd, iptr, REG_ITMP2); d = codegen_reg_of_dst(jd, iptr, REG_ITMP2); M_AND_IMM(s2, 0x1f, REG_ITMP2); - M_SRL(s1, REG_ITMP2, d); + M_MOV(s1, REG_ITMP1); + M_CLR_HIGH(REG_ITMP1); + M_SRL(REG_ITMP1, REG_ITMP2, d); emit_store_dst(jd, iptr, d); break; @@ -800,12 +802,56 @@ bool codegen_emit(jitdata *jd) s1 = emit_load_s1(jd, iptr, REG_ITMP1); d = codegen_reg_of_dst(jd, iptr, REG_ITMP2); if (iptr->sx.val.i & 0x1f) { - M_SRL_IMM(s1, iptr->sx.val.i & 0x1f, d); + M_MOV(s1, REG_ITMP1); + M_CLR_HIGH(REG_ITMP1); + M_SRA_IMM(REG_ITMP1, iptr->sx.val.i & 0x1f, d); } else { M_INTMOVE(s1, d); } emit_store_dst(jd, iptr, d); break; + + case ICMD_LSHLCONST: + s1 = emit_load_s1(jd, iptr, REG_ITMP1); + d = codegen_reg_of_dst(jd, iptr, REG_ITMP2); + M_SLL_IMM(s1, iptr->sx.val.i & 0x3f, d); + emit_store_dst(jd, iptr, d); + break; + case ICMD_LSHL: + s1 = emit_load_s1(jd, iptr, REG_ITMP1); + s2 = emit_load_s2(jd, iptr, REG_ITMP2); + d = codegen_reg_of_dst(jd, iptr, REG_ITMP2); + M_AND_IMM(s2, 0x3f, REG_ITMP2); + M_SLL(s1, REG_ITMP2, d); + emit_store_dst(jd, iptr, d); + break; + case ICMD_LSHRCONST: + s1 = emit_load_s1(jd, iptr, REG_ITMP1); + d = codegen_reg_of_dst(jd, iptr, REG_ITMP2); + M_SRA_IMM(s1, iptr->sx.val.i & 0x3f, d); + emit_store_dst(jd, iptr, d); + break; + case ICMD_LSHR: + s1 = emit_load_s1(jd, iptr, REG_ITMP1); + s2 = emit_load_s2(jd, iptr, REG_ITMP2); + d = codegen_reg_of_dst(jd, iptr, REG_ITMP2); + M_SRA(s1, s2, d); + emit_store_dst(jd, iptr, d); + break; + case ICMD_LUSHRCONST: + s1 = emit_load_s1(jd, iptr, REG_ITMP1); + d = codegen_reg_of_dst(jd, iptr, REG_ITMP2); + M_SRL_IMM(s1, iptr->sx.val.i & 0x3f, d); + emit_store_dst(jd, iptr, d); + break; + case ICMD_LUSHR: + s1 = emit_load_s1(jd, iptr, REG_ITMP1); + s2 = emit_load_s2(jd, iptr, REG_ITMP2); + d = codegen_reg_of_dst(jd, iptr, REG_ITMP2); + M_AND_IMM(s2, 0x3f, REG_ITMP2); + M_SRL(s1, REG_ITMP2, d); + emit_store_dst(jd, iptr, d); + break; case ICMD_IAND: /* ..., val1, val2 ==> ..., val1 & val2 */ case ICMD_LAND: diff --git a/src/vm/jit/powerpc64/codegen.h b/src/vm/jit/powerpc64/codegen.h index ae16d48dc..a049348fa 100644 --- a/src/vm/jit/powerpc64/codegen.h +++ b/src/vm/jit/powerpc64/codegen.h @@ -30,7 +30,7 @@ Christian Thalinger Christian Ullrich - $Id: codegen.h 7596 2007-03-28 21:05:53Z twisti $ + $Id: codegen.h 7687 2007-04-11 16:39:22Z tbfg $ */ @@ -194,10 +194,13 @@ #define M_XOR_IMM(a,b,c) M_OP2_IMM(26, a, c, b) #define M_XORIS(a,b,c) M_OP2_IMM(27, a, c, b) +/* RLDICR is said to be turing complete, this seems right */ #define M_SLL(a,b,c) M_OP3(31, 27, 0, 0, a, c, b) -#define M_SRL(a,b,c) M_OP3(31, 536, 0, 0, a, c, b) -#define M_SRA(a,b,c) M_OP3(31, 792, 0, 0, a, c, b) -#define M_SRA_IMM(a,b,c) M_OP3(31, 824, 0, 0, a, c, b) +#define M_SLL_IMM(a,b,c) M_OP3(30, ((b)&0x20 ? 1:0), 0, ((((63-(b))&0x1f)<<6) | (((63-(b))&0x20 ? 1:0)<<5) | 0x04), a, c, (b)&0x1f); +#define M_SRL(a,b,c) M_OP3(31, 539, 0, 0, a, c, b) +#define M_SRL_IMM(a,b,c) M_OP3(30, ((64-(b))&0x20 ? 1:0), 0, (((((b))&0x1f)<<6) | ((((b))&0x20 ? 1:0)<<5) | 0x00), a, c, (64-(b))&0x1f); +#define M_SRA(a,b,c) M_OP3(31, 794, 0, 0, a, c, b) +#define M_SRA_IMM(a,b,c) M_OP3(31, (826 | ((b)&0x20?1:0)), 0, 0, a, c, ((b)&0x1f)) #define M_MUL(a,b,c) M_OP3(31, 233, 0, 0, c, a, b) #define M_MUL_IMM(a,b,c) M_OP2_IMM(7, c, a, b) @@ -210,8 +213,6 @@ #define M_SUBFZE(a,b) M_OP3(31, 200, 0, 0, b, a, 0) #define M_RLWINM(a,b,c,d,e) M_OP4(21, d, 0, a, e, b, c) #define M_ADDZE(a,b) M_OP3(31, 202, 0, 0, b, a, 0) -#define M_SLL_IMM(a,b,c) M_OP3(30, ((b)&0x20 ? 1:0), 0, ((((63-(b))&0x1f)<<6) | (((63-(b))&0x20 ? 1:0)<<5) | 0x04), a, c, (b)&0x1f); /* RLDICR is said to be turing complete, this seems right */ -#define M_SRL_IMM(a,b,c) M_RLWINM(a,32-(b),b,31,c) #define M_ADDIS(a,b,c) M_OP2_IMM(15, c, a, b) #define M_STFIWX(a,b,c) M_OP3(31, 983, 0, 0, a, b, c) @@ -474,6 +475,7 @@ #define M_LDATST(a,b,c) M_ADDICTST(b, c, a) #define M_CLR(a) M_LADD_IMM(0, 0, a) +#define M_CLR_HIGH(a) M_OP3(30, 0, 0, 0x20, (a), (a), 0); #define M_AADD_IMM(a,b,c) M_LADD_IMM(a, b, c) #endif /* _CODEGEN_H */ -- 2.25.1