From 0c134635c0cb4c0cd3a2f11a79ee36323992b370 Mon Sep 17 00:00:00 2001 From: Christian Thalinger Date: Mon, 18 Aug 2008 11:34:32 +0200 Subject: [PATCH] Fixes PR97. * src/vm/jit/x86_64/md.h (md_cacheflush): Use a compiler optimization barrier. (md_icacheflush, md_dcacheflush): Likewise. * src/vm/jit/x86_64/patcher.c (PATCH_BACK_ORIGINAL_MCODE): Use md_icacheflush. --- src/vm/jit/x86_64/md.h | 9 ++++++--- src/vm/jit/x86_64/patcher.c | 4 +++- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/src/vm/jit/x86_64/md.h b/src/vm/jit/x86_64/md.h index f60e9720f..e6d117aef 100644 --- a/src/vm/jit/x86_64/md.h +++ b/src/vm/jit/x86_64/md.h @@ -84,7 +84,8 @@ inline static void *md_codegen_get_pv_from_pc(void *ra) inline static void md_cacheflush(u1 *addr, s4 nbytes) { - /* do nothing */ + // Compiler optimization barrier (see PR97). + __asm__ __volatile__ ("" : : : "memory"); } @@ -96,7 +97,8 @@ inline static void md_cacheflush(u1 *addr, s4 nbytes) inline static void md_icacheflush(u1 *addr, s4 nbytes) { - /* do nothing */ + // Compiler optimization barrier (see PR97). + __asm__ __volatile__ ("" : : : "memory"); } @@ -108,7 +110,8 @@ inline static void md_icacheflush(u1 *addr, s4 nbytes) inline static void md_dcacheflush(u1 *addr, s4 nbytes) { - /* do nothing */ + // Compiler optimization barrier (see PR97). + __asm__ __volatile__ ("" : : : "memory"); } #endif /* _VM_JIT_X86_64_MD_H */ diff --git a/src/vm/jit/x86_64/patcher.c b/src/vm/jit/x86_64/patcher.c index aed1918f5..bedf37525 100644 --- a/src/vm/jit/x86_64/patcher.c +++ b/src/vm/jit/x86_64/patcher.c @@ -30,6 +30,7 @@ #include "vm/types.h" #include "vm/jit/x86_64/codegen.h" +#include "vm/jit/x86_64/md.h" #include "mm/memory.h" @@ -48,7 +49,8 @@ #define PATCH_BACK_ORIGINAL_MCODE \ do { \ - *((uint16_t *) pr->mpc) = (uint16_t) pr->mcode; \ + *((uint16_t*) pr->mpc) = (uint16_t) pr->mcode; \ + md_icacheflush((void*) pr->mpc, PATCHER_CALL_SIZE); \ } while (0) -- 2.25.1