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fix interrupt for f5 (ehci)
[coreboot.git] / src / mainboard / olpc /
2006-06-27 Ronald G. Minnichfix interrupt for f5 (ehci) tree | commitdiff
2006-06-24 Ronald G. Minnichfix typo on duplicate line. tree | commitdiff
2006-06-22 Ronald G. Minnichset up interrupt values for the southbridge, and add... tree | commitdiff
2006-06-18 Ronald G. Minnichfix idiiot typo I did not catch. tree | commitdiff
2006-06-18 Ronald G. Minnichadd irq mapper support for OLPC and other boards that... tree | commitdiff
2006-06-10 Ronald G. Minnichchanges from AMD for making OLPC video work. tree | commitdiff
2006-06-08 Ronald G. Minnichfurther development of OLPC. Set vsm size to 35k. add... tree | commitdiff
2006-05-18 Ronald G. Minnichcleanup some of the compressed rom stream ugliness... tree | commitdiff
2006-05-16 Ronald G. MinnichCommit for IDE NAND FLASH tree | commitdiff
2006-05-12 Ronald G. Minnichcorrect it, finally. tree | commitdiff
2006-05-12 Ronald G. Minnichmemory size in cf07 tree | commitdiff
2006-05-05 Ronald G. Minnichreorder early startup so that it might work. tree | commitdiff
2006-05-03 Ronald G. Minnichmore changes; rumba enet works fine now. tree | commitdiff
2006-05-02 Ronald G. MinnichFall back to pre-broken settings and setup for GX2. tree | commitdiff
2006-04-27 Ronald G. Minnichwe don't need msr_init tree | commitdiff
2006-04-25 Ronald G. Minnichfix the msr.lo for olpc 0x20000019 tree | commitdiff
2006-04-23 Ronald G. Minnichfix so that olpc uarts come up enabled. tree | commitdiff
2006-04-20 Li-Ta Lochange to 5536 tree | commitdiff
2006-04-20 Li-Ta Loboot to kernel tree | commitdiff
2006-04-18 Ronald G. Minnichadd back in missing line tree | commitdiff
2006-04-18 Ronald G. Minnichset up timing tree | commitdiff
2006-04-18 Ronald G. Minnichadd ram resources tree | commitdiff
2006-04-18 Ronald G. Minnichadded the olpc target and support tree | commitdiff
my coreboot WIP stuff (asus m5a99x-evo board)